Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

targets/targets.json@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 {
switches 0:5c4d7b2438d3 2 "Target": {
switches 0:5c4d7b2438d3 3 "core": null,
switches 0:5c4d7b2438d3 4 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 5 "supported_toolchains": null,
switches 0:5c4d7b2438d3 6 "extra_labels": [],
switches 0:5c4d7b2438d3 7 "is_disk_virtual": false,
switches 0:5c4d7b2438d3 8 "macros": [],
switches 0:5c4d7b2438d3 9 "device_has": [],
switches 0:5c4d7b2438d3 10 "features": [],
switches 0:5c4d7b2438d3 11 "detect_code": [],
switches 0:5c4d7b2438d3 12 "public": false,
switches 0:5c4d7b2438d3 13 "default_lib": "std"
switches 0:5c4d7b2438d3 14 },
switches 0:5c4d7b2438d3 15 "Super_Target": {
switches 0:5c4d7b2438d3 16 "inherits": ["Target"],
switches 0:5c4d7b2438d3 17 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
switches 0:5c4d7b2438d3 19 "supported_toolchains": ["ARM"]
switches 0:5c4d7b2438d3 20 },
switches 0:5c4d7b2438d3 21 "CM4_UARM": {
switches 0:5c4d7b2438d3 22 "inherits": ["Target"],
switches 0:5c4d7b2438d3 23 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 24 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 25 "public": false,
switches 0:5c4d7b2438d3 26 "supported_toolchains": ["uARM"],
switches 0:5c4d7b2438d3 27 "default_lib": "small"
switches 0:5c4d7b2438d3 28 },
switches 0:5c4d7b2438d3 29 "CM4_ARM": {
switches 0:5c4d7b2438d3 30 "inherits": ["Target"],
switches 0:5c4d7b2438d3 31 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 32 "public": false,
switches 0:5c4d7b2438d3 33 "supported_toolchains": ["ARM"]
switches 0:5c4d7b2438d3 34 },
switches 0:5c4d7b2438d3 35 "CM4F_UARM": {
switches 0:5c4d7b2438d3 36 "inherits": ["Target"],
switches 0:5c4d7b2438d3 37 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 38 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 39 "public": false,
switches 0:5c4d7b2438d3 40 "supported_toolchains": ["uARM"],
switches 0:5c4d7b2438d3 41 "default_lib": "small"
switches 0:5c4d7b2438d3 42 },
switches 0:5c4d7b2438d3 43 "CM4F_ARM": {
switches 0:5c4d7b2438d3 44 "inherits": ["Target"],
switches 0:5c4d7b2438d3 45 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 46 "public": false,
switches 0:5c4d7b2438d3 47 "supported_toolchains": ["ARM"]
switches 0:5c4d7b2438d3 48 },
switches 0:5c4d7b2438d3 49 "LPCTarget": {
switches 0:5c4d7b2438d3 50 "inherits": ["Target"],
switches 0:5c4d7b2438d3 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
switches 0:5c4d7b2438d3 52 "public": false
switches 0:5c4d7b2438d3 53 },
switches 0:5c4d7b2438d3 54 "LPC11C24": {
switches 0:5c4d7b2438d3 55 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 56 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
switches 0:5c4d7b2438d3 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 60 "device_name": "LPC11C24FBD48/301"
switches 0:5c4d7b2438d3 61 },
switches 0:5c4d7b2438d3 62 "LPC1114": {
switches 0:5c4d7b2438d3 63 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 64 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 65 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
switches 0:5c4d7b2438d3 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 69 "default_lib": "small",
switches 0:5c4d7b2438d3 70 "release_versions": ["2"],
switches 0:5c4d7b2438d3 71 "device_name": "LPC1114FN28/102"
switches 0:5c4d7b2438d3 72 },
switches 0:5c4d7b2438d3 73 "LPC11U24": {
switches 0:5c4d7b2438d3 74 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 75 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 76 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
switches 0:5c4d7b2438d3 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 79 "detect_code": ["1040"],
switches 0:5c4d7b2438d3 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 81 "default_lib": "small",
switches 0:5c4d7b2438d3 82 "release_versions": ["2"],
switches 0:5c4d7b2438d3 83 "device_name": "LPC11U24FBD48/401"
switches 0:5c4d7b2438d3 84 },
switches 0:5c4d7b2438d3 85 "OC_MBUINO": {
switches 0:5c4d7b2438d3 86 "inherits": ["LPC11U24"],
switches 0:5c4d7b2438d3 87 "macros": ["TARGET_LPC11U24"],
switches 0:5c4d7b2438d3 88 "extra_labels": ["NXP", "LPC11UXX"],
switches 0:5c4d7b2438d3 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 90 "release_versions": ["2"]
switches 0:5c4d7b2438d3 91 },
switches 0:5c4d7b2438d3 92 "LPC11U24_301": {
switches 0:5c4d7b2438d3 93 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 94 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 95 "extra_labels": ["NXP", "LPC11UXX"],
switches 0:5c4d7b2438d3 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 98 "device_name": "LPC11U24FHI33/301"
switches 0:5c4d7b2438d3 99 },
switches 0:5c4d7b2438d3 100 "LPC11U34_421": {
switches 0:5c4d7b2438d3 101 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 102 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 103 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 104 "extra_labels": ["NXP", "LPC11UXX"],
switches 0:5c4d7b2438d3 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 107 "default_lib": "small",
switches 0:5c4d7b2438d3 108 "device_name": "LPC11U34FBD48/311"
switches 0:5c4d7b2438d3 109 },
switches 0:5c4d7b2438d3 110 "MICRONFCBOARD": {
switches 0:5c4d7b2438d3 111 "inherits": ["LPC11U34_421"],
switches 0:5c4d7b2438d3 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
switches 0:5c4d7b2438d3 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
switches 0:5c4d7b2438d3 114 "release_versions": ["2"],
switches 0:5c4d7b2438d3 115 "device_name": "LPC11U34FBD48/311"
switches 0:5c4d7b2438d3 116 },
switches 0:5c4d7b2438d3 117 "LPC11U35_401": {
switches 0:5c4d7b2438d3 118 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 119 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 120 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 121 "extra_labels": ["NXP", "LPC11UXX"],
switches 0:5c4d7b2438d3 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 124 "default_lib": "small",
switches 0:5c4d7b2438d3 125 "release_versions": ["2"],
switches 0:5c4d7b2438d3 126 "device_name": "LPC11U35FBD48/401"
switches 0:5c4d7b2438d3 127 },
switches 0:5c4d7b2438d3 128 "LPC11U35_501": {
switches 0:5c4d7b2438d3 129 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 130 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 131 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
switches 0:5c4d7b2438d3 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 135 "default_lib": "small",
switches 0:5c4d7b2438d3 136 "release_versions": ["2"],
switches 0:5c4d7b2438d3 137 "device_name": "LPC11U35FHI33/501"
switches 0:5c4d7b2438d3 138 },
switches 0:5c4d7b2438d3 139 "LPC11U35_501_IBDAP": {
switches 0:5c4d7b2438d3 140 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 141 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 142 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
switches 0:5c4d7b2438d3 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 146 "default_lib": "small",
switches 0:5c4d7b2438d3 147 "device_name": "LPC11U35FHI33/501"
switches 0:5c4d7b2438d3 148 },
switches 0:5c4d7b2438d3 149 "XADOW_M0": {
switches 0:5c4d7b2438d3 150 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 151 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 152 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
switches 0:5c4d7b2438d3 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 156 "default_lib": "small",
switches 0:5c4d7b2438d3 157 "release_versions": ["2"],
switches 0:5c4d7b2438d3 158 "device_name": "LPC11U35FHI33/501"
switches 0:5c4d7b2438d3 159 },
switches 0:5c4d7b2438d3 160 "LPC11U35_Y5_MBUG": {
switches 0:5c4d7b2438d3 161 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 162 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 163 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
switches 0:5c4d7b2438d3 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 167 "default_lib": "small",
switches 0:5c4d7b2438d3 168 "device_name": "LPC11U35FHI33/501"
switches 0:5c4d7b2438d3 169 },
switches 0:5c4d7b2438d3 170 "LPC11U37_501": {
switches 0:5c4d7b2438d3 171 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 172 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 173 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 174 "extra_labels": ["NXP", "LPC11UXX"],
switches 0:5c4d7b2438d3 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 176 "default_lib": "small",
switches 0:5c4d7b2438d3 177 "device_name": "LPC11U37FBD64/501"
switches 0:5c4d7b2438d3 178 },
switches 0:5c4d7b2438d3 179 "LPCCAPPUCCINO": {
switches 0:5c4d7b2438d3 180 "inherits": ["LPC11U37_501"],
switches 0:5c4d7b2438d3 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 182 "device_name": "LPC11U37FBD64/501"
switches 0:5c4d7b2438d3 183 },
switches 0:5c4d7b2438d3 184 "ARCH_GPRS": {
switches 0:5c4d7b2438d3 185 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 186 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 187 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
switches 0:5c4d7b2438d3 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 190 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 192 "default_lib": "small",
switches 0:5c4d7b2438d3 193 "release_versions": ["2"],
switches 0:5c4d7b2438d3 194 "device_name": "LPC11U37FBD64/501"
switches 0:5c4d7b2438d3 195 },
switches 0:5c4d7b2438d3 196 "LPC11U68": {
switches 0:5c4d7b2438d3 197 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 198 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 199 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 200 "extra_labels": ["NXP", "LPC11U6X"],
switches 0:5c4d7b2438d3 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 202 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 203 "detect_code": ["1168"],
switches 0:5c4d7b2438d3 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
switches 0:5c4d7b2438d3 205 "default_lib": "small",
switches 0:5c4d7b2438d3 206 "release_versions": ["2"],
switches 0:5c4d7b2438d3 207 "device_name": "LPC11U68JBD100"
switches 0:5c4d7b2438d3 208 },
switches 0:5c4d7b2438d3 209 "LPC1347": {
switches 0:5c4d7b2438d3 210 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 211 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 212 "extra_labels": ["NXP", "LPC13XX"],
switches 0:5c4d7b2438d3 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 215 "release_versions": ["2"],
switches 0:5c4d7b2438d3 216 "device_name": "LPC1347FBD48"
switches 0:5c4d7b2438d3 217 },
switches 0:5c4d7b2438d3 218 "LPC1549": {
switches 0:5c4d7b2438d3 219 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 220 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 221 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 222 "extra_labels": ["NXP", "LPC15XX"],
switches 0:5c4d7b2438d3 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 224 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 225 "detect_code": ["1549"],
switches 0:5c4d7b2438d3 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 227 "default_lib": "small",
switches 0:5c4d7b2438d3 228 "release_versions": ["2"],
switches 0:5c4d7b2438d3 229 "device_name": "lpc1549"
switches 0:5c4d7b2438d3 230 },
switches 0:5c4d7b2438d3 231 "LPC1768": {
switches 0:5c4d7b2438d3 232 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 233 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
switches 0:5c4d7b2438d3 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 236 "detect_code": ["1010"],
switches 0:5c4d7b2438d3 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 238 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 239 "features": ["LWIP"],
switches 0:5c4d7b2438d3 240 "device_name": "LPC1768"
switches 0:5c4d7b2438d3 241 },
switches 0:5c4d7b2438d3 242 "ARCH_PRO": {
switches 0:5c4d7b2438d3 243 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 244 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 245 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 246 "extra_labels": ["NXP", "LPC176X"],
switches 0:5c4d7b2438d3 247 "macros": ["TARGET_LPC1768"],
switches 0:5c4d7b2438d3 248 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 249 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 250 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 251 "features": ["LWIP"],
switches 0:5c4d7b2438d3 252 "device_name": "LPC1768"
switches 0:5c4d7b2438d3 253 },
switches 0:5c4d7b2438d3 254 "UBLOX_C027": {
switches 0:5c4d7b2438d3 255 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 256 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 257 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 258 "extra_labels": ["NXP", "LPC176X"],
switches 0:5c4d7b2438d3 259 "macros": ["TARGET_LPC1768"],
switches 0:5c4d7b2438d3 260 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 261 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 262 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 263 "features": ["LWIP"],
switches 0:5c4d7b2438d3 264 "device_name": "LPC1768"
switches 0:5c4d7b2438d3 265 },
switches 0:5c4d7b2438d3 266 "XBED_LPC1768": {
switches 0:5c4d7b2438d3 267 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 268 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 269 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 270 "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
switches 0:5c4d7b2438d3 271 "macros": ["TARGET_LPC1768"],
switches 0:5c4d7b2438d3 272 "detect_code": ["1010"],
switches 0:5c4d7b2438d3 273 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 274 "device_name": "LPC1768"
switches 0:5c4d7b2438d3 275 },
switches 0:5c4d7b2438d3 276 "LPC2368": {
switches 0:5c4d7b2438d3 277 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 278 "core": "ARM7TDMI-S",
switches 0:5c4d7b2438d3 279 "extra_labels": ["NXP", "LPC23XX"],
switches 0:5c4d7b2438d3 280 "supported_toolchains": ["GCC_ARM", "GCC_CR"],
switches 0:5c4d7b2438d3 281 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
switches 0:5c4d7b2438d3 282 },
switches 0:5c4d7b2438d3 283 "LPC2460": {
switches 0:5c4d7b2438d3 284 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 285 "core": "ARM7TDMI-S",
switches 0:5c4d7b2438d3 286 "extra_labels": ["NXP", "LPC2460"],
switches 0:5c4d7b2438d3 287 "supported_toolchains": ["GCC_ARM"],
switches 0:5c4d7b2438d3 288 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
switches 0:5c4d7b2438d3 289 },
switches 0:5c4d7b2438d3 290 "LPC810": {
switches 0:5c4d7b2438d3 291 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 292 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 293 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 294 "extra_labels": ["NXP", "LPC81X"],
switches 0:5c4d7b2438d3 295 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 296 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 297 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 298 "default_lib": "small",
switches 0:5c4d7b2438d3 299 "device_name": "LPC810M021FN8"
switches 0:5c4d7b2438d3 300 },
switches 0:5c4d7b2438d3 301 "LPC812": {
switches 0:5c4d7b2438d3 302 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 303 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 304 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 305 "extra_labels": ["NXP", "LPC81X"],
switches 0:5c4d7b2438d3 306 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 307 "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 308 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 309 "detect_code": ["1050"],
switches 0:5c4d7b2438d3 310 "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 311 "default_lib": "small",
switches 0:5c4d7b2438d3 312 "release_versions": ["2"],
switches 0:5c4d7b2438d3 313 "device_name": "LPC812M101JDH20"
switches 0:5c4d7b2438d3 314 },
switches 0:5c4d7b2438d3 315 "LPC824": {
switches 0:5c4d7b2438d3 316 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 317 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 318 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 319 "extra_labels": ["NXP", "LPC82X"],
switches 0:5c4d7b2438d3 320 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 321 "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 322 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 323 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 324 "default_lib": "small",
switches 0:5c4d7b2438d3 325 "release_versions": ["2"],
switches 0:5c4d7b2438d3 326 "device_name": "LPC824M201JDH20"
switches 0:5c4d7b2438d3 327 },
switches 0:5c4d7b2438d3 328 "SSCI824": {
switches 0:5c4d7b2438d3 329 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 330 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 331 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 332 "extra_labels": ["NXP", "LPC82X"],
switches 0:5c4d7b2438d3 333 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 334 "supported_toolchains": ["uARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 335 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 336 "default_lib": "small",
switches 0:5c4d7b2438d3 337 "release_versions": ["2"]
switches 0:5c4d7b2438d3 338 },
switches 0:5c4d7b2438d3 339 "LPC4088": {
switches 0:5c4d7b2438d3 340 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 341 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 342 "extra_labels": ["NXP", "LPC408X"],
switches 0:5c4d7b2438d3 343 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 344 "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 345 "post_binary_hook": {
switches 0:5c4d7b2438d3 346 "function": "LPC4088Code.binary_hook",
switches 0:5c4d7b2438d3 347 "toolchains": ["ARM_STD", "ARM_MICRO"]
switches 0:5c4d7b2438d3 348 },
switches 0:5c4d7b2438d3 349 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 350 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 351 "device_name": "LPC4088FBD144"
switches 0:5c4d7b2438d3 352 },
switches 0:5c4d7b2438d3 353 "LPC4088_DM": {
switches 0:5c4d7b2438d3 354 "inherits": ["LPC4088"],
switches 0:5c4d7b2438d3 355 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 356 },
switches 0:5c4d7b2438d3 357 "LPC4330_M4": {
switches 0:5c4d7b2438d3 358 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 359 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 360 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
switches 0:5c4d7b2438d3 361 "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 362 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 363 "device_name": "LPC4330"
switches 0:5c4d7b2438d3 364 },
switches 0:5c4d7b2438d3 365 "LPC4330_M0": {
switches 0:5c4d7b2438d3 366 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 367 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 368 "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
switches 0:5c4d7b2438d3 369 "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
switches 0:5c4d7b2438d3 370 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
switches 0:5c4d7b2438d3 371 },
switches 0:5c4d7b2438d3 372 "LPC4337": {
switches 0:5c4d7b2438d3 373 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 374 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 375 "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
switches 0:5c4d7b2438d3 376 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 377 "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 378 "release_versions": ["2"],
switches 0:5c4d7b2438d3 379 "device_name": "LPC4337"
switches 0:5c4d7b2438d3 380 },
switches 0:5c4d7b2438d3 381 "LPC1800": {
switches 0:5c4d7b2438d3 382 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 383 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 384 "extra_labels": ["NXP", "LPC43XX"],
switches 0:5c4d7b2438d3 385 "public": false,
switches 0:5c4d7b2438d3 386 "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
switches 0:5c4d7b2438d3 387 },
switches 0:5c4d7b2438d3 388 "LPC11U37H_401": {
switches 0:5c4d7b2438d3 389 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 390 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 391 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 392 "extra_labels": ["NXP", "LPC11UXX"],
switches 0:5c4d7b2438d3 393 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
switches 0:5c4d7b2438d3 394 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 395 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 396 "default_lib": "small",
switches 0:5c4d7b2438d3 397 "release_versions": ["2"],
switches 0:5c4d7b2438d3 398 "device_name": "LPC11U37HFBD64/401"
switches 0:5c4d7b2438d3 399 },
switches 0:5c4d7b2438d3 400 "ELEKTOR_COCORICO": {
switches 0:5c4d7b2438d3 401 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 402 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 403 "extra_labels": ["NXP", "LPC81X"],
switches 0:5c4d7b2438d3 404 "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 405 "inherits": ["LPCTarget"],
switches 0:5c4d7b2438d3 406 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 407 "detect_code": ["C000"],
switches 0:5c4d7b2438d3 408 "default_lib": "small",
switches 0:5c4d7b2438d3 409 "device_name": "LPC812M101JDH16"
switches 0:5c4d7b2438d3 410 },
switches 0:5c4d7b2438d3 411 "KL05Z": {
switches 0:5c4d7b2438d3 412 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 413 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 414 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 415 "extra_labels": ["Freescale", "KLXX"],
switches 0:5c4d7b2438d3 416 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 417 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 418 "inherits": ["Target"],
switches 0:5c4d7b2438d3 419 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 420 "default_lib": "small",
switches 0:5c4d7b2438d3 421 "release_versions": ["2"],
switches 0:5c4d7b2438d3 422 "device_name": "MKL05Z32xxx4"
switches 0:5c4d7b2438d3 423 },
switches 0:5c4d7b2438d3 424 "KL25Z": {
switches 0:5c4d7b2438d3 425 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 426 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 427 "extra_labels": ["Freescale", "KLXX"],
switches 0:5c4d7b2438d3 428 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 429 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 430 "inherits": ["Target"],
switches 0:5c4d7b2438d3 431 "detect_code": ["0200"],
switches 0:5c4d7b2438d3 432 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 433 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 434 "device_name": "MKL25Z128xxx4"
switches 0:5c4d7b2438d3 435 },
switches 0:5c4d7b2438d3 436 "KL26Z": {
switches 0:5c4d7b2438d3 437 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 438 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 439 "extra_labels": ["Freescale", "KLXX"],
switches 0:5c4d7b2438d3 440 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 441 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 442 "inherits": ["Target"],
switches 0:5c4d7b2438d3 443 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 444 "device_name": "MKL26Z128xxx4"
switches 0:5c4d7b2438d3 445 },
switches 0:5c4d7b2438d3 446 "KL46Z": {
switches 0:5c4d7b2438d3 447 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 448 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 449 "extra_labels": ["Freescale", "KLXX"],
switches 0:5c4d7b2438d3 450 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 451 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 452 "inherits": ["Target"],
switches 0:5c4d7b2438d3 453 "detect_code": ["0220"],
switches 0:5c4d7b2438d3 454 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 455 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 456 "device_name": "MKL46Z256xxx4"
switches 0:5c4d7b2438d3 457 },
switches 0:5c4d7b2438d3 458 "K20D50M": {
switches 0:5c4d7b2438d3 459 "inherits": ["Target"],
switches 0:5c4d7b2438d3 460 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 461 "extra_labels": ["Freescale", "K20XX"],
switches 0:5c4d7b2438d3 462 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 463 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 464 "detect_code": ["0230"],
switches 0:5c4d7b2438d3 465 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 466 "release_versions": ["2"],
switches 0:5c4d7b2438d3 467 "device_name": "MK20DX128xxx5"
switches 0:5c4d7b2438d3 468 },
switches 0:5c4d7b2438d3 469 "TEENSY3_1": {
switches 0:5c4d7b2438d3 470 "inherits": ["Target"],
switches 0:5c4d7b2438d3 471 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 472 "extra_labels": ["Freescale", "K20XX", "K20DX256"],
switches 0:5c4d7b2438d3 473 "OUTPUT_EXT": "hex",
switches 0:5c4d7b2438d3 474 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 475 "supported_toolchains": ["GCC_ARM", "ARM"],
switches 0:5c4d7b2438d3 476 "post_binary_hook": {
switches 0:5c4d7b2438d3 477 "function": "TEENSY3_1Code.binary_hook",
switches 0:5c4d7b2438d3 478 "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
switches 0:5c4d7b2438d3 479 },
switches 0:5c4d7b2438d3 480 "detect_code": ["0230"],
switches 0:5c4d7b2438d3 481 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 482 "release_versions": ["2"],
switches 0:5c4d7b2438d3 483 "device_name": "MK20DX256xxx7"
switches 0:5c4d7b2438d3 484 },
switches 0:5c4d7b2438d3 485 "MCU_K22F512": {
switches 0:5c4d7b2438d3 486 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 487 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 488 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
switches 0:5c4d7b2438d3 489 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 490 "public": false,
switches 0:5c4d7b2438d3 491 "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 492 "inherits": ["Target"],
switches 0:5c4d7b2438d3 493 "detect_code": ["0231"],
switches 0:5c4d7b2438d3 494 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 495 "device_name": "MK22DN512xxx5"
switches 0:5c4d7b2438d3 496 },
switches 0:5c4d7b2438d3 497 "K22F": {
switches 0:5c4d7b2438d3 498 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 499 "inherits": ["MCU_K22F512"],
switches 0:5c4d7b2438d3 500 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 501 "extra_labels_add": ["FRDM"]
switches 0:5c4d7b2438d3 502 },
switches 0:5c4d7b2438d3 503 "KL27Z": {
switches 0:5c4d7b2438d3 504 "inherits": ["Target"],
switches 0:5c4d7b2438d3 505 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 506 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
switches 0:5c4d7b2438d3 507 "macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 508 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 509 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 510 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 511 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 512 "detect_code": ["0261"],
switches 0:5c4d7b2438d3 513 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 514 "default_lib": "std",
switches 0:5c4d7b2438d3 515 "release_versions": ["2"],
switches 0:5c4d7b2438d3 516 "device_name": "MKL27Z64xxx4"
switches 0:5c4d7b2438d3 517 },
switches 0:5c4d7b2438d3 518 "KL43Z": {
switches 0:5c4d7b2438d3 519 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 520 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 521 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 522 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
switches 0:5c4d7b2438d3 523 "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 524 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 525 "inherits": ["Target"],
switches 0:5c4d7b2438d3 526 "detect_code": ["0262"],
switches 0:5c4d7b2438d3 527 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 528 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 529 "device_name": "MKL43Z256xxx4"
switches 0:5c4d7b2438d3 530 },
switches 0:5c4d7b2438d3 531 "KL82Z": {
switches 0:5c4d7b2438d3 532 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 533 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 534 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 535 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
switches 0:5c4d7b2438d3 536 "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 537 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 538 "inherits": ["Target"],
switches 0:5c4d7b2438d3 539 "detect_code": ["0218"],
switches 0:5c4d7b2438d3 540 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 541 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 542 "device_name": "MKL82Z128xxx7"
switches 0:5c4d7b2438d3 543 },
switches 0:5c4d7b2438d3 544 "KW24D": {
switches 0:5c4d7b2438d3 545 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 546 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 547 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 548 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
switches 0:5c4d7b2438d3 549 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 550 "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 551 "inherits": ["Target"],
switches 0:5c4d7b2438d3 552 "detect_code": ["0250"],
switches 0:5c4d7b2438d3 553 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 554 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 555 "device_name": "MKW24D512xxx5"
switches 0:5c4d7b2438d3 556 },
switches 0:5c4d7b2438d3 557 "K64F": {
switches 0:5c4d7b2438d3 558 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 559 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 560 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 561 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
switches 0:5c4d7b2438d3 562 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 563 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 564 "inherits": ["Target"],
switches 0:5c4d7b2438d3 565 "detect_code": ["0240"],
switches 0:5c4d7b2438d3 566 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
switches 0:5c4d7b2438d3 567 "features": ["LWIP", "STORAGE"],
switches 0:5c4d7b2438d3 568 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 569 "device_name": "MK64FN1M0xxx12"
switches 0:5c4d7b2438d3 570 },
switches 0:5c4d7b2438d3 571 "MTS_GAMBIT": {
switches 0:5c4d7b2438d3 572 "inherits": ["Target"],
switches 0:5c4d7b2438d3 573 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 574 "supported_toolchains": ["ARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 575 "extra_labels": ["Freescale", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
switches 0:5c4d7b2438d3 576 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 577 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
switches 0:5c4d7b2438d3 578 "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 579 "device_name": "MK64FN1M0xxx12"
switches 0:5c4d7b2438d3 580 },
switches 0:5c4d7b2438d3 581 "HEXIWEAR": {
switches 0:5c4d7b2438d3 582 "inherits": ["Target"],
switches 0:5c4d7b2438d3 583 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 584 "extra_labels": ["Freescale", "KSDK2_MCUS", "MCU_K64F"],
switches 0:5c4d7b2438d3 585 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 586 "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
switches 0:5c4d7b2438d3 587 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 588 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 589 "detect_code": ["0214"],
switches 0:5c4d7b2438d3 590 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 591 "default_lib": "std",
switches 0:5c4d7b2438d3 592 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 593 "device_name": "MK64FN1M0xxx12"
switches 0:5c4d7b2438d3 594 },
switches 0:5c4d7b2438d3 595 "K66F": {
switches 0:5c4d7b2438d3 596 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 597 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 598 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 599 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
switches 0:5c4d7b2438d3 600 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 601 "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 602 "inherits": ["Target"],
switches 0:5c4d7b2438d3 603 "detect_code": ["0311"],
switches 0:5c4d7b2438d3 604 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 605 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 606 "device_name" : "MK66FN2M0xxx18"
switches 0:5c4d7b2438d3 607 },
switches 0:5c4d7b2438d3 608 "K82F": {
switches 0:5c4d7b2438d3 609 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 610 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 611 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 612 "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM"],
switches 0:5c4d7b2438d3 613 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 614 "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
switches 0:5c4d7b2438d3 615 "inherits": ["Target"],
switches 0:5c4d7b2438d3 616 "detect_code": ["0217"],
switches 0:5c4d7b2438d3 617 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 618 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 619 "device_name" : "MK66FN256xxx15"
switches 0:5c4d7b2438d3 620 },
switches 0:5c4d7b2438d3 621 "NUCLEO_F030R8": {
switches 0:5c4d7b2438d3 622 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 623 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 624 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 625 "extra_labels": ["STM", "STM32F0", "STM32F030R8"],
switches 0:5c4d7b2438d3 626 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 627 "inherits": ["Target"],
switches 0:5c4d7b2438d3 628 "detect_code": ["0725"],
switches 0:5c4d7b2438d3 629 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 630 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 631 "default_lib": "small",
switches 0:5c4d7b2438d3 632 "release_versions": ["2"],
switches 0:5c4d7b2438d3 633 "device_name": "STM32F030R8"
switches 0:5c4d7b2438d3 634 },
switches 0:5c4d7b2438d3 635 "NUCLEO_F031K6": {
switches 0:5c4d7b2438d3 636 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 637 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 638 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 639 "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
switches 0:5c4d7b2438d3 640 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 641 "inherits": ["Target"],
switches 0:5c4d7b2438d3 642 "detect_code": ["0791"],
switches 0:5c4d7b2438d3 643 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 644 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 645 "default_lib": "small",
switches 0:5c4d7b2438d3 646 "release_versions": ["2"],
switches 0:5c4d7b2438d3 647 "device_name": "STM32F031K6"
switches 0:5c4d7b2438d3 648 },
switches 0:5c4d7b2438d3 649 "NUCLEO_F042K6": {
switches 0:5c4d7b2438d3 650 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 651 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 652 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 653 "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
switches 0:5c4d7b2438d3 654 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 655 "inherits": ["Target"],
switches 0:5c4d7b2438d3 656 "detect_code": ["0785"],
switches 0:5c4d7b2438d3 657 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 658 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 659 "default_lib": "small",
switches 0:5c4d7b2438d3 660 "release_versions": ["2"],
switches 0:5c4d7b2438d3 661 "device_name": "STM32F042K6"
switches 0:5c4d7b2438d3 662 },
switches 0:5c4d7b2438d3 663 "NUCLEO_F070RB": {
switches 0:5c4d7b2438d3 664 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 665 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 666 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 667 "extra_labels": ["STM", "STM32F0", "STM32F070RB"],
switches 0:5c4d7b2438d3 668 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 669 "inherits": ["Target"],
switches 0:5c4d7b2438d3 670 "detect_code": ["0755"],
switches 0:5c4d7b2438d3 671 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 672 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 673 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 674 "device_name": "STM32F070RB"
switches 0:5c4d7b2438d3 675 },
switches 0:5c4d7b2438d3 676 "NUCLEO_F072RB": {
switches 0:5c4d7b2438d3 677 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 678 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 679 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 680 "extra_labels": ["STM", "STM32F0", "STM32F072RB"],
switches 0:5c4d7b2438d3 681 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 682 "inherits": ["Target"],
switches 0:5c4d7b2438d3 683 "detect_code": ["0730"],
switches 0:5c4d7b2438d3 684 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 685 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 686 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 687 "device_name": "STM32F072RB"
switches 0:5c4d7b2438d3 688 },
switches 0:5c4d7b2438d3 689 "NUCLEO_F091RC": {
switches 0:5c4d7b2438d3 690 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 691 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 692 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 693 "extra_labels": ["STM", "STM32F0", "STM32F091RC"],
switches 0:5c4d7b2438d3 694 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 695 "inherits": ["Target"],
switches 0:5c4d7b2438d3 696 "detect_code": ["0750"],
switches 0:5c4d7b2438d3 697 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 698 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 699 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 700 "device_name": "STM32F091RC"
switches 0:5c4d7b2438d3 701 },
switches 0:5c4d7b2438d3 702 "NUCLEO_F103RB": {
switches 0:5c4d7b2438d3 703 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 704 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 705 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 706 "extra_labels": ["STM", "STM32F1", "STM32F103RB"],
switches 0:5c4d7b2438d3 707 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 708 "inherits": ["Target"],
switches 0:5c4d7b2438d3 709 "detect_code": ["0700"],
switches 0:5c4d7b2438d3 710 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 711 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 712 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 713 "device_name": "STM32F103RB"
switches 0:5c4d7b2438d3 714 },
switches 0:5c4d7b2438d3 715 "NUCLEO_F207ZG": {
switches 0:5c4d7b2438d3 716 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 717 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 718 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 719 "extra_labels": ["STM", "STM32F2", "STM32F207ZG"],
switches 0:5c4d7b2438d3 720 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 721 "inherits": ["Target"],
switches 0:5c4d7b2438d3 722 "detect_code": ["0835"],
switches 0:5c4d7b2438d3 723 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 724 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 725 "features": ["LWIP"],
switches 0:5c4d7b2438d3 726 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 727 "device_name" : "STM32F207ZG"
switches 0:5c4d7b2438d3 728 },
switches 0:5c4d7b2438d3 729 "NUCLEO_F302R8": {
switches 0:5c4d7b2438d3 730 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 731 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 732 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 733 "extra_labels": ["STM", "STM32F3", "STM32F302R8"],
switches 0:5c4d7b2438d3 734 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 735 "inherits": ["Target"],
switches 0:5c4d7b2438d3 736 "detect_code": ["0705"],
switches 0:5c4d7b2438d3 737 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 738 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 739 "default_lib": "small",
switches 0:5c4d7b2438d3 740 "release_versions": ["2"],
switches 0:5c4d7b2438d3 741 "device_name": "STM32F302R8"
switches 0:5c4d7b2438d3 742 },
switches 0:5c4d7b2438d3 743 "NUCLEO_F303K8": {
switches 0:5c4d7b2438d3 744 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 745 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 746 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 747 "extra_labels": ["STM", "STM32F3", "STM32F303K8"],
switches 0:5c4d7b2438d3 748 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 749 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 750 "inherits": ["Target"],
switches 0:5c4d7b2438d3 751 "detect_code": ["0775"],
switches 0:5c4d7b2438d3 752 "default_lib": "small",
switches 0:5c4d7b2438d3 753 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 754 "release_versions": ["2"],
switches 0:5c4d7b2438d3 755 "device_name": "STM32F303K8"
switches 0:5c4d7b2438d3 756 },
switches 0:5c4d7b2438d3 757 "NUCLEO_F303RE": {
switches 0:5c4d7b2438d3 758 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 759 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 760 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 761 "extra_labels": ["STM", "STM32F3", "STM32F303RE"],
switches 0:5c4d7b2438d3 762 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 763 "inherits": ["Target"],
switches 0:5c4d7b2438d3 764 "detect_code": ["0745"],
switches 0:5c4d7b2438d3 765 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 766 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 767 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 768 "device_name": "STM32F303RE"
switches 0:5c4d7b2438d3 769 },
switches 0:5c4d7b2438d3 770 "NUCLEO_F303ZE": {
switches 0:5c4d7b2438d3 771 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 772 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 773 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 774 "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
switches 0:5c4d7b2438d3 775 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 776 "inherits": ["Target"],
switches 0:5c4d7b2438d3 777 "detect_code": ["0747"],
switches 0:5c4d7b2438d3 778 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 779 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "LOWPOWERTIMER"],
switches 0:5c4d7b2438d3 780 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 781 "device_name": "STM32F303ZE"
switches 0:5c4d7b2438d3 782 },
switches 0:5c4d7b2438d3 783 "NUCLEO_F334R8": {
switches 0:5c4d7b2438d3 784 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 785 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 786 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 787 "extra_labels": ["STM", "STM32F3", "STM32F334R8"],
switches 0:5c4d7b2438d3 788 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 789 "inherits": ["Target"],
switches 0:5c4d7b2438d3 790 "detect_code": ["0735"],
switches 0:5c4d7b2438d3 791 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 792 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 793 "default_lib": "small",
switches 0:5c4d7b2438d3 794 "release_versions": ["2"],
switches 0:5c4d7b2438d3 795 "device_name": "STM32F334R8"
switches 0:5c4d7b2438d3 796 },
switches 0:5c4d7b2438d3 797 "NUCLEO_F401RE": {
switches 0:5c4d7b2438d3 798 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 799 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 800 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 801 "extra_labels": ["STM", "STM32F4", "STM32F401RE"],
switches 0:5c4d7b2438d3 802 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 803 "inherits": ["Target"],
switches 0:5c4d7b2438d3 804 "detect_code": ["0720"],
switches 0:5c4d7b2438d3 805 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 806 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 807 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 808 "device_name": "STM32F401RE"
switches 0:5c4d7b2438d3 809 },
switches 0:5c4d7b2438d3 810 "NUCLEO_F410RB": {
switches 0:5c4d7b2438d3 811 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 812 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 813 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 814 "extra_labels": ["STM", "STM32F4", "STM32F410RB","STM32F410Rx"],
switches 0:5c4d7b2438d3 815 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 816 "inherits": ["Target"],
switches 0:5c4d7b2438d3 817 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 818 "detect_code": ["0740"],
switches 0:5c4d7b2438d3 819 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 820 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 821 "device_name": "STM32F410RB"
switches 0:5c4d7b2438d3 822 },
switches 0:5c4d7b2438d3 823 "NUCLEO_F411RE": {
switches 0:5c4d7b2438d3 824 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 825 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 826 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 827 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
switches 0:5c4d7b2438d3 828 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 829 "inherits": ["Target"],
switches 0:5c4d7b2438d3 830 "detect_code": ["0740"],
switches 0:5c4d7b2438d3 831 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 832 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 833 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 834 "device_name": "STM32F411RE"
switches 0:5c4d7b2438d3 835 },
switches 0:5c4d7b2438d3 836 "ELMO_F411RE": {
switches 0:5c4d7b2438d3 837 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 838 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 839 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 840 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
switches 0:5c4d7b2438d3 841 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 842 "inherits": ["Target"],
switches 0:5c4d7b2438d3 843 "detect_code": ["----"],
switches 0:5c4d7b2438d3 844 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 845 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 846 "default_lib": "small",
switches 0:5c4d7b2438d3 847 "release_versions": ["2"],
switches 0:5c4d7b2438d3 848 "device_name": "STM32F411RE"
switches 0:5c4d7b2438d3 849 },
switches 0:5c4d7b2438d3 850 "NUCLEO_F429ZI": {
switches 0:5c4d7b2438d3 851 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 852 "inherits": ["Target"],
switches 0:5c4d7b2438d3 853 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 854 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 855 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "F429_F439"],
switches 0:5c4d7b2438d3 856 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 857 "progen": {"target": "nucleo-f429zi"},
switches 0:5c4d7b2438d3 858 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 859 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 860 "detect_code": ["0796"],
switches 0:5c4d7b2438d3 861 "features": ["LWIP"],
switches 0:5c4d7b2438d3 862 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 863 "device_name" : "STM32F429ZI"
switches 0:5c4d7b2438d3 864 },
switches 0:5c4d7b2438d3 865 "NUCLEO_F439ZI": {
switches 0:5c4d7b2438d3 866 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 867 "inherits": ["Target"],
switches 0:5c4d7b2438d3 868 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 869 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 870 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "F429_F439"],
switches 0:5c4d7b2438d3 871 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 872 "progen": {"target": "nucleo-f439zi"},
switches 0:5c4d7b2438d3 873 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 874 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 875 "detect_code": ["0797"],
switches 0:5c4d7b2438d3 876 "features": ["LWIP"],
switches 0:5c4d7b2438d3 877 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 878 "device_name" : "STM32F429ZI"
switches 0:5c4d7b2438d3 879 },
switches 0:5c4d7b2438d3 880 "NUCLEO_F446RE": {
switches 0:5c4d7b2438d3 881 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 882 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 883 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 884 "extra_labels": ["STM", "STM32F4", "STM32F446RE"],
switches 0:5c4d7b2438d3 885 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 886 "inherits": ["Target"],
switches 0:5c4d7b2438d3 887 "detect_code": ["0777"],
switches 0:5c4d7b2438d3 888 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 889 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 890 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 891 "device_name": "STM32F446RE"
switches 0:5c4d7b2438d3 892 },
switches 0:5c4d7b2438d3 893 "NUCLEO_F446ZE": {
switches 0:5c4d7b2438d3 894 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 895 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 896 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 897 "extra_labels": ["STM", "STM32F4", "STM32F446ZE"],
switches 0:5c4d7b2438d3 898 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 899 "inherits": ["Target"],
switches 0:5c4d7b2438d3 900 "detect_code": ["0778"],
switches 0:5c4d7b2438d3 901 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 902 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 903 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 904 "device_name" : "STM32F446ZE"
switches 0:5c4d7b2438d3 905 },
switches 0:5c4d7b2438d3 906 "B96B_F446VE": {
switches 0:5c4d7b2438d3 907 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 908 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 909 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 910 "extra_labels": ["STM", "STM32F4", "STM32F446VE"],
switches 0:5c4d7b2438d3 911 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 912 "inherits": ["Target"],
switches 0:5c4d7b2438d3 913 "detect_code": ["0840"],
switches 0:5c4d7b2438d3 914 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 915 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 916 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 917 "device_name":"STM32F446VE"
switches 0:5c4d7b2438d3 918 },
switches 0:5c4d7b2438d3 919 "NUCLEO_F746ZG": {
switches 0:5c4d7b2438d3 920 "inherits": ["Target"],
switches 0:5c4d7b2438d3 921 "core": "Cortex-M7F",
switches 0:5c4d7b2438d3 922 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG", "F746_F756"],
switches 0:5c4d7b2438d3 923 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 924 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 925 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 926 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 927 "detect_code": ["0816"],
switches 0:5c4d7b2438d3 928 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 929 "features": ["LWIP"],
switches 0:5c4d7b2438d3 930 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 931 "device_name": "STM32F746ZG"
switches 0:5c4d7b2438d3 932 },
switches 0:5c4d7b2438d3 933 "NUCLEO_F756ZG": {
switches 0:5c4d7b2438d3 934 "inherits": ["Target"],
switches 0:5c4d7b2438d3 935 "core": "Cortex-M7F",
switches 0:5c4d7b2438d3 936 "extra_labels": ["STM", "STM32F7", "STM32F756", "STM32F756ZG", "F746_F756"],
switches 0:5c4d7b2438d3 937 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 938 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 939 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 940 "detect_code": ["0819"],
switches 0:5c4d7b2438d3 941 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 942 "features": ["LWIP"],
switches 0:5c4d7b2438d3 943 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 944 "device_name": "STM32F756ZG"
switches 0:5c4d7b2438d3 945 },
switches 0:5c4d7b2438d3 946 "NUCLEO_F767ZI": {
switches 0:5c4d7b2438d3 947 "inherits": ["Target"],
switches 0:5c4d7b2438d3 948 "core": "Cortex-M7FD",
switches 0:5c4d7b2438d3 949 "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767ZI"],
switches 0:5c4d7b2438d3 950 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 951 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 952 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 953 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 954 "detect_code": ["0818"],
switches 0:5c4d7b2438d3 955 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 956 "features": ["LWIP"],
switches 0:5c4d7b2438d3 957 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 958 "device_name" : "STM32F767ZI"
switches 0:5c4d7b2438d3 959 },
switches 0:5c4d7b2438d3 960 "NUCLEO_L011K4": {
switches 0:5c4d7b2438d3 961 "inherits": ["Target"],
switches 0:5c4d7b2438d3 962 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 963 "extra_labels": ["STM", "STM32L0", "STM32L011K4"],
switches 0:5c4d7b2438d3 964 "supported_toolchains": ["uARM"],
switches 0:5c4d7b2438d3 965 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 966 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 967 "detect_code": ["0780"],
switches 0:5c4d7b2438d3 968 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 969 "default_lib": "small",
switches 0:5c4d7b2438d3 970 "release_versions": ["2"],
switches 0:5c4d7b2438d3 971 "device_name": "STM32L011K4"
switches 0:5c4d7b2438d3 972 },
switches 0:5c4d7b2438d3 973 "NUCLEO_L031K6": {
switches 0:5c4d7b2438d3 974 "inherits": ["Target"],
switches 0:5c4d7b2438d3 975 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 976 "extra_labels": ["STM", "STM32L0", "STM32L031K6"],
switches 0:5c4d7b2438d3 977 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 978 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 979 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 980 "detect_code": ["0790"],
switches 0:5c4d7b2438d3 981 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 982 "default_lib": "small",
switches 0:5c4d7b2438d3 983 "release_versions": ["2"],
switches 0:5c4d7b2438d3 984 "device_name": "STM32L031K6"
switches 0:5c4d7b2438d3 985 },
switches 0:5c4d7b2438d3 986 "NUCLEO_L053R8": {
switches 0:5c4d7b2438d3 987 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 988 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 989 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 990 "extra_labels": ["STM", "STM32L0", "STM32L053R8"],
switches 0:5c4d7b2438d3 991 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 992 "inherits": ["Target"],
switches 0:5c4d7b2438d3 993 "detect_code": ["0715"],
switches 0:5c4d7b2438d3 994 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 995 "default_lib": "small",
switches 0:5c4d7b2438d3 996 "release_versions": ["2"],
switches 0:5c4d7b2438d3 997 "device_name": "STM32L053R8"
switches 0:5c4d7b2438d3 998 },
switches 0:5c4d7b2438d3 999 "NUCLEO_L073RZ": {
switches 0:5c4d7b2438d3 1000 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 1001 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 1002 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1003 "extra_labels": ["STM", "STM32L0", "STM32L073RZ", "STM32L073xx"],
switches 0:5c4d7b2438d3 1004 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1005 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1006 "detect_code": ["0760"],
switches 0:5c4d7b2438d3 1007 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1008 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1009 "device_name": "STM32L073RZ"
switches 0:5c4d7b2438d3 1010 },
switches 0:5c4d7b2438d3 1011 "NUCLEO_L152RE": {
switches 0:5c4d7b2438d3 1012 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 1013 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1014 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1015 "extra_labels": ["STM", "STM32L1", "STM32L152RE"],
switches 0:5c4d7b2438d3 1016 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1017 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1018 "detect_code": ["0710"],
switches 0:5c4d7b2438d3 1019 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1020 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1021 "device_name": "STM32L152RE"
switches 0:5c4d7b2438d3 1022 },
switches 0:5c4d7b2438d3 1023 "NUCLEO_L432KC": {
switches 0:5c4d7b2438d3 1024 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1025 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1026 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1027 "extra_labels": ["STM", "STM32L4", "STM32L432KC"],
switches 0:5c4d7b2438d3 1028 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1029 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1030 "detect_code": ["0770"],
switches 0:5c4d7b2438d3 1031 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1032 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "CAN", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1033 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1034 "device_name" : "STM32L432KC"
switches 0:5c4d7b2438d3 1035 },
switches 0:5c4d7b2438d3 1036 "NUCLEO_L476RG": {
switches 0:5c4d7b2438d3 1037 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 1038 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1039 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1040 "extra_labels": ["STM", "STM32L4", "STM32L476RG", "L476_L486"],
switches 0:5c4d7b2438d3 1041 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1042 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1043 "detect_code": ["0765"],
switches 0:5c4d7b2438d3 1044 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1045 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1046 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1047 "device_name": "stm32l476rg"
switches 0:5c4d7b2438d3 1048 },
switches 0:5c4d7b2438d3 1049 "NUCLEO_L486RG": {
switches 0:5c4d7b2438d3 1050 "supported_form_factors": ["ARDUINO", "MORPHO"],
switches 0:5c4d7b2438d3 1051 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1052 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1053 "extra_labels": ["STM", "STM32L4", "STM32L486RG", "L476_L486"],
switches 0:5c4d7b2438d3 1054 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1055 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1056 "detect_code": ["0827"],
switches 0:5c4d7b2438d3 1057 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1058 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1059 "device_name": "stm32l486rg"
switches 0:5c4d7b2438d3 1060 },
switches 0:5c4d7b2438d3 1061 "STM32F3XX": {
switches 0:5c4d7b2438d3 1062 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1063 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 1064 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1065 "extra_labels": ["STM", "STM32F3XX"],
switches 0:5c4d7b2438d3 1066 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"]
switches 0:5c4d7b2438d3 1067 },
switches 0:5c4d7b2438d3 1068 "STM32F407": {
switches 0:5c4d7b2438d3 1069 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1070 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1071 "extra_labels": ["STM", "STM32F4", "STM32F4XX"],
switches 0:5c4d7b2438d3 1072 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"]
switches 0:5c4d7b2438d3 1073 },
switches 0:5c4d7b2438d3 1074 "ARCH_MAX": {
switches 0:5c4d7b2438d3 1075 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1076 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1077 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 1078 "program_cycle_s": 2,
switches 0:5c4d7b2438d3 1079 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
switches 0:5c4d7b2438d3 1080 "macros": ["LSI_VALUE=32000"],
switches 0:5c4d7b2438d3 1081 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1082 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1083 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1084 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1085 "device_name": "STM32F407VG"
switches 0:5c4d7b2438d3 1086 },
switches 0:5c4d7b2438d3 1087 "DISCO_F051R8": {
switches 0:5c4d7b2438d3 1088 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1089 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 1090 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1091 "extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
switches 0:5c4d7b2438d3 1092 "supported_toolchains": ["GCC_ARM"],
switches 0:5c4d7b2438d3 1093 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1094 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1095 "device_name": "STM32F051R8"
switches 0:5c4d7b2438d3 1096 },
switches 0:5c4d7b2438d3 1097 "DISCO_F100RB": {
switches 0:5c4d7b2438d3 1098 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1099 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1100 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1101 "extra_labels": ["STM", "STM32F1", "STM32F100RB"],
switches 0:5c4d7b2438d3 1102 "supported_toolchains": ["GCC_ARM"],
switches 0:5c4d7b2438d3 1103 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1104 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1105 "device_name": "STM32F100RB"
switches 0:5c4d7b2438d3 1106 },
switches 0:5c4d7b2438d3 1107 "DISCO_F303VC": {
switches 0:5c4d7b2438d3 1108 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1109 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1110 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1111 "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
switches 0:5c4d7b2438d3 1112 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1113 "supported_toolchains": ["GCC_ARM"],
switches 0:5c4d7b2438d3 1114 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1115 "device_name": "STM32F303VC"
switches 0:5c4d7b2438d3 1116 },
switches 0:5c4d7b2438d3 1117 "DISCO_F334C8": {
switches 0:5c4d7b2438d3 1118 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1119 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1120 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1121 "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
switches 0:5c4d7b2438d3 1122 "macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1123 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1124 "detect_code": ["0810"],
switches 0:5c4d7b2438d3 1125 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1126 "default_lib": "small",
switches 0:5c4d7b2438d3 1127 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1128 "device_name": "STM32F334C8"
switches 0:5c4d7b2438d3 1129 },
switches 0:5c4d7b2438d3 1130 "DISCO_F407VG": {
switches 0:5c4d7b2438d3 1131 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1132 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1133 "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"],
switches 0:5c4d7b2438d3 1134 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 1135 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1136 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1137 "device_name": "STM32F407VG"
switches 0:5c4d7b2438d3 1138 },
switches 0:5c4d7b2438d3 1139 "DISCO_F429ZI": {
switches 0:5c4d7b2438d3 1140 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1141 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1142 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1143 "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
switches 0:5c4d7b2438d3 1144 "macros": ["RTC_LSI=1","TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1145 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1146 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1147 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1148 "device_name": "STM32F429ZI"
switches 0:5c4d7b2438d3 1149 },
switches 0:5c4d7b2438d3 1150 "DISCO_F469NI": {
switches 0:5c4d7b2438d3 1151 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1152 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1153 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1154 "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI", "STM32F469xx"],
switches 0:5c4d7b2438d3 1155 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1156 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1157 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1158 "detect_code": ["0788"],
switches 0:5c4d7b2438d3 1159 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1160 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1161 "device_name": "STM32F469NI"
switches 0:5c4d7b2438d3 1162 },
switches 0:5c4d7b2438d3 1163 "DISCO_L053C8": {
switches 0:5c4d7b2438d3 1164 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1165 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 1166 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1167 "extra_labels": ["STM", "STM32L0", "STM32L053C8"],
switches 0:5c4d7b2438d3 1168 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1169 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1170 "default_lib": "small",
switches 0:5c4d7b2438d3 1171 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1172 "device_name": "STM32L053C8"
switches 0:5c4d7b2438d3 1173 },
switches 0:5c4d7b2438d3 1174 "DISCO_F746NG": {
switches 0:5c4d7b2438d3 1175 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1176 "core": "Cortex-M7F",
switches 0:5c4d7b2438d3 1177 "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"],
switches 0:5c4d7b2438d3 1178 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1179 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1180 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1181 "detect_code": ["0815"],
switches 0:5c4d7b2438d3 1182 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1183 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1184 "features": ["LWIP"],
switches 0:5c4d7b2438d3 1185 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1186 "device_name": "STM32F746NG"
switches 0:5c4d7b2438d3 1187 },
switches 0:5c4d7b2438d3 1188 "DISCO_F769NI": {
switches 0:5c4d7b2438d3 1189 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1190 "core": "Cortex-M7FD",
switches 0:5c4d7b2438d3 1191 "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
switches 0:5c4d7b2438d3 1192 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1193 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1194 "detect_code": ["0817"],
switches 0:5c4d7b2438d3 1195 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1196 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1197 "features": ["LWIP"],
switches 0:5c4d7b2438d3 1198 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1199 "device_name": "STM32F769NI"
switches 0:5c4d7b2438d3 1200 },
switches 0:5c4d7b2438d3 1201 "DISCO_L476VG": {
switches 0:5c4d7b2438d3 1202 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1203 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1204 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1205 "extra_labels": ["STM", "STM32L4", "STM32L476VG"],
switches 0:5c4d7b2438d3 1206 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1207 "detect_code": ["0820"],
switches 0:5c4d7b2438d3 1208 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1209 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1210 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1211 "device_name": "stm32l476vg"
switches 0:5c4d7b2438d3 1212 },
switches 0:5c4d7b2438d3 1213 "MTS_MDOT_F405RG": {
switches 0:5c4d7b2438d3 1214 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1215 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1216 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1217 "extra_labels": ["STM", "STM32F4", "STM32F405RG"],
switches 0:5c4d7b2438d3 1218 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 1219 "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1220 "progen": {"target": "mts-mdot-f405rg"},
switches 0:5c4d7b2438d3 1221 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1222 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1223 "device_name": "STM32F405RG"
switches 0:5c4d7b2438d3 1224 },
switches 0:5c4d7b2438d3 1225 "MTS_MDOT_F411RE": {
switches 0:5c4d7b2438d3 1226 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1227 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1228 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1229 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
switches 0:5c4d7b2438d3 1230 "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1231 "post_binary_hook": {
switches 0:5c4d7b2438d3 1232 "function": "MTSCode.combine_bins_mts_dot",
switches 0:5c4d7b2438d3 1233 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
switches 0:5c4d7b2438d3 1234 },
switches 0:5c4d7b2438d3 1235 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1236 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1237 "device_name": "STM32F411RE"
switches 0:5c4d7b2438d3 1238 },
switches 0:5c4d7b2438d3 1239 "MTS_DRAGONFLY_F411RE": {
switches 0:5c4d7b2438d3 1240 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1241 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1242 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1243 "extra_labels": ["STM", "STM32F4", "STM32F411RE"],
switches 0:5c4d7b2438d3 1244 "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1245 "post_binary_hook": {
switches 0:5c4d7b2438d3 1246 "function": "MTSCode.combine_bins_mts_dragonfly",
switches 0:5c4d7b2438d3 1247 "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]
switches 0:5c4d7b2438d3 1248 },
switches 0:5c4d7b2438d3 1249 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1250 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1251 "device_name": "STM32F411RE"
switches 0:5c4d7b2438d3 1252 },
switches 0:5c4d7b2438d3 1253 "XDOT_L151CC": {
switches 0:5c4d7b2438d3 1254 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1255 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1256 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1257 "extra_labels": ["STM", "STM32L1", "STM32L151CC"],
switches 0:5c4d7b2438d3 1258 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1259 "progen": {"target": "xdot-l151cc"},
switches 0:5c4d7b2438d3 1260 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1261 "default_lib": "std",
switches 0:5c4d7b2438d3 1262 "release_versions": ["5"]
switches 0:5c4d7b2438d3 1263 },
switches 0:5c4d7b2438d3 1264 "MOTE_L152RC": {
switches 0:5c4d7b2438d3 1265 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1266 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1267 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 1268 "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
switches 0:5c4d7b2438d3 1269 "macros": ["RTC_LSI=1"],
switches 0:5c4d7b2438d3 1270 "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
switches 0:5c4d7b2438d3 1271 "detect_code": ["4100"],
switches 0:5c4d7b2438d3 1272 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1273 "default_lib": "small",
switches 0:5c4d7b2438d3 1274 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1275 "device_name": "STM32L152RC"
switches 0:5c4d7b2438d3 1276 },
switches 0:5c4d7b2438d3 1277 "DISCO_F401VC": {
switches 0:5c4d7b2438d3 1278 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1279 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1280 "default_toolchain": "GCC_ARM",
switches 0:5c4d7b2438d3 1281 "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"],
switches 0:5c4d7b2438d3 1282 "supported_toolchains": ["GCC_ARM"],
switches 0:5c4d7b2438d3 1283 "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
switches 0:5c4d7b2438d3 1284 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1285 "device_name": "STM32F401VC"
switches 0:5c4d7b2438d3 1286 },
switches 0:5c4d7b2438d3 1287 "UBLOX_EVK_ODIN_W2": {
switches 0:5c4d7b2438d3 1288 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1289 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1290 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1291 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1292 "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx"],
switches 0:5c4d7b2438d3 1293 "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
switches 0:5c4d7b2438d3 1294 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1295 "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
switches 0:5c4d7b2438d3 1296 "features": ["LWIP"],
switches 0:5c4d7b2438d3 1297 "release_versions": ["5"],
switches 0:5c4d7b2438d3 1298 "device_name": "STM32F439ZI"
switches 0:5c4d7b2438d3 1299 },
switches 0:5c4d7b2438d3 1300 "NZ32_SC151": {
switches 0:5c4d7b2438d3 1301 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1302 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1303 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 1304 "program_cycle_s": 1.5,
switches 0:5c4d7b2438d3 1305 "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
switches 0:5c4d7b2438d3 1306 "macros": ["RTC_LSI=1"],
switches 0:5c4d7b2438d3 1307 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 1308 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1309 "default_lib": "small",
switches 0:5c4d7b2438d3 1310 "device_name": "STM32L151RC"
switches 0:5c4d7b2438d3 1311 },
switches 0:5c4d7b2438d3 1312 "MCU_NRF51": {
switches 0:5c4d7b2438d3 1313 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1314 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 1315 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
switches 0:5c4d7b2438d3 1316 "macros": ["NRF51", "TARGET_NRF51822"],
switches 0:5c4d7b2438d3 1317 "MERGE_BOOTLOADER": false,
switches 0:5c4d7b2438d3 1318 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
switches 0:5c4d7b2438d3 1319 "OUTPUT_EXT": "hex",
switches 0:5c4d7b2438d3 1320 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 1321 "supported_toolchains": ["ARM", "GCC_ARM"],
switches 0:5c4d7b2438d3 1322 "public": false,
switches 0:5c4d7b2438d3 1323 "MERGE_SOFT_DEVICE": true,
switches 0:5c4d7b2438d3 1324 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
switches 0:5c4d7b2438d3 1325 {
switches 0:5c4d7b2438d3 1326 "boot": "s130_nrf51_1.0.0_bootloader.hex",
switches 0:5c4d7b2438d3 1327 "name": "s130_nrf51_1.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 1328 "offset": 114688
switches 0:5c4d7b2438d3 1329 },
switches 0:5c4d7b2438d3 1330 {
switches 0:5c4d7b2438d3 1331 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
switches 0:5c4d7b2438d3 1332 "name": "s110_nrf51822_8.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 1333 "offset": 98304
switches 0:5c4d7b2438d3 1334 },
switches 0:5c4d7b2438d3 1335 {
switches 0:5c4d7b2438d3 1336 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
switches 0:5c4d7b2438d3 1337 "name": "s110_nrf51822_7.1.0_softdevice.hex",
switches 0:5c4d7b2438d3 1338 "offset": 90112
switches 0:5c4d7b2438d3 1339 },
switches 0:5c4d7b2438d3 1340 {
switches 0:5c4d7b2438d3 1341 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
switches 0:5c4d7b2438d3 1342 "name": "s110_nrf51822_7.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 1343 "offset": 90112
switches 0:5c4d7b2438d3 1344 },
switches 0:5c4d7b2438d3 1345 {
switches 0:5c4d7b2438d3 1346 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
switches 0:5c4d7b2438d3 1347 "name": "s110_nrf51822_6.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 1348 "offset": 81920
switches 0:5c4d7b2438d3 1349 }
switches 0:5c4d7b2438d3 1350 ],
switches 0:5c4d7b2438d3 1351 "detect_code": ["1070"],
switches 0:5c4d7b2438d3 1352 "post_binary_hook": {
switches 0:5c4d7b2438d3 1353 "function": "MCU_NRF51Code.binary_hook",
switches 0:5c4d7b2438d3 1354 "toolchains": ["ARM_STD", "GCC_ARM"]
switches 0:5c4d7b2438d3 1355 },
switches 0:5c4d7b2438d3 1356 "program_cycle_s": 6,
switches 0:5c4d7b2438d3 1357 "features": ["BLE"],
switches 0:5c4d7b2438d3 1358 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
switches 0:5c4d7b2438d3 1359 },
switches 0:5c4d7b2438d3 1360 "MCU_NRF51_16K_BASE": {
switches 0:5c4d7b2438d3 1361 "inherits": ["MCU_NRF51"],
switches 0:5c4d7b2438d3 1362 "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1363 "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1364 "public": false,
switches 0:5c4d7b2438d3 1365 "default_lib": "small"
switches 0:5c4d7b2438d3 1366 },
switches 0:5c4d7b2438d3 1367 "MCU_NRF51_16K_BOOT_BASE": {
switches 0:5c4d7b2438d3 1368 "inherits": ["MCU_NRF51_16K_BASE"],
switches 0:5c4d7b2438d3 1369 "MERGE_BOOTLOADER": true,
switches 0:5c4d7b2438d3 1370 "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1371 "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
switches 0:5c4d7b2438d3 1372 "public": false
switches 0:5c4d7b2438d3 1373 },
switches 0:5c4d7b2438d3 1374 "MCU_NRF51_16K_OTA_BASE": {
switches 0:5c4d7b2438d3 1375 "inherits": ["MCU_NRF51_16K_BASE"],
switches 0:5c4d7b2438d3 1376 "public": false,
switches 0:5c4d7b2438d3 1377 "extra_labels_add": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1378 "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
switches 0:5c4d7b2438d3 1379 "MERGE_SOFT_DEVICE": false
switches 0:5c4d7b2438d3 1380 },
switches 0:5c4d7b2438d3 1381 "MCU_NRF51_16K": {
switches 0:5c4d7b2438d3 1382 "inherits": ["MCU_NRF51_16K_BASE"],
switches 0:5c4d7b2438d3 1383 "extra_labels_add": ["MCU_NRF51_16K_S130"],
switches 0:5c4d7b2438d3 1384 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
switches 0:5c4d7b2438d3 1385 "public": false
switches 0:5c4d7b2438d3 1386 },
switches 0:5c4d7b2438d3 1387 "MCU_NRF51_S110": {
switches 0:5c4d7b2438d3 1388 "extra_labels_add": ["MCU_NRF51_16K_S110"],
switches 0:5c4d7b2438d3 1389 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
switches 0:5c4d7b2438d3 1390 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
switches 0:5c4d7b2438d3 1391 {
switches 0:5c4d7b2438d3 1392 "name": "s110_nrf51822_8.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 1393 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
switches 0:5c4d7b2438d3 1394 "offset": 98304
switches 0:5c4d7b2438d3 1395 },
switches 0:5c4d7b2438d3 1396 {
switches 0:5c4d7b2438d3 1397 "name": "s110_nrf51822_7.1.0_softdevice.hex",
switches 0:5c4d7b2438d3 1398 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
switches 0:5c4d7b2438d3 1399 "offset": 90112
switches 0:5c4d7b2438d3 1400 }
switches 0:5c4d7b2438d3 1401 ],
switches 0:5c4d7b2438d3 1402 "public": false
switches 0:5c4d7b2438d3 1403 },
switches 0:5c4d7b2438d3 1404 "MCU_NRF51_16K_S110": {
switches 0:5c4d7b2438d3 1405 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
switches 0:5c4d7b2438d3 1406 "public": false
switches 0:5c4d7b2438d3 1407 },
switches 0:5c4d7b2438d3 1408 "MCU_NRF51_16K_BOOT": {
switches 0:5c4d7b2438d3 1409 "inherits": ["MCU_NRF51_16K_BOOT_BASE"],
switches 0:5c4d7b2438d3 1410 "extra_labels_add": ["MCU_NRF51_16K_S130"],
switches 0:5c4d7b2438d3 1411 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
switches 0:5c4d7b2438d3 1412 "public": false
switches 0:5c4d7b2438d3 1413 },
switches 0:5c4d7b2438d3 1414 "MCU_NRF51_16K_BOOT_S110": {
switches 0:5c4d7b2438d3 1415 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
switches 0:5c4d7b2438d3 1416 "public": false
switches 0:5c4d7b2438d3 1417 },
switches 0:5c4d7b2438d3 1418 "MCU_NRF51_16K_OTA": {
switches 0:5c4d7b2438d3 1419 "inherits": ["MCU_NRF51_16K_OTA_BASE"],
switches 0:5c4d7b2438d3 1420 "extra_labels_add": ["MCU_NRF51_16K_S130"],
switches 0:5c4d7b2438d3 1421 "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
switches 0:5c4d7b2438d3 1422 "public": false
switches 0:5c4d7b2438d3 1423 },
switches 0:5c4d7b2438d3 1424 "MCU_NRF51_16K_OTA_S110": {
switches 0:5c4d7b2438d3 1425 "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
switches 0:5c4d7b2438d3 1426 "public": false
switches 0:5c4d7b2438d3 1427 },
switches 0:5c4d7b2438d3 1428 "MCU_NRF51_32K": {
switches 0:5c4d7b2438d3 1429 "inherits": ["MCU_NRF51"],
switches 0:5c4d7b2438d3 1430 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1431 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1432 "public": false
switches 0:5c4d7b2438d3 1433 },
switches 0:5c4d7b2438d3 1434 "MCU_NRF51_32K_BOOT": {
switches 0:5c4d7b2438d3 1435 "inherits": ["MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1436 "MERGE_BOOTLOADER": true,
switches 0:5c4d7b2438d3 1437 "extra_labels_add": ["MCU_NRF51_32K_BOOT"],
switches 0:5c4d7b2438d3 1438 "macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
switches 0:5c4d7b2438d3 1439 "public": false
switches 0:5c4d7b2438d3 1440 },
switches 0:5c4d7b2438d3 1441 "MCU_NRF51_32K_OTA": {
switches 0:5c4d7b2438d3 1442 "inherits": ["MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1443 "public": false,
switches 0:5c4d7b2438d3 1444 "extra_labels_add": ["MCU_NRF51_32K_OTA"],
switches 0:5c4d7b2438d3 1445 "macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
switches 0:5c4d7b2438d3 1446 "MERGE_SOFT_DEVICE": false
switches 0:5c4d7b2438d3 1447 },
switches 0:5c4d7b2438d3 1448 "NRF51822": {
switches 0:5c4d7b2438d3 1449 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1450 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
switches 0:5c4d7b2438d3 1451 "macros_add": ["TARGET_NRF51822_MKIT"],
switches 0:5c4d7b2438d3 1452 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1453 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1454 },
switches 0:5c4d7b2438d3 1455 "NRF51822_BOOT": {
switches 0:5c4d7b2438d3 1456 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1457 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
switches 0:5c4d7b2438d3 1458 "macros_add": ["TARGET_NRF51822_MKIT"]
switches 0:5c4d7b2438d3 1459 },
switches 0:5c4d7b2438d3 1460 "NRF51822_OTA": {
switches 0:5c4d7b2438d3 1461 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1462 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
switches 0:5c4d7b2438d3 1463 "macros_add": ["TARGET_NRF51822_MKIT"]
switches 0:5c4d7b2438d3 1464 },
switches 0:5c4d7b2438d3 1465 "ARCH_BLE": {
switches 0:5c4d7b2438d3 1466 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1467 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1468 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1469 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1470 },
switches 0:5c4d7b2438d3 1471 "ARCH_BLE_BOOT": {
switches 0:5c4d7b2438d3 1472 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1473 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1474 "extra_labels_add": ["ARCH_BLE"],
switches 0:5c4d7b2438d3 1475 "macros_add": ["TARGET_ARCH_BLE"]
switches 0:5c4d7b2438d3 1476 },
switches 0:5c4d7b2438d3 1477 "ARCH_BLE_OTA": {
switches 0:5c4d7b2438d3 1478 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1479 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1480 "extra_labels_add": ["ARCH_BLE"],
switches 0:5c4d7b2438d3 1481 "macros_add": ["TARGET_ARCH_BLE"]
switches 0:5c4d7b2438d3 1482 },
switches 0:5c4d7b2438d3 1483 "ARCH_LINK": {
switches 0:5c4d7b2438d3 1484 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1485 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1486 "extra_labels_add": ["ARCH_BLE"],
switches 0:5c4d7b2438d3 1487 "macros_add": ["TARGET_ARCH_BLE"]
switches 0:5c4d7b2438d3 1488 },
switches 0:5c4d7b2438d3 1489 "ARCH_LINK_BOOT": {
switches 0:5c4d7b2438d3 1490 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1491 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1492 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
switches 0:5c4d7b2438d3 1493 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
switches 0:5c4d7b2438d3 1494 },
switches 0:5c4d7b2438d3 1495 "ARCH_LINK_OTA": {
switches 0:5c4d7b2438d3 1496 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1497 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1498 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
switches 0:5c4d7b2438d3 1499 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
switches 0:5c4d7b2438d3 1500 },
switches 0:5c4d7b2438d3 1501 "SEEED_TINY_BLE": {
switches 0:5c4d7b2438d3 1502 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1503 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1504 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1505 },
switches 0:5c4d7b2438d3 1506 "SEEED_TINY_BLE_BOOT": {
switches 0:5c4d7b2438d3 1507 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1508 "extra_labels_add": ["SEEED_TINY_BLE"],
switches 0:5c4d7b2438d3 1509 "macros_add": ["TARGET_SEEED_TINY_BLE"]
switches 0:5c4d7b2438d3 1510 },
switches 0:5c4d7b2438d3 1511 "SEEED_TINY_BLE_OTA": {
switches 0:5c4d7b2438d3 1512 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1513 "extra_labels_add": ["SEEED_TINY_BLE"],
switches 0:5c4d7b2438d3 1514 "macros_add": ["TARGET_SEEED_TINY_BLE"]
switches 0:5c4d7b2438d3 1515 },
switches 0:5c4d7b2438d3 1516 "HRM1017": {
switches 0:5c4d7b2438d3 1517 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1518 "macros_add": ["TARGET_NRF_LFCLK_RC"],
switches 0:5c4d7b2438d3 1519 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1520 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1521 },
switches 0:5c4d7b2438d3 1522 "HRM1017_BOOT": {
switches 0:5c4d7b2438d3 1523 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1524 "extra_labels_add": ["HRM1017"],
switches 0:5c4d7b2438d3 1525 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1526 },
switches 0:5c4d7b2438d3 1527 "HRM1017_OTA": {
switches 0:5c4d7b2438d3 1528 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1529 "extra_labels_add": ["HRM1017"],
switches 0:5c4d7b2438d3 1530 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1531 },
switches 0:5c4d7b2438d3 1532 "RBLAB_NRF51822": {
switches 0:5c4d7b2438d3 1533 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1534 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1535 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1536 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1537 },
switches 0:5c4d7b2438d3 1538 "RBLAB_NRF51822_BOOT": {
switches 0:5c4d7b2438d3 1539 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1540 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1541 "extra_labels_add": ["RBLAB_NRF51822"],
switches 0:5c4d7b2438d3 1542 "macros_add": ["TARGET_RBLAB_NRF51822"]
switches 0:5c4d7b2438d3 1543 },
switches 0:5c4d7b2438d3 1544 "RBLAB_NRF51822_OTA": {
switches 0:5c4d7b2438d3 1545 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1546 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1547 "extra_labels_add": ["RBLAB_NRF51822"],
switches 0:5c4d7b2438d3 1548 "macros_add": ["TARGET_RBLAB_NRF51822"]
switches 0:5c4d7b2438d3 1549 },
switches 0:5c4d7b2438d3 1550 "RBLAB_BLENANO": {
switches 0:5c4d7b2438d3 1551 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1552 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1553 },
switches 0:5c4d7b2438d3 1554 "RBLAB_BLENANO_BOOT": {
switches 0:5c4d7b2438d3 1555 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1556 "extra_labels_add": ["RBLAB_BLENANO"],
switches 0:5c4d7b2438d3 1557 "macros_add": ["TARGET_RBLAB_BLENANO"]
switches 0:5c4d7b2438d3 1558 },
switches 0:5c4d7b2438d3 1559 "RBLAB_BLENANO_OTA": {
switches 0:5c4d7b2438d3 1560 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1561 "extra_labels_add": ["RBLAB_BLENANO"],
switches 0:5c4d7b2438d3 1562 "macros_add": ["TARGET_RBLAB_BLENANO"]
switches 0:5c4d7b2438d3 1563 },
switches 0:5c4d7b2438d3 1564 "NRF51822_Y5_MBUG": {
switches 0:5c4d7b2438d3 1565 "inherits": ["MCU_NRF51_16K"]
switches 0:5c4d7b2438d3 1566 },
switches 0:5c4d7b2438d3 1567 "WALLBOT_BLE": {
switches 0:5c4d7b2438d3 1568 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1569 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1570 },
switches 0:5c4d7b2438d3 1571 "WALLBOT_BLE_BOOT": {
switches 0:5c4d7b2438d3 1572 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1573 "extra_labels_add": ["WALLBOT_BLE"],
switches 0:5c4d7b2438d3 1574 "macros_add": ["TARGET_WALLBOT_BLE"]
switches 0:5c4d7b2438d3 1575 },
switches 0:5c4d7b2438d3 1576 "WALLBOT_BLE_OTA": {
switches 0:5c4d7b2438d3 1577 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1578 "extra_labels_add": ["WALLBOT_BLE"],
switches 0:5c4d7b2438d3 1579 "macros_add": ["TARGET_WALLBOT_BLE"]
switches 0:5c4d7b2438d3 1580 },
switches 0:5c4d7b2438d3 1581 "DELTA_DFCM_NNN40": {
switches 0:5c4d7b2438d3 1582 "inherits": ["MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1583 "program_cycle_s": 10,
switches 0:5c4d7b2438d3 1584 "macros_add": ["TARGET_NRF_LFCLK_RC"],
switches 0:5c4d7b2438d3 1585 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
switches 0:5c4d7b2438d3 1586 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1587 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1588 },
switches 0:5c4d7b2438d3 1589 "DELTA_DFCM_NNN40_BOOT": {
switches 0:5c4d7b2438d3 1590 "inherits": ["MCU_NRF51_32K_BOOT"],
switches 0:5c4d7b2438d3 1591 "program_cycle_s": 10,
switches 0:5c4d7b2438d3 1592 "extra_labels_add": ["DELTA_DFCM_NNN40"],
switches 0:5c4d7b2438d3 1593 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1594 },
switches 0:5c4d7b2438d3 1595 "DELTA_DFCM_NNN40_OTA": {
switches 0:5c4d7b2438d3 1596 "inherits": ["MCU_NRF51_32K_OTA"],
switches 0:5c4d7b2438d3 1597 "program_cycle_s": 10,
switches 0:5c4d7b2438d3 1598 "extra_labels_add": ["DELTA_DFCM_NNN40"],
switches 0:5c4d7b2438d3 1599 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1600 },
switches 0:5c4d7b2438d3 1601 "NRF51_DK_LEGACY": {
switches 0:5c4d7b2438d3 1602 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1603 "inherits": ["MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1604 "extra_labels_add": ["NRF51_DK"]
switches 0:5c4d7b2438d3 1605 },
switches 0:5c4d7b2438d3 1606 "NRF51_DK_BOOT": {
switches 0:5c4d7b2438d3 1607 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1608 "inherits": ["MCU_NRF51_32K_BOOT"],
switches 0:5c4d7b2438d3 1609 "extra_labels_add": ["NRF51_DK"],
switches 0:5c4d7b2438d3 1610 "macros_add": ["TARGET_NRF51_DK"]
switches 0:5c4d7b2438d3 1611 },
switches 0:5c4d7b2438d3 1612 "NRF51_DK_OTA": {
switches 0:5c4d7b2438d3 1613 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1614 "inherits": ["MCU_NRF51_32K_OTA"],
switches 0:5c4d7b2438d3 1615 "extra_labels_add": ["NRF51_DK"],
switches 0:5c4d7b2438d3 1616 "macros_add": ["TARGET_NRF51_DK"]
switches 0:5c4d7b2438d3 1617 },
switches 0:5c4d7b2438d3 1618 "NRF51_DONGLE_LEGACY": {
switches 0:5c4d7b2438d3 1619 "inherits": ["MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1620 "extra_labels_add": ["NRF51_DONGLE"],
switches 0:5c4d7b2438d3 1621 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1622 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1623 },
switches 0:5c4d7b2438d3 1624 "NRF51_DONGLE_BOOT": {
switches 0:5c4d7b2438d3 1625 "inherits": ["MCU_NRF51_32K_BOOT"],
switches 0:5c4d7b2438d3 1626 "extra_labels_add": ["NRF51_DONGLE"],
switches 0:5c4d7b2438d3 1627 "macros_add": ["TARGET_NRF51_DONGLE"]
switches 0:5c4d7b2438d3 1628 },
switches 0:5c4d7b2438d3 1629 "NRF51_DONGLE_OTA": {
switches 0:5c4d7b2438d3 1630 "inherits": ["MCU_NRF51_32K_OTA"],
switches 0:5c4d7b2438d3 1631 "extra_labels_add": ["NRF51_DONGLE"],
switches 0:5c4d7b2438d3 1632 "macros_add": ["TARGET_NRF51_DONGLE"]
switches 0:5c4d7b2438d3 1633 },
switches 0:5c4d7b2438d3 1634 "NRF51_MICROBIT": {
switches 0:5c4d7b2438d3 1635 "inherits": ["MCU_NRF51_16K_S110"],
switches 0:5c4d7b2438d3 1636 "macros_add": ["TARGET_NRF_LFCLK_RC"],
switches 0:5c4d7b2438d3 1637 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1638 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1639 },
switches 0:5c4d7b2438d3 1640 "NRF51_MICROBIT_BOOT": {
switches 0:5c4d7b2438d3 1641 "inherits": ["MCU_NRF51_16K_BOOT_S110"],
switches 0:5c4d7b2438d3 1642 "extra_labels_add": ["NRF51_MICROBIT"],
switches 0:5c4d7b2438d3 1643 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1644 },
switches 0:5c4d7b2438d3 1645 "NRF51_MICROBIT_OTA": {
switches 0:5c4d7b2438d3 1646 "inherits": ["MCU_NRF51_16K_OTA_S110"],
switches 0:5c4d7b2438d3 1647 "extra_labels_add": ["NRF51_MICROBIT"],
switches 0:5c4d7b2438d3 1648 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1649 },
switches 0:5c4d7b2438d3 1650 "NRF51_MICROBIT_B": {
switches 0:5c4d7b2438d3 1651 "inherits": ["MCU_NRF51_16K"],
switches 0:5c4d7b2438d3 1652 "extra_labels_add": ["NRF51_MICROBIT"],
switches 0:5c4d7b2438d3 1653 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
switches 0:5c4d7b2438d3 1654 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1655 },
switches 0:5c4d7b2438d3 1656 "NRF51_MICROBIT_B_BOOT": {
switches 0:5c4d7b2438d3 1657 "inherits": ["MCU_NRF51_16K_BOOT"],
switches 0:5c4d7b2438d3 1658 "extra_labels_add": ["NRF51_MICROBIT"],
switches 0:5c4d7b2438d3 1659 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1660 },
switches 0:5c4d7b2438d3 1661 "NRF51_MICROBIT_B_OTA": {
switches 0:5c4d7b2438d3 1662 "inherits": ["MCU_NRF51_16K_OTA"],
switches 0:5c4d7b2438d3 1663 "extra_labels_add": ["NRF51_MICROBIT"],
switches 0:5c4d7b2438d3 1664 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
switches 0:5c4d7b2438d3 1665 },
switches 0:5c4d7b2438d3 1666 "MTM_MTCONNECT04S": {
switches 0:5c4d7b2438d3 1667 "inherits": ["MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 1668 "release_versions": ["2"],
switches 0:5c4d7b2438d3 1669 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1670 },
switches 0:5c4d7b2438d3 1671 "MTM_MTCONNECT04S_BOOT": {
switches 0:5c4d7b2438d3 1672 "inherits": ["MCU_NRF51_32K_BOOT"],
switches 0:5c4d7b2438d3 1673 "extra_labels_add": ["MTM_CONNECT04S"],
switches 0:5c4d7b2438d3 1674 "macros_add": ["TARGET_MTM_CONNECT04S"]
switches 0:5c4d7b2438d3 1675 },
switches 0:5c4d7b2438d3 1676 "MTM_MTCONNECT04S_OTA": {
switches 0:5c4d7b2438d3 1677 "inherits": ["MCU_NRF51_32K_OTA"],
switches 0:5c4d7b2438d3 1678 "extra_labels_add": ["MTM_CONNECT04S"],
switches 0:5c4d7b2438d3 1679 "macros_add": ["TARGET_MTM_CONNECT04S"]
switches 0:5c4d7b2438d3 1680 },
switches 0:5c4d7b2438d3 1681 "TY51822R3": {
switches 0:5c4d7b2438d3 1682 "inherits": ["MCU_NRF51_32K_UNIFIED"],
switches 0:5c4d7b2438d3 1683 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
switches 0:5c4d7b2438d3 1684 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
switches 0:5c4d7b2438d3 1685 "detect_code": ["1019"],
switches 0:5c4d7b2438d3 1686 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1687 "overrides": {"uart_hwfc": 0},
switches 0:5c4d7b2438d3 1688 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 1689 },
switches 0:5c4d7b2438d3 1690 "TY51822R3_BOOT": {
switches 0:5c4d7b2438d3 1691 "inherits": ["MCU_NRF51_32K_BOOT"],
switches 0:5c4d7b2438d3 1692 "extra_labels_add": ["TY51822R3"],
switches 0:5c4d7b2438d3 1693 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
switches 0:5c4d7b2438d3 1694 },
switches 0:5c4d7b2438d3 1695 "TY51822R3_OTA": {
switches 0:5c4d7b2438d3 1696 "inherits": ["MCU_NRF51_32K_OTA"],
switches 0:5c4d7b2438d3 1697 "extra_labels_add": ["NRF51_DK"],
switches 0:5c4d7b2438d3 1698 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
switches 0:5c4d7b2438d3 1699 },
switches 0:5c4d7b2438d3 1700 "ARM_MPS2_Target": {
switches 0:5c4d7b2438d3 1701 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1702 "public": false,
switches 0:5c4d7b2438d3 1703 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
switches 0:5c4d7b2438d3 1704 },
switches 0:5c4d7b2438d3 1705 "ARM_MPS2_M0": {
switches 0:5c4d7b2438d3 1706 "inherits": ["ARM_MPS2_Target"],
switches 0:5c4d7b2438d3 1707 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 1708 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1709 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
switches 0:5c4d7b2438d3 1710 "macros": ["CMSDK_CM0"],
switches 0:5c4d7b2438d3 1711 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
switches 0:5c4d7b2438d3 1712 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1713 },
switches 0:5c4d7b2438d3 1714 "ARM_MPS2_M0P": {
switches 0:5c4d7b2438d3 1715 "inherits": ["ARM_MPS2_Target"],
switches 0:5c4d7b2438d3 1716 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 1717 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1718 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
switches 0:5c4d7b2438d3 1719 "macros": ["CMSDK_CM0plus"],
switches 0:5c4d7b2438d3 1720 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
switches 0:5c4d7b2438d3 1721 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1722 },
switches 0:5c4d7b2438d3 1723 "ARM_MPS2_M1": {
switches 0:5c4d7b2438d3 1724 "inherits": ["ARM_MPS2_Target"],
switches 0:5c4d7b2438d3 1725 "core": "Cortex-M1",
switches 0:5c4d7b2438d3 1726 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1727 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M1"],
switches 0:5c4d7b2438d3 1728 "macros": ["CMSDK_CM1"],
switches 0:5c4d7b2438d3 1729 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
switches 0:5c4d7b2438d3 1730 },
switches 0:5c4d7b2438d3 1731 "ARM_MPS2_M3": {
switches 0:5c4d7b2438d3 1732 "inherits": ["ARM_MPS2_Target"],
switches 0:5c4d7b2438d3 1733 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1734 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1735 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
switches 0:5c4d7b2438d3 1736 "macros": ["CMSDK_CM3"],
switches 0:5c4d7b2438d3 1737 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
switches 0:5c4d7b2438d3 1738 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1739 },
switches 0:5c4d7b2438d3 1740 "ARM_MPS2_M4": {
switches 0:5c4d7b2438d3 1741 "inherits": ["ARM_MPS2_Target"],
switches 0:5c4d7b2438d3 1742 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1743 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1744 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
switches 0:5c4d7b2438d3 1745 "macros": ["CMSDK_CM4"],
switches 0:5c4d7b2438d3 1746 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
switches 0:5c4d7b2438d3 1747 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1748 },
switches 0:5c4d7b2438d3 1749 "ARM_MPS2_M7": {
switches 0:5c4d7b2438d3 1750 "inherits": ["ARM_MPS2_Target"],
switches 0:5c4d7b2438d3 1751 "core": "Cortex-M7",
switches 0:5c4d7b2438d3 1752 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1753 "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
switches 0:5c4d7b2438d3 1754 "macros": ["CMSDK_CM7"],
switches 0:5c4d7b2438d3 1755 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
switches 0:5c4d7b2438d3 1756 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1757 },
switches 0:5c4d7b2438d3 1758 "ARM_IOTSS_Target": {
switches 0:5c4d7b2438d3 1759 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1760 "public": false,
switches 0:5c4d7b2438d3 1761 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
switches 0:5c4d7b2438d3 1762 },
switches 0:5c4d7b2438d3 1763 "ARM_IOTSS_BEID": {
switches 0:5c4d7b2438d3 1764 "inherits": ["ARM_IOTSS_Target"],
switches 0:5c4d7b2438d3 1765 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1766 "supported_toolchains": ["ARM"],
switches 0:5c4d7b2438d3 1767 "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
switches 0:5c4d7b2438d3 1768 "macros": ["CMSDK_BEID"],
switches 0:5c4d7b2438d3 1769 "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
switches 0:5c4d7b2438d3 1770 "release_versions": ["2"]
switches 0:5c4d7b2438d3 1771 },
switches 0:5c4d7b2438d3 1772 "ARM_BEETLE_SOC": {
switches 0:5c4d7b2438d3 1773 "inherits": ["ARM_IOTSS_Target"],
switches 0:5c4d7b2438d3 1774 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1775 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1776 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1777 "extra_labels": ["ARM_SSG", "BEETLE"],
switches 0:5c4d7b2438d3 1778 "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
switches 0:5c4d7b2438d3 1779 "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
switches 0:5c4d7b2438d3 1780 "features": ["BLE"],
switches 0:5c4d7b2438d3 1781 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1782 "device_name": "beetle"
switches 0:5c4d7b2438d3 1783 },
switches 0:5c4d7b2438d3 1784 "RZ_A1H": {
switches 0:5c4d7b2438d3 1785 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 1786 "core": "Cortex-A9",
switches 0:5c4d7b2438d3 1787 "program_cycle_s": 2,
switches 0:5c4d7b2438d3 1788 "extra_labels": ["RENESAS", "MBRZA1H"],
switches 0:5c4d7b2438d3 1789 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1790 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1791 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1792 "features": ["LWIP"],
switches 0:5c4d7b2438d3 1793 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1794 "device_name": "r7s721001"
switches 0:5c4d7b2438d3 1795 },
switches 0:5c4d7b2438d3 1796 "VK_RZ_A1H": {
switches 0:5c4d7b2438d3 1797 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1798 "core": "Cortex-A9",
switches 0:5c4d7b2438d3 1799 "extra_labels": ["RENESAS", "VKRZA1H"],
switches 0:5c4d7b2438d3 1800 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 1801 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 1802 "program_cycle_s": 2,
switches 0:5c4d7b2438d3 1803 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1804 "features": ["LWIP"],
switches 0:5c4d7b2438d3 1805 "default_lib": "std",
switches 0:5c4d7b2438d3 1806 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 1807 },
switches 0:5c4d7b2438d3 1808 "MAXWSNENV": {
switches 0:5c4d7b2438d3 1809 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1810 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1811 "macros": ["__SYSTEM_HFX=24000000"],
switches 0:5c4d7b2438d3 1812 "extra_labels": ["Maxim", "MAX32610"],
switches 0:5c4d7b2438d3 1813 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
switches 0:5c4d7b2438d3 1814 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1815 "features": ["BLE"],
switches 0:5c4d7b2438d3 1816 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 1817 },
switches 0:5c4d7b2438d3 1818 "MAX32600MBED": {
switches 0:5c4d7b2438d3 1819 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1820 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1821 "macros": ["__SYSTEM_HFX=24000000"],
switches 0:5c4d7b2438d3 1822 "extra_labels": ["Maxim", "MAX32600"],
switches 0:5c4d7b2438d3 1823 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
switches 0:5c4d7b2438d3 1824 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1825 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1826 "device_name": "max326000x85"
switches 0:5c4d7b2438d3 1827 },
switches 0:5c4d7b2438d3 1828 "MAX32620HSP": {
switches 0:5c4d7b2438d3 1829 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1830 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1831 "extra_labels": ["Maxim", "MAX32620"],
switches 0:5c4d7b2438d3 1832 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
switches 0:5c4d7b2438d3 1833 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1834 "features": ["BLE"],
switches 0:5c4d7b2438d3 1835 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 1836 },
switches 0:5c4d7b2438d3 1837 "MAX32625MBED": {
switches 0:5c4d7b2438d3 1838 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1839 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1840 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
switches 0:5c4d7b2438d3 1841 "extra_labels": ["Maxim", "MAX32625"],
switches 0:5c4d7b2438d3 1842 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
switches 0:5c4d7b2438d3 1843 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1844 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 1845 },
switches 0:5c4d7b2438d3 1846 "MAX32625NEXPAQ": {
switches 0:5c4d7b2438d3 1847 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1848 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1849 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
switches 0:5c4d7b2438d3 1850 "extra_labels": ["Maxim", "MAX32625"],
switches 0:5c4d7b2438d3 1851 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
switches 0:5c4d7b2438d3 1852 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1853 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 1854 },
switches 0:5c4d7b2438d3 1855 "MAX32630FTHR": {
switches 0:5c4d7b2438d3 1856 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1857 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1858 "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132"],
switches 0:5c4d7b2438d3 1859 "extra_labels": ["Maxim", "MAX32630"],
switches 0:5c4d7b2438d3 1860 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
switches 0:5c4d7b2438d3 1861 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1862 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 1863 },
switches 0:5c4d7b2438d3 1864 "EFM32": {
switches 0:5c4d7b2438d3 1865 "inherits": ["Target"],
switches 0:5c4d7b2438d3 1866 "extra_labels": ["Silicon_Labs", "EFM32"],
switches 0:5c4d7b2438d3 1867 "public": false
switches 0:5c4d7b2438d3 1868 },
switches 0:5c4d7b2438d3 1869 "EFM32GG990F1024": {
switches 0:5c4d7b2438d3 1870 "inherits": ["EFM32"],
switches 0:5c4d7b2438d3 1871 "extra_labels_add": ["EFM32GG", "1024K"],
switches 0:5c4d7b2438d3 1872 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1873 "macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
switches 0:5c4d7b2438d3 1874 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
switches 0:5c4d7b2438d3 1875 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1876 "device_name": "EFM32GG990F1024",
switches 0:5c4d7b2438d3 1877 "public": false
switches 0:5c4d7b2438d3 1878 },
switches 0:5c4d7b2438d3 1879 "EFM32GG_STK3700": {
switches 0:5c4d7b2438d3 1880 "inherits": ["EFM32GG990F1024"],
switches 0:5c4d7b2438d3 1881 "progen": {"target": "efm32gg-stk"},
switches 0:5c4d7b2438d3 1882 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1883 "forced_reset_timeout": 2,
switches 0:5c4d7b2438d3 1884 "config": {
switches 0:5c4d7b2438d3 1885 "hf_clock_src": {
switches 0:5c4d7b2438d3 1886 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
switches 0:5c4d7b2438d3 1887 "value": "HFXO",
switches 0:5c4d7b2438d3 1888 "macro_name": "CORE_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 1889 },
switches 0:5c4d7b2438d3 1890 "hfxo_clock_freq": {
switches 0:5c4d7b2438d3 1891 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 1892 "value": "48000000",
switches 0:5c4d7b2438d3 1893 "macro_name": "HFXO_FREQUENCY"
switches 0:5c4d7b2438d3 1894 },
switches 0:5c4d7b2438d3 1895 "lf_clock_src": {
switches 0:5c4d7b2438d3 1896 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
switches 0:5c4d7b2438d3 1897 "value": "LFXO",
switches 0:5c4d7b2438d3 1898 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 1899 },
switches 0:5c4d7b2438d3 1900 "lfxo_clock_freq": {
switches 0:5c4d7b2438d3 1901 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 1902 "value": "32768",
switches 0:5c4d7b2438d3 1903 "macro_name": "LFXO_FREQUENCY"
switches 0:5c4d7b2438d3 1904 },
switches 0:5c4d7b2438d3 1905 "hfrco_clock_freq": {
switches 0:5c4d7b2438d3 1906 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
switches 0:5c4d7b2438d3 1907 "value": "21000000",
switches 0:5c4d7b2438d3 1908 "macro_name": "HFRCO_FREQUENCY"
switches 0:5c4d7b2438d3 1909 },
switches 0:5c4d7b2438d3 1910 "hfrco_band_select": {
switches 0:5c4d7b2438d3 1911 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
switches 0:5c4d7b2438d3 1912 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
switches 0:5c4d7b2438d3 1913 "macro_name": "HFRCO_FREQUENCY_ENUM"
switches 0:5c4d7b2438d3 1914 }
switches 0:5c4d7b2438d3 1915 }
switches 0:5c4d7b2438d3 1916 },
switches 0:5c4d7b2438d3 1917 "EFM32LG990F256": {
switches 0:5c4d7b2438d3 1918 "inherits": ["EFM32"],
switches 0:5c4d7b2438d3 1919 "extra_labels_add": ["EFM32LG", "256K"],
switches 0:5c4d7b2438d3 1920 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 1921 "macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
switches 0:5c4d7b2438d3 1922 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
switches 0:5c4d7b2438d3 1923 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1924 "device_name": "EFM32LG990F256",
switches 0:5c4d7b2438d3 1925 "public": false
switches 0:5c4d7b2438d3 1926 },
switches 0:5c4d7b2438d3 1927 "EFM32LG_STK3600": {
switches 0:5c4d7b2438d3 1928 "inherits": ["EFM32LG990F256"],
switches 0:5c4d7b2438d3 1929 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1930 "forced_reset_timeout": 2,
switches 0:5c4d7b2438d3 1931 "device_name": "EFM32LG990F256",
switches 0:5c4d7b2438d3 1932 "config": {
switches 0:5c4d7b2438d3 1933 "hf_clock_src": {
switches 0:5c4d7b2438d3 1934 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
switches 0:5c4d7b2438d3 1935 "value": "HFXO",
switches 0:5c4d7b2438d3 1936 "macro_name": "CORE_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 1937 },
switches 0:5c4d7b2438d3 1938 "hfxo_clock_freq": {
switches 0:5c4d7b2438d3 1939 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 1940 "value": "48000000",
switches 0:5c4d7b2438d3 1941 "macro_name": "HFXO_FREQUENCY"
switches 0:5c4d7b2438d3 1942 },
switches 0:5c4d7b2438d3 1943 "lf_clock_src": {
switches 0:5c4d7b2438d3 1944 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
switches 0:5c4d7b2438d3 1945 "value": "LFXO",
switches 0:5c4d7b2438d3 1946 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 1947 },
switches 0:5c4d7b2438d3 1948 "lfxo_clock_freq": {
switches 0:5c4d7b2438d3 1949 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 1950 "value": "32768",
switches 0:5c4d7b2438d3 1951 "macro_name": "LFXO_FREQUENCY"
switches 0:5c4d7b2438d3 1952 },
switches 0:5c4d7b2438d3 1953 "hfrco_clock_freq": {
switches 0:5c4d7b2438d3 1954 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
switches 0:5c4d7b2438d3 1955 "value": "21000000",
switches 0:5c4d7b2438d3 1956 "macro_name": "HFRCO_FREQUENCY"
switches 0:5c4d7b2438d3 1957 },
switches 0:5c4d7b2438d3 1958 "hfrco_band_select": {
switches 0:5c4d7b2438d3 1959 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
switches 0:5c4d7b2438d3 1960 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
switches 0:5c4d7b2438d3 1961 "macro_name": "HFRCO_FREQUENCY_ENUM"
switches 0:5c4d7b2438d3 1962 }
switches 0:5c4d7b2438d3 1963 }
switches 0:5c4d7b2438d3 1964 },
switches 0:5c4d7b2438d3 1965 "EFM32WG990F256": {
switches 0:5c4d7b2438d3 1966 "inherits": ["EFM32"],
switches 0:5c4d7b2438d3 1967 "extra_labels_add": ["EFM32WG", "256K"],
switches 0:5c4d7b2438d3 1968 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 1969 "macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
switches 0:5c4d7b2438d3 1970 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
switches 0:5c4d7b2438d3 1971 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 1972 "device_name": "EFM32WG990F256",
switches 0:5c4d7b2438d3 1973 "public": false
switches 0:5c4d7b2438d3 1974 },
switches 0:5c4d7b2438d3 1975 "EFM32WG_STK3800": {
switches 0:5c4d7b2438d3 1976 "inherits": ["EFM32WG990F256"],
switches 0:5c4d7b2438d3 1977 "progen": {"target": "efm32wg-stk"},
switches 0:5c4d7b2438d3 1978 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 1979 "forced_reset_timeout": 2,
switches 0:5c4d7b2438d3 1980 "config": {
switches 0:5c4d7b2438d3 1981 "hf_clock_src": {
switches 0:5c4d7b2438d3 1982 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
switches 0:5c4d7b2438d3 1983 "value": "HFXO",
switches 0:5c4d7b2438d3 1984 "macro_name": "CORE_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 1985 },
switches 0:5c4d7b2438d3 1986 "hfxo_clock_freq": {
switches 0:5c4d7b2438d3 1987 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 1988 "value": "48000000",
switches 0:5c4d7b2438d3 1989 "macro_name": "HFXO_FREQUENCY"
switches 0:5c4d7b2438d3 1990 },
switches 0:5c4d7b2438d3 1991 "lf_clock_src": {
switches 0:5c4d7b2438d3 1992 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
switches 0:5c4d7b2438d3 1993 "value": "LFXO",
switches 0:5c4d7b2438d3 1994 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 1995 },
switches 0:5c4d7b2438d3 1996 "lfxo_clock_freq": {
switches 0:5c4d7b2438d3 1997 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 1998 "value": "32768",
switches 0:5c4d7b2438d3 1999 "macro_name": "LFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2000 },
switches 0:5c4d7b2438d3 2001 "hfrco_clock_freq": {
switches 0:5c4d7b2438d3 2002 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
switches 0:5c4d7b2438d3 2003 "value": "21000000",
switches 0:5c4d7b2438d3 2004 "macro_name": "HFRCO_FREQUENCY"
switches 0:5c4d7b2438d3 2005 },
switches 0:5c4d7b2438d3 2006 "hfrco_band_select": {
switches 0:5c4d7b2438d3 2007 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
switches 0:5c4d7b2438d3 2008 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
switches 0:5c4d7b2438d3 2009 "macro_name": "HFRCO_FREQUENCY_ENUM"
switches 0:5c4d7b2438d3 2010 }
switches 0:5c4d7b2438d3 2011 }
switches 0:5c4d7b2438d3 2012 },
switches 0:5c4d7b2438d3 2013 "EFM32ZG222F32": {
switches 0:5c4d7b2438d3 2014 "inherits": ["EFM32"],
switches 0:5c4d7b2438d3 2015 "extra_labels_add": ["EFM32ZG", "32K"],
switches 0:5c4d7b2438d3 2016 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 2017 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 2018 "macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
switches 0:5c4d7b2438d3 2019 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
switches 0:5c4d7b2438d3 2020 "default_lib": "small",
switches 0:5c4d7b2438d3 2021 "release_versions": ["2"],
switches 0:5c4d7b2438d3 2022 "device_name": "EFM32ZG222F32",
switches 0:5c4d7b2438d3 2023 "public": false
switches 0:5c4d7b2438d3 2024 },
switches 0:5c4d7b2438d3 2025 "EFM32ZG_STK3200": {
switches 0:5c4d7b2438d3 2026 "inherits": ["EFM32ZG222F32"],
switches 0:5c4d7b2438d3 2027 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2028 "forced_reset_timeout": 2,
switches 0:5c4d7b2438d3 2029 "config": {
switches 0:5c4d7b2438d3 2030 "hf_clock_src": {
switches 0:5c4d7b2438d3 2031 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
switches 0:5c4d7b2438d3 2032 "value": "HFXO",
switches 0:5c4d7b2438d3 2033 "macro_name": "CORE_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 2034 },
switches 0:5c4d7b2438d3 2035 "hfxo_clock_freq": {
switches 0:5c4d7b2438d3 2036 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 2037 "value": "24000000",
switches 0:5c4d7b2438d3 2038 "macro_name": "HFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2039 },
switches 0:5c4d7b2438d3 2040 "lf_clock_src": {
switches 0:5c4d7b2438d3 2041 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
switches 0:5c4d7b2438d3 2042 "value": "LFXO",
switches 0:5c4d7b2438d3 2043 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 2044 },
switches 0:5c4d7b2438d3 2045 "lfxo_clock_freq": {
switches 0:5c4d7b2438d3 2046 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 2047 "value": "32768",
switches 0:5c4d7b2438d3 2048 "macro_name": "LFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2049 },
switches 0:5c4d7b2438d3 2050 "hfrco_clock_freq": {
switches 0:5c4d7b2438d3 2051 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
switches 0:5c4d7b2438d3 2052 "value": "21000000",
switches 0:5c4d7b2438d3 2053 "macro_name": "HFRCO_FREQUENCY"
switches 0:5c4d7b2438d3 2054 },
switches 0:5c4d7b2438d3 2055 "hfrco_band_select": {
switches 0:5c4d7b2438d3 2056 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
switches 0:5c4d7b2438d3 2057 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
switches 0:5c4d7b2438d3 2058 "macro_name": "HFRCO_FREQUENCY_ENUM"
switches 0:5c4d7b2438d3 2059 }
switches 0:5c4d7b2438d3 2060 }
switches 0:5c4d7b2438d3 2061 },
switches 0:5c4d7b2438d3 2062 "EFM32HG322F64": {
switches 0:5c4d7b2438d3 2063 "inherits": ["EFM32"],
switches 0:5c4d7b2438d3 2064 "extra_labels_add": ["EFM32HG", "64K"],
switches 0:5c4d7b2438d3 2065 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 2066 "default_toolchain": "uARM",
switches 0:5c4d7b2438d3 2067 "macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
switches 0:5c4d7b2438d3 2068 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
switches 0:5c4d7b2438d3 2069 "default_lib": "small",
switches 0:5c4d7b2438d3 2070 "release_versions": ["2"],
switches 0:5c4d7b2438d3 2071 "device_name": "EFM32HG322F64",
switches 0:5c4d7b2438d3 2072 "public": false
switches 0:5c4d7b2438d3 2073 },
switches 0:5c4d7b2438d3 2074 "EFM32HG_STK3400": {
switches 0:5c4d7b2438d3 2075 "inherits": ["EFM32HG322F64"],
switches 0:5c4d7b2438d3 2076 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2077 "forced_reset_timeout": 2,
switches 0:5c4d7b2438d3 2078 "config": {
switches 0:5c4d7b2438d3 2079 "hf_clock_src": {
switches 0:5c4d7b2438d3 2080 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
switches 0:5c4d7b2438d3 2081 "value": "HFXO",
switches 0:5c4d7b2438d3 2082 "macro_name": "CORE_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 2083 },
switches 0:5c4d7b2438d3 2084 "hfxo_clock_freq": {
switches 0:5c4d7b2438d3 2085 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 2086 "value": "24000000",
switches 0:5c4d7b2438d3 2087 "macro_name": "HFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2088 },
switches 0:5c4d7b2438d3 2089 "lf_clock_src": {
switches 0:5c4d7b2438d3 2090 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
switches 0:5c4d7b2438d3 2091 "value": "LFXO",
switches 0:5c4d7b2438d3 2092 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 2093 },
switches 0:5c4d7b2438d3 2094 "lfxo_clock_freq": {
switches 0:5c4d7b2438d3 2095 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 2096 "value": "32768",
switches 0:5c4d7b2438d3 2097 "macro_name": "LFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2098 },
switches 0:5c4d7b2438d3 2099 "hfrco_clock_freq": {
switches 0:5c4d7b2438d3 2100 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
switches 0:5c4d7b2438d3 2101 "value": "21000000",
switches 0:5c4d7b2438d3 2102 "macro_name": "HFRCO_FREQUENCY"
switches 0:5c4d7b2438d3 2103 },
switches 0:5c4d7b2438d3 2104 "hfrco_band_select": {
switches 0:5c4d7b2438d3 2105 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
switches 0:5c4d7b2438d3 2106 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
switches 0:5c4d7b2438d3 2107 "macro_name": "HFRCO_FREQUENCY_ENUM"
switches 0:5c4d7b2438d3 2108 }
switches 0:5c4d7b2438d3 2109 }
switches 0:5c4d7b2438d3 2110 },
switches 0:5c4d7b2438d3 2111 "EFM32PG1B100F256GM32": {
switches 0:5c4d7b2438d3 2112 "inherits": ["EFM32"],
switches 0:5c4d7b2438d3 2113 "extra_labels_add": ["EFM32PG", "256K"],
switches 0:5c4d7b2438d3 2114 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 2115 "macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
switches 0:5c4d7b2438d3 2116 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
switches 0:5c4d7b2438d3 2117 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 2118 "device_name": "EFM32PG1B100F256GM32",
switches 0:5c4d7b2438d3 2119 "public": false
switches 0:5c4d7b2438d3 2120 },
switches 0:5c4d7b2438d3 2121 "EFM32PG_STK3401": {
switches 0:5c4d7b2438d3 2122 "inherits": ["EFM32PG1B100F256GM32"],
switches 0:5c4d7b2438d3 2123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2124 "forced_reset_timeout": 2,
switches 0:5c4d7b2438d3 2125 "config": {
switches 0:5c4d7b2438d3 2126 "hf_clock_src": {
switches 0:5c4d7b2438d3 2127 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
switches 0:5c4d7b2438d3 2128 "value": "HFXO",
switches 0:5c4d7b2438d3 2129 "macro_name": "CORE_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 2130 },
switches 0:5c4d7b2438d3 2131 "hfxo_clock_freq": {
switches 0:5c4d7b2438d3 2132 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 2133 "value": "40000000",
switches 0:5c4d7b2438d3 2134 "macro_name": "HFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2135 },
switches 0:5c4d7b2438d3 2136 "lf_clock_src": {
switches 0:5c4d7b2438d3 2137 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
switches 0:5c4d7b2438d3 2138 "value": "LFXO",
switches 0:5c4d7b2438d3 2139 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
switches 0:5c4d7b2438d3 2140 },
switches 0:5c4d7b2438d3 2141 "lfxo_clock_freq": {
switches 0:5c4d7b2438d3 2142 "help": "Value: External crystal frequency in hertz",
switches 0:5c4d7b2438d3 2143 "value": "32768",
switches 0:5c4d7b2438d3 2144 "macro_name": "LFXO_FREQUENCY"
switches 0:5c4d7b2438d3 2145 },
switches 0:5c4d7b2438d3 2146 "hfrco_clock_freq": {
switches 0:5c4d7b2438d3 2147 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
switches 0:5c4d7b2438d3 2148 "value": "32000000",
switches 0:5c4d7b2438d3 2149 "macro_name": "HFRCO_FREQUENCY"
switches 0:5c4d7b2438d3 2150 },
switches 0:5c4d7b2438d3 2151 "hfrco_band_select": {
switches 0:5c4d7b2438d3 2152 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
switches 0:5c4d7b2438d3 2153 "value": "cmuHFRCOFreq_32M0Hz",
switches 0:5c4d7b2438d3 2154 "macro_name": "HFRCO_FREQUENCY_ENUM"
switches 0:5c4d7b2438d3 2155 }
switches 0:5c4d7b2438d3 2156 }
switches 0:5c4d7b2438d3 2157 },
switches 0:5c4d7b2438d3 2158 "WIZWIKI_W7500": {
switches 0:5c4d7b2438d3 2159 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 2160 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 2161 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
switches 0:5c4d7b2438d3 2162 "supported_toolchains": ["uARM", "ARM"],
switches 0:5c4d7b2438d3 2163 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2164 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2165 "release_versions": ["2"]
switches 0:5c4d7b2438d3 2166 },
switches 0:5c4d7b2438d3 2167 "WIZWIKI_W7500P": {
switches 0:5c4d7b2438d3 2168 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 2169 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 2170 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
switches 0:5c4d7b2438d3 2171 "supported_toolchains": ["uARM", "ARM"],
switches 0:5c4d7b2438d3 2172 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2173 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2174 "release_versions": ["2"]
switches 0:5c4d7b2438d3 2175 },
switches 0:5c4d7b2438d3 2176 "WIZWIKI_W7500ECO": {
switches 0:5c4d7b2438d3 2177 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2178 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 2179 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
switches 0:5c4d7b2438d3 2180 "supported_toolchains": ["uARM", "ARM"],
switches 0:5c4d7b2438d3 2181 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2182 "release_versions": ["2"]
switches 0:5c4d7b2438d3 2183 },
switches 0:5c4d7b2438d3 2184 "SAMR21G18A": {
switches 0:5c4d7b2438d3 2185 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2186 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 2187 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
switches 0:5c4d7b2438d3 2188 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
switches 0:5c4d7b2438d3 2189 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
switches 0:5c4d7b2438d3 2190 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
switches 0:5c4d7b2438d3 2191 "release_versions": ["2"],
switches 0:5c4d7b2438d3 2192 "device_name": "ATSAMR21G18A"
switches 0:5c4d7b2438d3 2193 },
switches 0:5c4d7b2438d3 2194 "SAMD21J18A": {
switches 0:5c4d7b2438d3 2195 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2196 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 2197 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
switches 0:5c4d7b2438d3 2198 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
switches 0:5c4d7b2438d3 2199 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
switches 0:5c4d7b2438d3 2200 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
switches 0:5c4d7b2438d3 2201 "release_versions": ["2"],
switches 0:5c4d7b2438d3 2202 "device_name" : "ATSAMD21J18A"
switches 0:5c4d7b2438d3 2203 },
switches 0:5c4d7b2438d3 2204 "SAMD21G18A": {
switches 0:5c4d7b2438d3 2205 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2206 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 2207 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
switches 0:5c4d7b2438d3 2208 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
switches 0:5c4d7b2438d3 2209 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
switches 0:5c4d7b2438d3 2210 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
switches 0:5c4d7b2438d3 2211 "release_versions": ["2"],
switches 0:5c4d7b2438d3 2212 "device_name": "ATSAMD21G18A"
switches 0:5c4d7b2438d3 2213 },
switches 0:5c4d7b2438d3 2214 "SAML21J18A": {
switches 0:5c4d7b2438d3 2215 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2216 "core": "Cortex-M0+",
switches 0:5c4d7b2438d3 2217 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
switches 0:5c4d7b2438d3 2218 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
switches 0:5c4d7b2438d3 2219 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
switches 0:5c4d7b2438d3 2220 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
switches 0:5c4d7b2438d3 2221 "device_name": "ATSAML21J18A"
switches 0:5c4d7b2438d3 2222 },
switches 0:5c4d7b2438d3 2223 "SAMG55J19": {
switches 0:5c4d7b2438d3 2224 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2225 "core": "Cortex-M4",
switches 0:5c4d7b2438d3 2226 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
switches 0:5c4d7b2438d3 2227 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
switches 0:5c4d7b2438d3 2228 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
switches 0:5c4d7b2438d3 2229 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 2230 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
switches 0:5c4d7b2438d3 2231 "default_lib": "std",
switches 0:5c4d7b2438d3 2232 "device_name": "ATSAMG55J19"
switches 0:5c4d7b2438d3 2233 },
switches 0:5c4d7b2438d3 2234 "MCU_NRF51_UNIFIED": {
switches 0:5c4d7b2438d3 2235 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2236 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 2237 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
switches 0:5c4d7b2438d3 2238 "macros": [
switches 0:5c4d7b2438d3 2239 "NRF51",
switches 0:5c4d7b2438d3 2240 "TARGET_NRF51822",
switches 0:5c4d7b2438d3 2241 "BLE_STACK_SUPPORT_REQD",
switches 0:5c4d7b2438d3 2242 "SOFTDEVICE_PRESENT",
switches 0:5c4d7b2438d3 2243 "S130",
switches 0:5c4d7b2438d3 2244 "TARGET_MCU_NRF51822"
switches 0:5c4d7b2438d3 2245 ],
switches 0:5c4d7b2438d3 2246 "MERGE_BOOTLOADER": false,
switches 0:5c4d7b2438d3 2247 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
switches 0:5c4d7b2438d3 2248 "OUTPUT_EXT": "hex",
switches 0:5c4d7b2438d3 2249 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 2250 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 2251 "public": false,
switches 0:5c4d7b2438d3 2252 "MERGE_SOFT_DEVICE": true,
switches 0:5c4d7b2438d3 2253 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
switches 0:5c4d7b2438d3 2254 {
switches 0:5c4d7b2438d3 2255 "boot": "",
switches 0:5c4d7b2438d3 2256 "name": "s130_nrf51_2.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 2257 "offset": 110592
switches 0:5c4d7b2438d3 2258 }
switches 0:5c4d7b2438d3 2259 ],
switches 0:5c4d7b2438d3 2260 "detect_code": ["1070"],
switches 0:5c4d7b2438d3 2261 "post_binary_hook": {
switches 0:5c4d7b2438d3 2262 "function": "MCU_NRF51Code.binary_hook",
switches 0:5c4d7b2438d3 2263 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
switches 0:5c4d7b2438d3 2264 },
switches 0:5c4d7b2438d3 2265 "program_cycle_s": 6,
switches 0:5c4d7b2438d3 2266 "features": ["BLE"],
switches 0:5c4d7b2438d3 2267 "config": {
switches 0:5c4d7b2438d3 2268 "lf_clock_src": {
switches 0:5c4d7b2438d3 2269 "value": "NRF_LF_SRC_XTAL",
switches 0:5c4d7b2438d3 2270 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
switches 0:5c4d7b2438d3 2271 },
switches 0:5c4d7b2438d3 2272 "uart_hwfc": {
switches 0:5c4d7b2438d3 2273 "help": "Value: 1 for enable, 0 for disable",
switches 0:5c4d7b2438d3 2274 "value": 1,
switches 0:5c4d7b2438d3 2275 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
switches 0:5c4d7b2438d3 2276 }
switches 0:5c4d7b2438d3 2277 },
switches 0:5c4d7b2438d3 2278 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
switches 0:5c4d7b2438d3 2279 },
switches 0:5c4d7b2438d3 2280 "MCU_NRF51_32K_UNIFIED": {
switches 0:5c4d7b2438d3 2281 "inherits": ["MCU_NRF51_UNIFIED"],
switches 0:5c4d7b2438d3 2282 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 2283 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
switches 0:5c4d7b2438d3 2284 "public": false
switches 0:5c4d7b2438d3 2285 },
switches 0:5c4d7b2438d3 2286 "NRF51_DK": {
switches 0:5c4d7b2438d3 2287 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 2288 "inherits": ["MCU_NRF51_32K_UNIFIED"],
switches 0:5c4d7b2438d3 2289 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
switches 0:5c4d7b2438d3 2290 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 2291 "device_name": "nRF51822_xxAA"
switches 0:5c4d7b2438d3 2292 },
switches 0:5c4d7b2438d3 2293 "NRF51_DONGLE": {
switches 0:5c4d7b2438d3 2294 "inherits": ["MCU_NRF51_32K_UNIFIED"],
switches 0:5c4d7b2438d3 2295 "progen": {"target": "nrf51-dongle"},
switches 0:5c4d7b2438d3 2296 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
switches 0:5c4d7b2438d3 2297 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 2298 },
switches 0:5c4d7b2438d3 2299 "MCU_NRF52": {
switches 0:5c4d7b2438d3 2300 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2301 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 2302 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
switches 0:5c4d7b2438d3 2303 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
switches 0:5c4d7b2438d3 2304 "OUTPUT_EXT": "hex",
switches 0:5c4d7b2438d3 2305 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 2306 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 2307 "public": false,
switches 0:5c4d7b2438d3 2308 "detect_code": ["1101"],
switches 0:5c4d7b2438d3 2309 "program_cycle_s": 6,
switches 0:5c4d7b2438d3 2310 "MERGE_SOFT_DEVICE": true,
switches 0:5c4d7b2438d3 2311 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
switches 0:5c4d7b2438d3 2312 {
switches 0:5c4d7b2438d3 2313 "boot": "",
switches 0:5c4d7b2438d3 2314 "name": "s132_nrf52_2.0.0_softdevice.hex",
switches 0:5c4d7b2438d3 2315 "offset": 114688
switches 0:5c4d7b2438d3 2316 }
switches 0:5c4d7b2438d3 2317 ],
switches 0:5c4d7b2438d3 2318 "post_binary_hook": {
switches 0:5c4d7b2438d3 2319 "function": "MCU_NRF51Code.binary_hook",
switches 0:5c4d7b2438d3 2320 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
switches 0:5c4d7b2438d3 2321 },
switches 0:5c4d7b2438d3 2322 "MERGE_BOOTLOADER": false,
switches 0:5c4d7b2438d3 2323 "features": ["BLE"],
switches 0:5c4d7b2438d3 2324 "config": {
switches 0:5c4d7b2438d3 2325 "lf_clock_src": {
switches 0:5c4d7b2438d3 2326 "value": "NRF_LF_SRC_XTAL",
switches 0:5c4d7b2438d3 2327 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
switches 0:5c4d7b2438d3 2328 },
switches 0:5c4d7b2438d3 2329 "uart_hwfc": {
switches 0:5c4d7b2438d3 2330 "help": "Value: 1 for enable, 0 for disable",
switches 0:5c4d7b2438d3 2331 "value": 1,
switches 0:5c4d7b2438d3 2332 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
switches 0:5c4d7b2438d3 2333 }
switches 0:5c4d7b2438d3 2334 }
switches 0:5c4d7b2438d3 2335 },
switches 0:5c4d7b2438d3 2336 "NRF52_DK": {
switches 0:5c4d7b2438d3 2337 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 2338 "inherits": ["MCU_NRF52"],
switches 0:5c4d7b2438d3 2339 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
switches 0:5c4d7b2438d3 2340 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
switches 0:5c4d7b2438d3 2341 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 2342 "device_name": "nRF52832_xxAA"
switches 0:5c4d7b2438d3 2343 },
switches 0:5c4d7b2438d3 2344 "DELTA_DFBM_NQ620": {
switches 0:5c4d7b2438d3 2345 "supported_form_factors": ["ARDUINO"],
switches 0:5c4d7b2438d3 2346 "inherits": ["MCU_NRF52"],
switches 0:5c4d7b2438d3 2347 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
switches 0:5c4d7b2438d3 2348 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
switches 0:5c4d7b2438d3 2349 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 2350 "device_name": "nRF52832_xxAA"
switches 0:5c4d7b2438d3 2351 },
switches 0:5c4d7b2438d3 2352 "BLUEPILL_F103C8": {
switches 0:5c4d7b2438d3 2353 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 2354 "default_toolchain": "GCC_ARM",
switches 0:5c4d7b2438d3 2355 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
switches 0:5c4d7b2438d3 2356 "supported_toolchains": ["GCC_ARM"],
switches 0:5c4d7b2438d3 2357 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2358 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
switches 0:5c4d7b2438d3 2359 },
switches 0:5c4d7b2438d3 2360 "NUMAKER_PFM_NUC472": {
switches 0:5c4d7b2438d3 2361 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 2362 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 2363 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
switches 0:5c4d7b2438d3 2364 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 2365 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 2366 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2367 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN"],
switches 0:5c4d7b2438d3 2368 "features": ["LWIP"],
switches 0:5c4d7b2438d3 2369 "release_versions": ["5"],
switches 0:5c4d7b2438d3 2370 "device_name": "NUC472HI8AE"
switches 0:5c4d7b2438d3 2371 },
switches 0:5c4d7b2438d3 2372 "NCS36510": {
switches 0:5c4d7b2438d3 2373 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2374 "core": "Cortex-M3",
switches 0:5c4d7b2438d3 2375 "extra_labels": ["ONSEMI"],
switches 0:5c4d7b2438d3 2376 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
switches 0:5c4d7b2438d3 2377 "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
switches 0:5c4d7b2438d3 2378 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 2379 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG"],
switches 0:5c4d7b2438d3 2380 "device_name": "NCS36510",
switches 0:5c4d7b2438d3 2381 "release_versions": ["2", "5"]
switches 0:5c4d7b2438d3 2382 },
switches 0:5c4d7b2438d3 2383 "NUMAKER_PFM_M453": {
switches 0:5c4d7b2438d3 2384 "core": "Cortex-M4F",
switches 0:5c4d7b2438d3 2385 "default_toolchain": "ARM",
switches 0:5c4d7b2438d3 2386 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
switches 0:5c4d7b2438d3 2387 "is_disk_virtual": true,
switches 0:5c4d7b2438d3 2388 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
switches 0:5c4d7b2438d3 2389 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2390 "progen": {"target": "numaker-pfm-m453"},
switches 0:5c4d7b2438d3 2391 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN"],
switches 0:5c4d7b2438d3 2392 "release_versions": ["2", "5"],
switches 0:5c4d7b2438d3 2393 "device_name": "M453VG6AE"
switches 0:5c4d7b2438d3 2394 },
switches 0:5c4d7b2438d3 2395 "HI2110": {
switches 0:5c4d7b2438d3 2396 "inherits": ["Target"],
switches 0:5c4d7b2438d3 2397 "core": "Cortex-M0",
switches 0:5c4d7b2438d3 2398 "default_toolchain": "GCC_ARM",
switches 0:5c4d7b2438d3 2399 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
switches 0:5c4d7b2438d3 2400 "extra_labels": ["ublox"],
switches 0:5c4d7b2438d3 2401 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
switches 0:5c4d7b2438d3 2402 "public": false,
switches 0:5c4d7b2438d3 2403 "target_overrides": {
switches 0:5c4d7b2438d3 2404 "*": {
switches 0:5c4d7b2438d3 2405 "core.stdio-flush-at-exit": false
switches 0:5c4d7b2438d3 2406 }
switches 0:5c4d7b2438d3 2407 },
switches 0:5c4d7b2438d3 2408 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
switches 0:5c4d7b2438d3 2409 "default_lib": "std",
switches 0:5c4d7b2438d3 2410 "release_versions": ["5"]
switches 0:5c4d7b2438d3 2411 },
switches 0:5c4d7b2438d3 2412 "SARA_NBIOT": {
switches 0:5c4d7b2438d3 2413 "inherits": ["HI2110"],
switches 0:5c4d7b2438d3 2414 "extra_labels": ["ublox", "HI2110"],
switches 0:5c4d7b2438d3 2415 "public": false
switches 0:5c4d7b2438d3 2416 },
switches 0:5c4d7b2438d3 2417 "SARA_NBIOT_EVK": {
switches 0:5c4d7b2438d3 2418 "inherits": ["SARA_NBIOT"],
switches 0:5c4d7b2438d3 2419 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
switches 0:5c4d7b2438d3 2420 }
switches 0:5c4d7b2438d3 2421 }