Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

rtos/rtx/TARGET_CORTEX_A/rt_TypeDef.h@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /*----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 2 * RL-ARM - RTX
switches 0:5c4d7b2438d3 3 *----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 4 * Name: RT_TYPEDEF.H
switches 0:5c4d7b2438d3 5 * Purpose: Type Definitions
switches 0:5c4d7b2438d3 6 * Rev.: V4.73 (plus large stack)
switches 0:5c4d7b2438d3 7 *----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 8 *
switches 0:5c4d7b2438d3 9 * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
switches 0:5c4d7b2438d3 10 * All rights reserved.
switches 0:5c4d7b2438d3 11 * Redistribution and use in source and binary forms, with or without
switches 0:5c4d7b2438d3 12 * modification, are permitted provided that the following conditions are met:
switches 0:5c4d7b2438d3 13 * - Redistributions of source code must retain the above copyright
switches 0:5c4d7b2438d3 14 * notice, this list of conditions and the following disclaimer.
switches 0:5c4d7b2438d3 15 * - Redistributions in binary form must reproduce the above copyright
switches 0:5c4d7b2438d3 16 * notice, this list of conditions and the following disclaimer in the
switches 0:5c4d7b2438d3 17 * documentation and/or other materials provided with the distribution.
switches 0:5c4d7b2438d3 18 * - Neither the name of ARM nor the names of its contributors may be used
switches 0:5c4d7b2438d3 19 * to endorse or promote products derived from this software without
switches 0:5c4d7b2438d3 20 * specific prior written permission.
switches 0:5c4d7b2438d3 21 *
switches 0:5c4d7b2438d3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
switches 0:5c4d7b2438d3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
switches 0:5c4d7b2438d3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
switches 0:5c4d7b2438d3 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
switches 0:5c4d7b2438d3 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
switches 0:5c4d7b2438d3 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
switches 0:5c4d7b2438d3 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
switches 0:5c4d7b2438d3 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
switches 0:5c4d7b2438d3 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
switches 0:5c4d7b2438d3 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
switches 0:5c4d7b2438d3 32 * POSSIBILITY OF SUCH DAMAGE.
switches 0:5c4d7b2438d3 33 *---------------------------------------------------------------------------*/
switches 0:5c4d7b2438d3 34
switches 0:5c4d7b2438d3 35 /* Types */
switches 0:5c4d7b2438d3 36 typedef char S8;
switches 0:5c4d7b2438d3 37 typedef unsigned char U8;
switches 0:5c4d7b2438d3 38 typedef short S16;
switches 0:5c4d7b2438d3 39 typedef unsigned short U16;
switches 0:5c4d7b2438d3 40 typedef int S32;
switches 0:5c4d7b2438d3 41 typedef unsigned int U32;
switches 0:5c4d7b2438d3 42 typedef long long S64;
switches 0:5c4d7b2438d3 43 typedef unsigned long long U64;
switches 0:5c4d7b2438d3 44 typedef unsigned char BIT;
switches 0:5c4d7b2438d3 45 typedef unsigned int BOOL;
switches 0:5c4d7b2438d3 46 typedef void (*FUNCP)(void);
switches 0:5c4d7b2438d3 47
switches 0:5c4d7b2438d3 48 typedef U32 OS_TID;
switches 0:5c4d7b2438d3 49 typedef void *OS_ID;
switches 0:5c4d7b2438d3 50 typedef U32 OS_RESULT;
switches 0:5c4d7b2438d3 51
switches 0:5c4d7b2438d3 52 typedef struct OS_TCB {
switches 0:5c4d7b2438d3 53 /* General part: identical for all implementations. */
switches 0:5c4d7b2438d3 54 U8 cb_type; /* Control Block Type */
switches 0:5c4d7b2438d3 55 U8 state; /* Task state */
switches 0:5c4d7b2438d3 56 U8 prio; /* Execution priority */
switches 0:5c4d7b2438d3 57 U8 task_id; /* Task ID value for optimized TCB access */
switches 0:5c4d7b2438d3 58 struct OS_TCB *p_lnk; /* Link pointer for ready/sem. wait list */
switches 0:5c4d7b2438d3 59 struct OS_TCB *p_rlnk; /* Link pointer for sem./mbx lst backwards */
switches 0:5c4d7b2438d3 60 struct OS_TCB *p_dlnk; /* Link pointer for delay list */
switches 0:5c4d7b2438d3 61 struct OS_TCB *p_blnk; /* Link pointer for delay list backwards */
switches 0:5c4d7b2438d3 62 U16 delta_time; /* Time until time out */
switches 0:5c4d7b2438d3 63 U16 interval_time; /* Time interval for periodic waits */
switches 0:5c4d7b2438d3 64 U16 events; /* Event flags */
switches 0:5c4d7b2438d3 65 U16 waits; /* Wait flags */
switches 0:5c4d7b2438d3 66 void **msg; /* Direct message passing when task waits */
switches 0:5c4d7b2438d3 67 struct OS_MUCB *p_mlnk; /* Link pointer for mutex owner list */
switches 0:5c4d7b2438d3 68 U8 prio_base; /* Base priority */
switches 0:5c4d7b2438d3 69
switches 0:5c4d7b2438d3 70 /* Hardware dependant part: specific for Cortex processor */
switches 0:5c4d7b2438d3 71 U8 stack_frame; /* Stack frame: 0x0 Basic, 0x1 Extended, 0x2 VFP/D16 stacked, 0x4 NEON/D32 stacked */
switches 0:5c4d7b2438d3 72 #if defined (__ICCARM__)
switches 0:5c4d7b2438d3 73 #ifndef __LARGE_PRIV_STACK
switches 0:5c4d7b2438d3 74 U16 priv_stack; /* Private stack size, 0= system assigned */
switches 0:5c4d7b2438d3 75 #else
switches 0:5c4d7b2438d3 76 U16 reserved; /* Reserved (padding) */
switches 0:5c4d7b2438d3 77 U32 priv_stack; /* Private stack size for LARGE_STACK, 0= system assigned */
switches 0:5c4d7b2438d3 78 #endif /* __LARGE_PRIV_STACK */
switches 0:5c4d7b2438d3 79 #else
switches 0:5c4d7b2438d3 80 U16 reserved; /* Reserved (padding) */
switches 0:5c4d7b2438d3 81 U32 priv_stack; /* Private stack size for LARGE_STACK, 0= system assigned */
switches 0:5c4d7b2438d3 82 #endif
switches 0:5c4d7b2438d3 83 U32 tsk_stack; /* Current task Stack pointer (R13) */
switches 0:5c4d7b2438d3 84 U32 *stack; /* Pointer to Task Stack memory block */
switches 0:5c4d7b2438d3 85
switches 0:5c4d7b2438d3 86 /* Task entry point used for uVision debugger */
switches 0:5c4d7b2438d3 87 FUNCP ptask; /* Task entry address */
switches 0:5c4d7b2438d3 88 void *argv; /* Task argument */
switches 0:5c4d7b2438d3 89 } *P_TCB;
switches 0:5c4d7b2438d3 90 #define TCB_TID 3 /* 'task id' offset */
switches 0:5c4d7b2438d3 91 #define TCB_STACKF 37 /* 'stack_frame' offset */
switches 0:5c4d7b2438d3 92 #if defined (__ICCARM__)
switches 0:5c4d7b2438d3 93 #ifndef __LARGE_PRIV_STACK
switches 0:5c4d7b2438d3 94 #define TCB_TSTACK 40 /* 'tsk_stack' offset */
switches 0:5c4d7b2438d3 95 #else
switches 0:5c4d7b2438d3 96 #define TCB_TSTACK 44 /* 'tsk_stack' offset for LARGE_STACK */
switches 0:5c4d7b2438d3 97 #endif /* __LARGE_PRIV_STACK */
switches 0:5c4d7b2438d3 98 #else
switches 0:5c4d7b2438d3 99 #define TCB_TSTACK 44 /* 'tsk_stack' offset for LARGE_STACK */
switches 0:5c4d7b2438d3 100 #endif
switches 0:5c4d7b2438d3 101
switches 0:5c4d7b2438d3 102 typedef struct OS_PSFE { /* Post Service Fifo Entry */
switches 0:5c4d7b2438d3 103 void *id; /* Object Identification */
switches 0:5c4d7b2438d3 104 U32 arg; /* Object Argument */
switches 0:5c4d7b2438d3 105 } *P_PSFE;
switches 0:5c4d7b2438d3 106
switches 0:5c4d7b2438d3 107 typedef struct OS_PSQ { /* Post Service Queue */
switches 0:5c4d7b2438d3 108 U8 first; /* FIFO Head Index */
switches 0:5c4d7b2438d3 109 U8 last; /* FIFO Tail Index */
switches 0:5c4d7b2438d3 110 U8 count; /* Number of stored items in FIFO */
switches 0:5c4d7b2438d3 111 U8 size; /* FIFO Size */
switches 0:5c4d7b2438d3 112 struct OS_PSFE q[1]; /* FIFO Content */
switches 0:5c4d7b2438d3 113 } *P_PSQ;
switches 0:5c4d7b2438d3 114
switches 0:5c4d7b2438d3 115 typedef struct OS_TSK {
switches 0:5c4d7b2438d3 116 P_TCB run; /* Current running task */
switches 0:5c4d7b2438d3 117 P_TCB new_tsk; /* Scheduled task to run */
switches 0:5c4d7b2438d3 118 } *P_TSK;
switches 0:5c4d7b2438d3 119
switches 0:5c4d7b2438d3 120 typedef struct OS_ROBIN { /* Round Robin Control */
switches 0:5c4d7b2438d3 121 P_TCB task; /* Round Robin task */
switches 0:5c4d7b2438d3 122 U16 time; /* Round Robin switch time */
switches 0:5c4d7b2438d3 123 U16 tout; /* Round Robin timeout */
switches 0:5c4d7b2438d3 124 } *P_ROBIN;
switches 0:5c4d7b2438d3 125
switches 0:5c4d7b2438d3 126 typedef struct OS_XCB {
switches 0:5c4d7b2438d3 127 U8 cb_type; /* Control Block Type */
switches 0:5c4d7b2438d3 128 struct OS_TCB *p_lnk; /* Link pointer for ready/sem. wait list */
switches 0:5c4d7b2438d3 129 struct OS_TCB *p_rlnk; /* Link pointer for sem./mbx lst backwards */
switches 0:5c4d7b2438d3 130 struct OS_TCB *p_dlnk; /* Link pointer for delay list */
switches 0:5c4d7b2438d3 131 struct OS_TCB *p_blnk; /* Link pointer for delay list backwards */
switches 0:5c4d7b2438d3 132 U16 delta_time; /* Time until time out */
switches 0:5c4d7b2438d3 133 } *P_XCB;
switches 0:5c4d7b2438d3 134
switches 0:5c4d7b2438d3 135 typedef struct OS_MCB {
switches 0:5c4d7b2438d3 136 U8 cb_type; /* Control Block Type */
switches 0:5c4d7b2438d3 137 U8 state; /* State flag variable */
switches 0:5c4d7b2438d3 138 U8 isr_st; /* State flag variable for isr functions */
switches 0:5c4d7b2438d3 139 struct OS_TCB *p_lnk; /* Chain of tasks waiting for message */
switches 0:5c4d7b2438d3 140 U16 first; /* Index of the message list begin */
switches 0:5c4d7b2438d3 141 U16 last; /* Index of the message list end */
switches 0:5c4d7b2438d3 142 U16 count; /* Actual number of stored messages */
switches 0:5c4d7b2438d3 143 U16 size; /* Maximum number of stored messages */
switches 0:5c4d7b2438d3 144 void *msg[1]; /* FIFO for Message pointers 1st element */
switches 0:5c4d7b2438d3 145 } *P_MCB;
switches 0:5c4d7b2438d3 146
switches 0:5c4d7b2438d3 147 typedef struct OS_SCB {
switches 0:5c4d7b2438d3 148 U8 cb_type; /* Control Block Type */
switches 0:5c4d7b2438d3 149 U8 mask; /* Semaphore token mask */
switches 0:5c4d7b2438d3 150 U16 tokens; /* Semaphore tokens */
switches 0:5c4d7b2438d3 151 struct OS_TCB *p_lnk; /* Chain of tasks waiting for tokens */
switches 0:5c4d7b2438d3 152 } *P_SCB;
switches 0:5c4d7b2438d3 153
switches 0:5c4d7b2438d3 154 typedef struct OS_MUCB {
switches 0:5c4d7b2438d3 155 U8 cb_type; /* Control Block Type */
switches 0:5c4d7b2438d3 156 U16 level; /* Call nesting level */
switches 0:5c4d7b2438d3 157 struct OS_TCB *p_lnk; /* Chain of tasks waiting for mutex */
switches 0:5c4d7b2438d3 158 struct OS_TCB *owner; /* Mutex owner task */
switches 0:5c4d7b2438d3 159 struct OS_MUCB *p_mlnk; /* Chain of mutexes by owner task */
switches 0:5c4d7b2438d3 160 } *P_MUCB;
switches 0:5c4d7b2438d3 161
switches 0:5c4d7b2438d3 162 typedef struct OS_XTMR {
switches 0:5c4d7b2438d3 163 struct OS_TMR *next;
switches 0:5c4d7b2438d3 164 U16 tcnt;
switches 0:5c4d7b2438d3 165 } *P_XTMR;
switches 0:5c4d7b2438d3 166
switches 0:5c4d7b2438d3 167 typedef struct OS_TMR {
switches 0:5c4d7b2438d3 168 struct OS_TMR *next; /* Link pointer to Next timer */
switches 0:5c4d7b2438d3 169 U16 tcnt; /* Timer delay count */
switches 0:5c4d7b2438d3 170 U16 info; /* User defined call info */
switches 0:5c4d7b2438d3 171 } *P_TMR;
switches 0:5c4d7b2438d3 172
switches 0:5c4d7b2438d3 173 typedef struct OS_BM {
switches 0:5c4d7b2438d3 174 void *free; /* Pointer to first free memory block */
switches 0:5c4d7b2438d3 175 void *end; /* Pointer to memory block end */
switches 0:5c4d7b2438d3 176 U32 blk_size; /* Memory block size */
switches 0:5c4d7b2438d3 177 } *P_BM;
switches 0:5c4d7b2438d3 178
switches 0:5c4d7b2438d3 179 /* Definitions */
switches 0:5c4d7b2438d3 180 #define __TRUE 1
switches 0:5c4d7b2438d3 181 #define __FALSE 0
switches 0:5c4d7b2438d3 182 #define NULL ((void *) 0)
switches 0:5c4d7b2438d3 183
switches 0:5c4d7b2438d3 184 /*----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 185 * end of file
switches 0:5c4d7b2438d3 186 *---------------------------------------------------------------------------*/
switches 0:5c4d7b2438d3 187