Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

rtos/rtx/TARGET_CORTEX_A/HAL_CA.c@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /*----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 2 * RL-ARM - RTX
switches 0:5c4d7b2438d3 3 *----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 4 * Name: HAL_CA.C
switches 0:5c4d7b2438d3 5 * Purpose: Hardware Abstraction Layer for Cortex-A
switches 0:5c4d7b2438d3 6 * Rev.:
switches 0:5c4d7b2438d3 7 *----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 8 *
switches 0:5c4d7b2438d3 9 * Copyright (c) 2012 ARM Limited
switches 0:5c4d7b2438d3 10 * All rights reserved.
switches 0:5c4d7b2438d3 11 * Redistribution and use in source and binary forms, with or without
switches 0:5c4d7b2438d3 12 * modification, are permitted provided that the following conditions are met:
switches 0:5c4d7b2438d3 13 * - Redistributions of source code must retain the above copyright
switches 0:5c4d7b2438d3 14 * notice, this list of conditions and the following disclaimer.
switches 0:5c4d7b2438d3 15 * - Redistributions in binary form must reproduce the above copyright
switches 0:5c4d7b2438d3 16 * notice, this list of conditions and the following disclaimer in the
switches 0:5c4d7b2438d3 17 * documentation and/or other materials provided with the distribution.
switches 0:5c4d7b2438d3 18 * - Neither the name of ARM nor the names of its contributors may be used
switches 0:5c4d7b2438d3 19 * to endorse or promote products derived from this software without
switches 0:5c4d7b2438d3 20 * specific prior written permission.
switches 0:5c4d7b2438d3 21 *
switches 0:5c4d7b2438d3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
switches 0:5c4d7b2438d3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
switches 0:5c4d7b2438d3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
switches 0:5c4d7b2438d3 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
switches 0:5c4d7b2438d3 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
switches 0:5c4d7b2438d3 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
switches 0:5c4d7b2438d3 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
switches 0:5c4d7b2438d3 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
switches 0:5c4d7b2438d3 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
switches 0:5c4d7b2438d3 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
switches 0:5c4d7b2438d3 32 * POSSIBILITY OF SUCH DAMAGE.
switches 0:5c4d7b2438d3 33 *---------------------------------------------------------------------------*/
switches 0:5c4d7b2438d3 34
switches 0:5c4d7b2438d3 35 #include "rt_TypeDef.h"
switches 0:5c4d7b2438d3 36 #include "RTX_Config.h"
switches 0:5c4d7b2438d3 37 #include "rt_HAL_CA.h"
switches 0:5c4d7b2438d3 38
switches 0:5c4d7b2438d3 39 /*--------------------------- os_init_context -------------------------------*/
switches 0:5c4d7b2438d3 40
switches 0:5c4d7b2438d3 41 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
switches 0:5c4d7b2438d3 42 /* Prepare TCB and saved context for a first time start of a task. */
switches 0:5c4d7b2438d3 43 U32 *stk,i,size;
switches 0:5c4d7b2438d3 44
switches 0:5c4d7b2438d3 45 /* Prepare a complete interrupt frame for first task start */
switches 0:5c4d7b2438d3 46 size = p_TCB->priv_stack >> 2;
switches 0:5c4d7b2438d3 47 if (size == 0) {
switches 0:5c4d7b2438d3 48 size = (U16)os_stackinfo >> 2;
switches 0:5c4d7b2438d3 49 }
switches 0:5c4d7b2438d3 50 /* Write to the top of stack. */
switches 0:5c4d7b2438d3 51 stk = &p_TCB->stack[size];
switches 0:5c4d7b2438d3 52
switches 0:5c4d7b2438d3 53 /* Auto correct to 8-byte ARM stack alignment. */
switches 0:5c4d7b2438d3 54 if ((U32)stk & 0x04) {
switches 0:5c4d7b2438d3 55 stk--;
switches 0:5c4d7b2438d3 56 }
switches 0:5c4d7b2438d3 57
switches 0:5c4d7b2438d3 58 stk -= 16;
switches 0:5c4d7b2438d3 59
switches 0:5c4d7b2438d3 60 /* Initial PC and default CPSR */
switches 0:5c4d7b2438d3 61 stk[14] = (U32)task_body;
switches 0:5c4d7b2438d3 62 /* Task run mode is inherited from the startup file. */
switches 0:5c4d7b2438d3 63 /* (non-privileged USER or privileged SYSTEM mode) */
switches 0:5c4d7b2438d3 64 stk[15] = (os_flags & 1) ? INIT_CPSR_SYS : INIT_CPSR_USER;
switches 0:5c4d7b2438d3 65 /* Set T-bit if task function in Thumb mode. */
switches 0:5c4d7b2438d3 66 if ((U32)task_body & 1) {
switches 0:5c4d7b2438d3 67 stk[15] |= CPSR_T_BIT;
switches 0:5c4d7b2438d3 68 }
switches 0:5c4d7b2438d3 69 /* Assign a void pointer to R0. */
switches 0:5c4d7b2438d3 70 stk[8] = (U32)p_TCB->msg;
switches 0:5c4d7b2438d3 71 /* Clear R1-R12,LR registers. */
switches 0:5c4d7b2438d3 72 for (i = 0; i < 8; i++) {
switches 0:5c4d7b2438d3 73 stk[i] = 0;
switches 0:5c4d7b2438d3 74 }
switches 0:5c4d7b2438d3 75 for (i = 9; i < 14; i++) {
switches 0:5c4d7b2438d3 76 stk[i] = 0;
switches 0:5c4d7b2438d3 77 }
switches 0:5c4d7b2438d3 78
switches 0:5c4d7b2438d3 79 /* Initial Task stack pointer. */
switches 0:5c4d7b2438d3 80 p_TCB->tsk_stack = (U32)stk;
switches 0:5c4d7b2438d3 81
switches 0:5c4d7b2438d3 82 /* Task entry point. */
switches 0:5c4d7b2438d3 83 p_TCB->ptask = task_body;
switches 0:5c4d7b2438d3 84
switches 0:5c4d7b2438d3 85 /* Set a magic word for checking of stack overflow. */
switches 0:5c4d7b2438d3 86 p_TCB->stack[0] = MAGIC_WORD;
switches 0:5c4d7b2438d3 87 }
switches 0:5c4d7b2438d3 88
switches 0:5c4d7b2438d3 89
switches 0:5c4d7b2438d3 90 /*--------------------------- rt_ret_val ----------------------------------*/
switches 0:5c4d7b2438d3 91
switches 0:5c4d7b2438d3 92 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
switches 0:5c4d7b2438d3 93 /* Get pointer to task return value registers (R0..R3) in Stack */
switches 0:5c4d7b2438d3 94 if (p_TCB->stack_frame & 0x4) {
switches 0:5c4d7b2438d3 95 /* NEON/D32 Stack Frame: D0-31,FPSCR,Reserved,R4-R11,R0-R3,R12,LR,PC,xPSR */
switches 0:5c4d7b2438d3 96 return (U32 *)(p_TCB->tsk_stack + 8*4 + 2*4 + 32*8);
switches 0:5c4d7b2438d3 97 } else if (p_TCB->stack_frame & 0x2) {
switches 0:5c4d7b2438d3 98 /* VFP/D16 Stack Frame: D0-D15/S0-31,FPSCR,Reserved,R4-R11,R0-R3,R12,LR,PC,xPSR */
switches 0:5c4d7b2438d3 99 return (U32 *)(p_TCB->tsk_stack + 8*4 + 2*4 + 32*4);
switches 0:5c4d7b2438d3 100 } else {
switches 0:5c4d7b2438d3 101 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
switches 0:5c4d7b2438d3 102 return (U32 *)(p_TCB->tsk_stack + 8*4);
switches 0:5c4d7b2438d3 103 }
switches 0:5c4d7b2438d3 104 }
switches 0:5c4d7b2438d3 105
switches 0:5c4d7b2438d3 106 void rt_ret_val (P_TCB p_TCB, U32 v0) {
switches 0:5c4d7b2438d3 107 U32 *ret;
switches 0:5c4d7b2438d3 108
switches 0:5c4d7b2438d3 109 ret = rt_ret_regs(p_TCB);
switches 0:5c4d7b2438d3 110 ret[0] = v0;
switches 0:5c4d7b2438d3 111 }
switches 0:5c4d7b2438d3 112
switches 0:5c4d7b2438d3 113 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
switches 0:5c4d7b2438d3 114 U32 *ret;
switches 0:5c4d7b2438d3 115
switches 0:5c4d7b2438d3 116 ret = rt_ret_regs(p_TCB);
switches 0:5c4d7b2438d3 117 ret[0] = v0;
switches 0:5c4d7b2438d3 118 ret[1] = v1;
switches 0:5c4d7b2438d3 119 }
switches 0:5c4d7b2438d3 120
switches 0:5c4d7b2438d3 121
switches 0:5c4d7b2438d3 122 /*----------------------------------------------------------------------------
switches 0:5c4d7b2438d3 123 * end of file
switches 0:5c4d7b2438d3 124 *---------------------------------------------------------------------------*/