Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

platform/mbed_critical.c@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /*
switches 0:5c4d7b2438d3 2 * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved
switches 0:5c4d7b2438d3 3 * SPDX-License-Identifier: Apache-2.0
switches 0:5c4d7b2438d3 4 *
switches 0:5c4d7b2438d3 5 * Licensed under the Apache License, Version 2.0 (the "License"); you may
switches 0:5c4d7b2438d3 6 * not use this file except in compliance with the License.
switches 0:5c4d7b2438d3 7 * You may obtain a copy of the License at
switches 0:5c4d7b2438d3 8 *
switches 0:5c4d7b2438d3 9 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:5c4d7b2438d3 10 *
switches 0:5c4d7b2438d3 11 * Unless required by applicable law or agreed to in writing, software
switches 0:5c4d7b2438d3 12 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
switches 0:5c4d7b2438d3 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:5c4d7b2438d3 14 * See the License for the specific language governing permissions and
switches 0:5c4d7b2438d3 15 * limitations under the License.
switches 0:5c4d7b2438d3 16 */
switches 0:5c4d7b2438d3 17
switches 0:5c4d7b2438d3 18 #include "platform/critical.h"
switches 0:5c4d7b2438d3 19
switches 0:5c4d7b2438d3 20 #include "cmsis.h"
switches 0:5c4d7b2438d3 21 #include "platform/mbed_assert.h"
switches 0:5c4d7b2438d3 22 #include "platform/toolchain.h"
switches 0:5c4d7b2438d3 23
switches 0:5c4d7b2438d3 24 #define EXCLUSIVE_ACCESS (!defined (__CORTEX_M0) && !defined (__CORTEX_M0PLUS))
switches 0:5c4d7b2438d3 25
switches 0:5c4d7b2438d3 26 static volatile uint32_t interrupt_enable_counter = 0;
switches 0:5c4d7b2438d3 27 static volatile bool critical_interrupts_disabled = false;
switches 0:5c4d7b2438d3 28
switches 0:5c4d7b2438d3 29 bool core_util_are_interrupts_enabled(void)
switches 0:5c4d7b2438d3 30 {
switches 0:5c4d7b2438d3 31 #if defined(__CORTEX_A9)
switches 0:5c4d7b2438d3 32 return ((__get_CPSR() & 0x80) == 0);
switches 0:5c4d7b2438d3 33 #else
switches 0:5c4d7b2438d3 34 return ((__get_PRIMASK() & 0x1) == 0);
switches 0:5c4d7b2438d3 35 #endif
switches 0:5c4d7b2438d3 36 }
switches 0:5c4d7b2438d3 37
switches 0:5c4d7b2438d3 38 MBED_WEAK void core_util_critical_section_enter(void)
switches 0:5c4d7b2438d3 39 {
switches 0:5c4d7b2438d3 40 bool interrupts_disabled = !core_util_are_interrupts_enabled();
switches 0:5c4d7b2438d3 41 __disable_irq();
switches 0:5c4d7b2438d3 42
switches 0:5c4d7b2438d3 43 /* Save the interrupt disabled state as it was prior to any nested critical section lock use */
switches 0:5c4d7b2438d3 44 if (!interrupt_enable_counter) {
switches 0:5c4d7b2438d3 45 critical_interrupts_disabled = interrupts_disabled;
switches 0:5c4d7b2438d3 46 }
switches 0:5c4d7b2438d3 47
switches 0:5c4d7b2438d3 48 /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts
switches 0:5c4d7b2438d3 49 are enabled, then something has gone badly wrong thus assert an error.
switches 0:5c4d7b2438d3 50 */
switches 0:5c4d7b2438d3 51 MBED_ASSERT(interrupt_enable_counter < UINT32_MAX);
switches 0:5c4d7b2438d3 52 // FIXME
switches 0:5c4d7b2438d3 53 #ifndef FEATURE_UVISOR
switches 0:5c4d7b2438d3 54 if (interrupt_enable_counter > 0) {
switches 0:5c4d7b2438d3 55 MBED_ASSERT(interrupts_disabled);
switches 0:5c4d7b2438d3 56 }
switches 0:5c4d7b2438d3 57 #else
switches 0:5c4d7b2438d3 58 #warning "core_util_critical_section_enter needs fixing to work from unprivileged code"
switches 0:5c4d7b2438d3 59 #endif /* FEATURE_UVISOR */
switches 0:5c4d7b2438d3 60 interrupt_enable_counter++;
switches 0:5c4d7b2438d3 61 }
switches 0:5c4d7b2438d3 62
switches 0:5c4d7b2438d3 63 MBED_WEAK void core_util_critical_section_exit(void)
switches 0:5c4d7b2438d3 64 {
switches 0:5c4d7b2438d3 65 /* If critical_section_enter has not previously been called, do nothing */
switches 0:5c4d7b2438d3 66 if (interrupt_enable_counter) {
switches 0:5c4d7b2438d3 67
switches 0:5c4d7b2438d3 68 // FIXME
switches 0:5c4d7b2438d3 69 #ifndef FEATURE_UVISOR
switches 0:5c4d7b2438d3 70 bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */
switches 0:5c4d7b2438d3 71
switches 0:5c4d7b2438d3 72 MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */
switches 0:5c4d7b2438d3 73 #else
switches 0:5c4d7b2438d3 74 #warning "core_util_critical_section_exit needs fixing to work from unprivileged code"
switches 0:5c4d7b2438d3 75 #endif /* FEATURE_UVISOR */
switches 0:5c4d7b2438d3 76
switches 0:5c4d7b2438d3 77 interrupt_enable_counter--;
switches 0:5c4d7b2438d3 78
switches 0:5c4d7b2438d3 79 /* Only re-enable interrupts if we are exiting the last of the nested critical sections and
switches 0:5c4d7b2438d3 80 interrupts were enabled on entry to the first critical section.
switches 0:5c4d7b2438d3 81 */
switches 0:5c4d7b2438d3 82 if (!interrupt_enable_counter && !critical_interrupts_disabled) {
switches 0:5c4d7b2438d3 83 __enable_irq();
switches 0:5c4d7b2438d3 84 }
switches 0:5c4d7b2438d3 85 }
switches 0:5c4d7b2438d3 86 }
switches 0:5c4d7b2438d3 87
switches 0:5c4d7b2438d3 88 #if EXCLUSIVE_ACCESS
switches 0:5c4d7b2438d3 89
switches 0:5c4d7b2438d3 90 /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
switches 0:5c4d7b2438d3 91 #if defined (__CC_ARM)
switches 0:5c4d7b2438d3 92 #pragma diag_suppress 3731
switches 0:5c4d7b2438d3 93 #endif
switches 0:5c4d7b2438d3 94
switches 0:5c4d7b2438d3 95 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
switches 0:5c4d7b2438d3 96 {
switches 0:5c4d7b2438d3 97 uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);
switches 0:5c4d7b2438d3 98 if (currentValue != *expectedCurrentValue) {
switches 0:5c4d7b2438d3 99 *expectedCurrentValue = currentValue;
switches 0:5c4d7b2438d3 100 __CLREX();
switches 0:5c4d7b2438d3 101 return false;
switches 0:5c4d7b2438d3 102 }
switches 0:5c4d7b2438d3 103
switches 0:5c4d7b2438d3 104 return !__STREXB(desiredValue, (volatile uint8_t*)ptr);
switches 0:5c4d7b2438d3 105 }
switches 0:5c4d7b2438d3 106
switches 0:5c4d7b2438d3 107 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
switches 0:5c4d7b2438d3 108 {
switches 0:5c4d7b2438d3 109 uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr);
switches 0:5c4d7b2438d3 110 if (currentValue != *expectedCurrentValue) {
switches 0:5c4d7b2438d3 111 *expectedCurrentValue = currentValue;
switches 0:5c4d7b2438d3 112 __CLREX();
switches 0:5c4d7b2438d3 113 return false;
switches 0:5c4d7b2438d3 114 }
switches 0:5c4d7b2438d3 115
switches 0:5c4d7b2438d3 116 return !__STREXH(desiredValue, (volatile uint16_t*)ptr);
switches 0:5c4d7b2438d3 117 }
switches 0:5c4d7b2438d3 118
switches 0:5c4d7b2438d3 119
switches 0:5c4d7b2438d3 120 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
switches 0:5c4d7b2438d3 121 {
switches 0:5c4d7b2438d3 122 uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr);
switches 0:5c4d7b2438d3 123 if (currentValue != *expectedCurrentValue) {
switches 0:5c4d7b2438d3 124 *expectedCurrentValue = currentValue;
switches 0:5c4d7b2438d3 125 __CLREX();
switches 0:5c4d7b2438d3 126 return false;
switches 0:5c4d7b2438d3 127 }
switches 0:5c4d7b2438d3 128
switches 0:5c4d7b2438d3 129 return !__STREXW(desiredValue, (volatile uint32_t*)ptr);
switches 0:5c4d7b2438d3 130 }
switches 0:5c4d7b2438d3 131
switches 0:5c4d7b2438d3 132 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
switches 0:5c4d7b2438d3 133 {
switches 0:5c4d7b2438d3 134 uint8_t newValue;
switches 0:5c4d7b2438d3 135 do {
switches 0:5c4d7b2438d3 136 newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta;
switches 0:5c4d7b2438d3 137 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
switches 0:5c4d7b2438d3 138 return newValue;
switches 0:5c4d7b2438d3 139 }
switches 0:5c4d7b2438d3 140
switches 0:5c4d7b2438d3 141 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
switches 0:5c4d7b2438d3 142 {
switches 0:5c4d7b2438d3 143 uint16_t newValue;
switches 0:5c4d7b2438d3 144 do {
switches 0:5c4d7b2438d3 145 newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta;
switches 0:5c4d7b2438d3 146 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
switches 0:5c4d7b2438d3 147 return newValue;
switches 0:5c4d7b2438d3 148 }
switches 0:5c4d7b2438d3 149
switches 0:5c4d7b2438d3 150 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
switches 0:5c4d7b2438d3 151 {
switches 0:5c4d7b2438d3 152 uint32_t newValue;
switches 0:5c4d7b2438d3 153 do {
switches 0:5c4d7b2438d3 154 newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta;
switches 0:5c4d7b2438d3 155 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
switches 0:5c4d7b2438d3 156 return newValue;
switches 0:5c4d7b2438d3 157 }
switches 0:5c4d7b2438d3 158
switches 0:5c4d7b2438d3 159
switches 0:5c4d7b2438d3 160 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
switches 0:5c4d7b2438d3 161 {
switches 0:5c4d7b2438d3 162 uint8_t newValue;
switches 0:5c4d7b2438d3 163 do {
switches 0:5c4d7b2438d3 164 newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta;
switches 0:5c4d7b2438d3 165 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
switches 0:5c4d7b2438d3 166 return newValue;
switches 0:5c4d7b2438d3 167 }
switches 0:5c4d7b2438d3 168
switches 0:5c4d7b2438d3 169 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
switches 0:5c4d7b2438d3 170 {
switches 0:5c4d7b2438d3 171 uint16_t newValue;
switches 0:5c4d7b2438d3 172 do {
switches 0:5c4d7b2438d3 173 newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta;
switches 0:5c4d7b2438d3 174 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
switches 0:5c4d7b2438d3 175 return newValue;
switches 0:5c4d7b2438d3 176 }
switches 0:5c4d7b2438d3 177
switches 0:5c4d7b2438d3 178 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
switches 0:5c4d7b2438d3 179 {
switches 0:5c4d7b2438d3 180 uint32_t newValue;
switches 0:5c4d7b2438d3 181 do {
switches 0:5c4d7b2438d3 182 newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta;
switches 0:5c4d7b2438d3 183 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
switches 0:5c4d7b2438d3 184 return newValue;
switches 0:5c4d7b2438d3 185 }
switches 0:5c4d7b2438d3 186
switches 0:5c4d7b2438d3 187 #else
switches 0:5c4d7b2438d3 188
switches 0:5c4d7b2438d3 189 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
switches 0:5c4d7b2438d3 190 {
switches 0:5c4d7b2438d3 191 bool success;
switches 0:5c4d7b2438d3 192 uint8_t currentValue;
switches 0:5c4d7b2438d3 193 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 194 currentValue = *ptr;
switches 0:5c4d7b2438d3 195 if (currentValue == *expectedCurrentValue) {
switches 0:5c4d7b2438d3 196 *ptr = desiredValue;
switches 0:5c4d7b2438d3 197 success = true;
switches 0:5c4d7b2438d3 198 } else {
switches 0:5c4d7b2438d3 199 *expectedCurrentValue = currentValue;
switches 0:5c4d7b2438d3 200 success = false;
switches 0:5c4d7b2438d3 201 }
switches 0:5c4d7b2438d3 202 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 203 return success;
switches 0:5c4d7b2438d3 204 }
switches 0:5c4d7b2438d3 205
switches 0:5c4d7b2438d3 206 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
switches 0:5c4d7b2438d3 207 {
switches 0:5c4d7b2438d3 208 bool success;
switches 0:5c4d7b2438d3 209 uint16_t currentValue;
switches 0:5c4d7b2438d3 210 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 211 currentValue = *ptr;
switches 0:5c4d7b2438d3 212 if (currentValue == *expectedCurrentValue) {
switches 0:5c4d7b2438d3 213 *ptr = desiredValue;
switches 0:5c4d7b2438d3 214 success = true;
switches 0:5c4d7b2438d3 215 } else {
switches 0:5c4d7b2438d3 216 *expectedCurrentValue = currentValue;
switches 0:5c4d7b2438d3 217 success = false;
switches 0:5c4d7b2438d3 218 }
switches 0:5c4d7b2438d3 219 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 220 return success;
switches 0:5c4d7b2438d3 221 }
switches 0:5c4d7b2438d3 222
switches 0:5c4d7b2438d3 223
switches 0:5c4d7b2438d3 224 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
switches 0:5c4d7b2438d3 225 {
switches 0:5c4d7b2438d3 226 bool success;
switches 0:5c4d7b2438d3 227 uint32_t currentValue;
switches 0:5c4d7b2438d3 228 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 229 currentValue = *ptr;
switches 0:5c4d7b2438d3 230 if (currentValue == *expectedCurrentValue) {
switches 0:5c4d7b2438d3 231 *ptr = desiredValue;
switches 0:5c4d7b2438d3 232 success = true;
switches 0:5c4d7b2438d3 233 } else {
switches 0:5c4d7b2438d3 234 *expectedCurrentValue = currentValue;
switches 0:5c4d7b2438d3 235 success = false;
switches 0:5c4d7b2438d3 236 }
switches 0:5c4d7b2438d3 237 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 238 return success;
switches 0:5c4d7b2438d3 239 }
switches 0:5c4d7b2438d3 240
switches 0:5c4d7b2438d3 241
switches 0:5c4d7b2438d3 242 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
switches 0:5c4d7b2438d3 243 {
switches 0:5c4d7b2438d3 244 uint8_t newValue;
switches 0:5c4d7b2438d3 245 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 246 newValue = *valuePtr + delta;
switches 0:5c4d7b2438d3 247 *valuePtr = newValue;
switches 0:5c4d7b2438d3 248 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 249 return newValue;
switches 0:5c4d7b2438d3 250 }
switches 0:5c4d7b2438d3 251
switches 0:5c4d7b2438d3 252 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
switches 0:5c4d7b2438d3 253 {
switches 0:5c4d7b2438d3 254 uint16_t newValue;
switches 0:5c4d7b2438d3 255 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 256 newValue = *valuePtr + delta;
switches 0:5c4d7b2438d3 257 *valuePtr = newValue;
switches 0:5c4d7b2438d3 258 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 259 return newValue;
switches 0:5c4d7b2438d3 260 }
switches 0:5c4d7b2438d3 261
switches 0:5c4d7b2438d3 262 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
switches 0:5c4d7b2438d3 263 {
switches 0:5c4d7b2438d3 264 uint32_t newValue;
switches 0:5c4d7b2438d3 265 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 266 newValue = *valuePtr + delta;
switches 0:5c4d7b2438d3 267 *valuePtr = newValue;
switches 0:5c4d7b2438d3 268 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 269 return newValue;
switches 0:5c4d7b2438d3 270 }
switches 0:5c4d7b2438d3 271
switches 0:5c4d7b2438d3 272
switches 0:5c4d7b2438d3 273 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
switches 0:5c4d7b2438d3 274 {
switches 0:5c4d7b2438d3 275 uint8_t newValue;
switches 0:5c4d7b2438d3 276 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 277 newValue = *valuePtr - delta;
switches 0:5c4d7b2438d3 278 *valuePtr = newValue;
switches 0:5c4d7b2438d3 279 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 280 return newValue;
switches 0:5c4d7b2438d3 281 }
switches 0:5c4d7b2438d3 282
switches 0:5c4d7b2438d3 283 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
switches 0:5c4d7b2438d3 284 {
switches 0:5c4d7b2438d3 285 uint16_t newValue;
switches 0:5c4d7b2438d3 286 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 287 newValue = *valuePtr - delta;
switches 0:5c4d7b2438d3 288 *valuePtr = newValue;
switches 0:5c4d7b2438d3 289 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 290 return newValue;
switches 0:5c4d7b2438d3 291 }
switches 0:5c4d7b2438d3 292
switches 0:5c4d7b2438d3 293 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
switches 0:5c4d7b2438d3 294 {
switches 0:5c4d7b2438d3 295 uint32_t newValue;
switches 0:5c4d7b2438d3 296 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 297 newValue = *valuePtr - delta;
switches 0:5c4d7b2438d3 298 *valuePtr = newValue;
switches 0:5c4d7b2438d3 299 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 300 return newValue;
switches 0:5c4d7b2438d3 301 }
switches 0:5c4d7b2438d3 302
switches 0:5c4d7b2438d3 303 #endif
switches 0:5c4d7b2438d3 304
switches 0:5c4d7b2438d3 305
switches 0:5c4d7b2438d3 306 bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) {
switches 0:5c4d7b2438d3 307 return core_util_atomic_cas_u32(
switches 0:5c4d7b2438d3 308 (uint32_t *)ptr,
switches 0:5c4d7b2438d3 309 (uint32_t *)expectedCurrentValue,
switches 0:5c4d7b2438d3 310 (uint32_t)desiredValue);
switches 0:5c4d7b2438d3 311 }
switches 0:5c4d7b2438d3 312
switches 0:5c4d7b2438d3 313 void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) {
switches 0:5c4d7b2438d3 314 return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta);
switches 0:5c4d7b2438d3 315 }
switches 0:5c4d7b2438d3 316
switches 0:5c4d7b2438d3 317 void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) {
switches 0:5c4d7b2438d3 318 return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta);
switches 0:5c4d7b2438d3 319 }
switches 0:5c4d7b2438d3 320