Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

drivers/SPISlave.h@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /* mbed Microcontroller Library
switches 0:5c4d7b2438d3 2 * Copyright (c) 2006-2013 ARM Limited
switches 0:5c4d7b2438d3 3 *
switches 0:5c4d7b2438d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
switches 0:5c4d7b2438d3 5 * you may not use this file except in compliance with the License.
switches 0:5c4d7b2438d3 6 * You may obtain a copy of the License at
switches 0:5c4d7b2438d3 7 *
switches 0:5c4d7b2438d3 8 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:5c4d7b2438d3 9 *
switches 0:5c4d7b2438d3 10 * Unless required by applicable law or agreed to in writing, software
switches 0:5c4d7b2438d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
switches 0:5c4d7b2438d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:5c4d7b2438d3 13 * See the License for the specific language governing permissions and
switches 0:5c4d7b2438d3 14 * limitations under the License.
switches 0:5c4d7b2438d3 15 */
switches 0:5c4d7b2438d3 16 #ifndef MBED_SPISLAVE_H
switches 0:5c4d7b2438d3 17 #define MBED_SPISLAVE_H
switches 0:5c4d7b2438d3 18
switches 0:5c4d7b2438d3 19 #include "platform/platform.h"
switches 0:5c4d7b2438d3 20
switches 0:5c4d7b2438d3 21 #if DEVICE_SPISLAVE
switches 0:5c4d7b2438d3 22
switches 0:5c4d7b2438d3 23 #include "hal/spi_api.h"
switches 0:5c4d7b2438d3 24
switches 0:5c4d7b2438d3 25 namespace mbed {
switches 0:5c4d7b2438d3 26 /** \addtogroup drivers */
switches 0:5c4d7b2438d3 27 /** @{*/
switches 0:5c4d7b2438d3 28
switches 0:5c4d7b2438d3 29 /** A SPI slave, used for communicating with a SPI Master device
switches 0:5c4d7b2438d3 30 *
switches 0:5c4d7b2438d3 31 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
switches 0:5c4d7b2438d3 32 *
switches 0:5c4d7b2438d3 33 * @Note Synchronization level: Not protected
switches 0:5c4d7b2438d3 34 *
switches 0:5c4d7b2438d3 35 * Example:
switches 0:5c4d7b2438d3 36 * @code
switches 0:5c4d7b2438d3 37 * // Reply to a SPI master as slave
switches 0:5c4d7b2438d3 38 *
switches 0:5c4d7b2438d3 39 * #include "mbed.h"
switches 0:5c4d7b2438d3 40 *
switches 0:5c4d7b2438d3 41 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
switches 0:5c4d7b2438d3 42 *
switches 0:5c4d7b2438d3 43 * int main() {
switches 0:5c4d7b2438d3 44 * device.reply(0x00); // Prime SPI with first reply
switches 0:5c4d7b2438d3 45 * while(1) {
switches 0:5c4d7b2438d3 46 * if(device.receive()) {
switches 0:5c4d7b2438d3 47 * int v = device.read(); // Read byte from master
switches 0:5c4d7b2438d3 48 * v = (v + 1) % 0x100; // Add one to it, modulo 256
switches 0:5c4d7b2438d3 49 * device.reply(v); // Make this the next reply
switches 0:5c4d7b2438d3 50 * }
switches 0:5c4d7b2438d3 51 * }
switches 0:5c4d7b2438d3 52 * }
switches 0:5c4d7b2438d3 53 * @endcode
switches 0:5c4d7b2438d3 54 */
switches 0:5c4d7b2438d3 55 class SPISlave {
switches 0:5c4d7b2438d3 56
switches 0:5c4d7b2438d3 57 public:
switches 0:5c4d7b2438d3 58
switches 0:5c4d7b2438d3 59 /** Create a SPI slave connected to the specified pins
switches 0:5c4d7b2438d3 60 *
switches 0:5c4d7b2438d3 61 * mosi or miso can be specfied as NC if not used
switches 0:5c4d7b2438d3 62 *
switches 0:5c4d7b2438d3 63 * @param mosi SPI Master Out, Slave In pin
switches 0:5c4d7b2438d3 64 * @param miso SPI Master In, Slave Out pin
switches 0:5c4d7b2438d3 65 * @param sclk SPI Clock pin
switches 0:5c4d7b2438d3 66 * @param ssel SPI chip select pin
switches 0:5c4d7b2438d3 67 */
switches 0:5c4d7b2438d3 68 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
switches 0:5c4d7b2438d3 69
switches 0:5c4d7b2438d3 70 /** Configure the data transmission format
switches 0:5c4d7b2438d3 71 *
switches 0:5c4d7b2438d3 72 * @param bits Number of bits per SPI frame (4 - 16)
switches 0:5c4d7b2438d3 73 * @param mode Clock polarity and phase mode (0 - 3)
switches 0:5c4d7b2438d3 74 *
switches 0:5c4d7b2438d3 75 * @code
switches 0:5c4d7b2438d3 76 * mode | POL PHA
switches 0:5c4d7b2438d3 77 * -----+--------
switches 0:5c4d7b2438d3 78 * 0 | 0 0
switches 0:5c4d7b2438d3 79 * 1 | 0 1
switches 0:5c4d7b2438d3 80 * 2 | 1 0
switches 0:5c4d7b2438d3 81 * 3 | 1 1
switches 0:5c4d7b2438d3 82 * @endcode
switches 0:5c4d7b2438d3 83 */
switches 0:5c4d7b2438d3 84 void format(int bits, int mode = 0);
switches 0:5c4d7b2438d3 85
switches 0:5c4d7b2438d3 86 /** Set the spi bus clock frequency
switches 0:5c4d7b2438d3 87 *
switches 0:5c4d7b2438d3 88 * @param hz SCLK frequency in hz (default = 1MHz)
switches 0:5c4d7b2438d3 89 */
switches 0:5c4d7b2438d3 90 void frequency(int hz = 1000000);
switches 0:5c4d7b2438d3 91
switches 0:5c4d7b2438d3 92 /** Polls the SPI to see if data has been received
switches 0:5c4d7b2438d3 93 *
switches 0:5c4d7b2438d3 94 * @returns
switches 0:5c4d7b2438d3 95 * 0 if no data,
switches 0:5c4d7b2438d3 96 * 1 otherwise
switches 0:5c4d7b2438d3 97 */
switches 0:5c4d7b2438d3 98 int receive(void);
switches 0:5c4d7b2438d3 99
switches 0:5c4d7b2438d3 100 /** Retrieve data from receive buffer as slave
switches 0:5c4d7b2438d3 101 *
switches 0:5c4d7b2438d3 102 * @returns
switches 0:5c4d7b2438d3 103 * the data in the receive buffer
switches 0:5c4d7b2438d3 104 */
switches 0:5c4d7b2438d3 105 int read(void);
switches 0:5c4d7b2438d3 106
switches 0:5c4d7b2438d3 107 /** Fill the transmission buffer with the value to be written out
switches 0:5c4d7b2438d3 108 * as slave on the next received message from the master.
switches 0:5c4d7b2438d3 109 *
switches 0:5c4d7b2438d3 110 * @param value the data to be transmitted next
switches 0:5c4d7b2438d3 111 */
switches 0:5c4d7b2438d3 112 void reply(int value);
switches 0:5c4d7b2438d3 113
switches 0:5c4d7b2438d3 114 protected:
switches 0:5c4d7b2438d3 115 spi_t _spi;
switches 0:5c4d7b2438d3 116
switches 0:5c4d7b2438d3 117 int _bits;
switches 0:5c4d7b2438d3 118 int _mode;
switches 0:5c4d7b2438d3 119 int _hz;
switches 0:5c4d7b2438d3 120 };
switches 0:5c4d7b2438d3 121
switches 0:5c4d7b2438d3 122 } // namespace mbed
switches 0:5c4d7b2438d3 123
switches 0:5c4d7b2438d3 124 #endif
switches 0:5c4d7b2438d3 125
switches 0:5c4d7b2438d3 126 #endif
switches 0:5c4d7b2438d3 127
switches 0:5c4d7b2438d3 128 /** @}*/