Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

drivers/SPI.cpp@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /* mbed Microcontroller Library
switches 0:5c4d7b2438d3 2 * Copyright (c) 2006-2013 ARM Limited
switches 0:5c4d7b2438d3 3 *
switches 0:5c4d7b2438d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
switches 0:5c4d7b2438d3 5 * you may not use this file except in compliance with the License.
switches 0:5c4d7b2438d3 6 * You may obtain a copy of the License at
switches 0:5c4d7b2438d3 7 *
switches 0:5c4d7b2438d3 8 * http://www.apache.org/licenses/LICENSE-2.0
switches 0:5c4d7b2438d3 9 *
switches 0:5c4d7b2438d3 10 * Unless required by applicable law or agreed to in writing, software
switches 0:5c4d7b2438d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
switches 0:5c4d7b2438d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
switches 0:5c4d7b2438d3 13 * See the License for the specific language governing permissions and
switches 0:5c4d7b2438d3 14 * limitations under the License.
switches 0:5c4d7b2438d3 15 */
switches 0:5c4d7b2438d3 16 #include "drivers/SPI.h"
switches 0:5c4d7b2438d3 17 #include "platform/critical.h"
switches 0:5c4d7b2438d3 18
switches 0:5c4d7b2438d3 19 #if DEVICE_SPI
switches 0:5c4d7b2438d3 20
switches 0:5c4d7b2438d3 21 namespace mbed {
switches 0:5c4d7b2438d3 22
switches 0:5c4d7b2438d3 23 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
switches 0:5c4d7b2438d3 24 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
switches 0:5c4d7b2438d3 25 #endif
switches 0:5c4d7b2438d3 26
switches 0:5c4d7b2438d3 27 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
switches 0:5c4d7b2438d3 28 _spi(),
switches 0:5c4d7b2438d3 29 #if DEVICE_SPI_ASYNCH
switches 0:5c4d7b2438d3 30 _irq(this),
switches 0:5c4d7b2438d3 31 _usage(DMA_USAGE_NEVER),
switches 0:5c4d7b2438d3 32 #endif
switches 0:5c4d7b2438d3 33 _bits(8),
switches 0:5c4d7b2438d3 34 _mode(0),
switches 0:5c4d7b2438d3 35 _hz(1000000) {
switches 0:5c4d7b2438d3 36 // No lock needed in the constructor
switches 0:5c4d7b2438d3 37
switches 0:5c4d7b2438d3 38 spi_init(&_spi, mosi, miso, sclk, ssel);
switches 0:5c4d7b2438d3 39 aquire();
switches 0:5c4d7b2438d3 40 }
switches 0:5c4d7b2438d3 41
switches 0:5c4d7b2438d3 42 void SPI::format(int bits, int mode) {
switches 0:5c4d7b2438d3 43 lock();
switches 0:5c4d7b2438d3 44 _bits = bits;
switches 0:5c4d7b2438d3 45 _mode = mode;
switches 0:5c4d7b2438d3 46 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
switches 0:5c4d7b2438d3 47 aquire();
switches 0:5c4d7b2438d3 48 unlock();
switches 0:5c4d7b2438d3 49 }
switches 0:5c4d7b2438d3 50
switches 0:5c4d7b2438d3 51 void SPI::frequency(int hz) {
switches 0:5c4d7b2438d3 52 lock();
switches 0:5c4d7b2438d3 53 _hz = hz;
switches 0:5c4d7b2438d3 54 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
switches 0:5c4d7b2438d3 55 aquire();
switches 0:5c4d7b2438d3 56 unlock();
switches 0:5c4d7b2438d3 57 }
switches 0:5c4d7b2438d3 58
switches 0:5c4d7b2438d3 59 SPI* SPI::_owner = NULL;
switches 0:5c4d7b2438d3 60 SingletonPtr<PlatformMutex> SPI::_mutex;
switches 0:5c4d7b2438d3 61
switches 0:5c4d7b2438d3 62 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
switches 0:5c4d7b2438d3 63 void SPI::aquire() {
switches 0:5c4d7b2438d3 64 lock();
switches 0:5c4d7b2438d3 65 if (_owner != this) {
switches 0:5c4d7b2438d3 66 spi_format(&_spi, _bits, _mode, 0);
switches 0:5c4d7b2438d3 67 spi_frequency(&_spi, _hz);
switches 0:5c4d7b2438d3 68 _owner = this;
switches 0:5c4d7b2438d3 69 }
switches 0:5c4d7b2438d3 70 unlock();
switches 0:5c4d7b2438d3 71 }
switches 0:5c4d7b2438d3 72
switches 0:5c4d7b2438d3 73 int SPI::write(int value) {
switches 0:5c4d7b2438d3 74 lock();
switches 0:5c4d7b2438d3 75 aquire();
switches 0:5c4d7b2438d3 76 int ret = spi_master_write(&_spi, value);
switches 0:5c4d7b2438d3 77 unlock();
switches 0:5c4d7b2438d3 78 return ret;
switches 0:5c4d7b2438d3 79 }
switches 0:5c4d7b2438d3 80
switches 0:5c4d7b2438d3 81 void SPI::lock() {
switches 0:5c4d7b2438d3 82 _mutex->lock();
switches 0:5c4d7b2438d3 83 }
switches 0:5c4d7b2438d3 84
switches 0:5c4d7b2438d3 85 void SPI::unlock() {
switches 0:5c4d7b2438d3 86 _mutex->unlock();
switches 0:5c4d7b2438d3 87 }
switches 0:5c4d7b2438d3 88
switches 0:5c4d7b2438d3 89 #if DEVICE_SPI_ASYNCH
switches 0:5c4d7b2438d3 90
switches 0:5c4d7b2438d3 91 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
switches 0:5c4d7b2438d3 92 {
switches 0:5c4d7b2438d3 93 if (spi_active(&_spi)) {
switches 0:5c4d7b2438d3 94 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
switches 0:5c4d7b2438d3 95 }
switches 0:5c4d7b2438d3 96 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
switches 0:5c4d7b2438d3 97 return 0;
switches 0:5c4d7b2438d3 98 }
switches 0:5c4d7b2438d3 99
switches 0:5c4d7b2438d3 100 void SPI::abort_transfer()
switches 0:5c4d7b2438d3 101 {
switches 0:5c4d7b2438d3 102 spi_abort_asynch(&_spi);
switches 0:5c4d7b2438d3 103 #if TRANSACTION_QUEUE_SIZE_SPI
switches 0:5c4d7b2438d3 104 dequeue_transaction();
switches 0:5c4d7b2438d3 105 #endif
switches 0:5c4d7b2438d3 106 }
switches 0:5c4d7b2438d3 107
switches 0:5c4d7b2438d3 108
switches 0:5c4d7b2438d3 109 void SPI::clear_transfer_buffer()
switches 0:5c4d7b2438d3 110 {
switches 0:5c4d7b2438d3 111 #if TRANSACTION_QUEUE_SIZE_SPI
switches 0:5c4d7b2438d3 112 _transaction_buffer.reset();
switches 0:5c4d7b2438d3 113 #endif
switches 0:5c4d7b2438d3 114 }
switches 0:5c4d7b2438d3 115
switches 0:5c4d7b2438d3 116 void SPI::abort_all_transfers()
switches 0:5c4d7b2438d3 117 {
switches 0:5c4d7b2438d3 118 clear_transfer_buffer();
switches 0:5c4d7b2438d3 119 abort_transfer();
switches 0:5c4d7b2438d3 120 }
switches 0:5c4d7b2438d3 121
switches 0:5c4d7b2438d3 122 int SPI::set_dma_usage(DMAUsage usage)
switches 0:5c4d7b2438d3 123 {
switches 0:5c4d7b2438d3 124 if (spi_active(&_spi)) {
switches 0:5c4d7b2438d3 125 return -1;
switches 0:5c4d7b2438d3 126 }
switches 0:5c4d7b2438d3 127 _usage = usage;
switches 0:5c4d7b2438d3 128 return 0;
switches 0:5c4d7b2438d3 129 }
switches 0:5c4d7b2438d3 130
switches 0:5c4d7b2438d3 131 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
switches 0:5c4d7b2438d3 132 {
switches 0:5c4d7b2438d3 133 #if TRANSACTION_QUEUE_SIZE_SPI
switches 0:5c4d7b2438d3 134 transaction_t t;
switches 0:5c4d7b2438d3 135
switches 0:5c4d7b2438d3 136 t.tx_buffer = const_cast<void *>(tx_buffer);
switches 0:5c4d7b2438d3 137 t.tx_length = tx_length;
switches 0:5c4d7b2438d3 138 t.rx_buffer = rx_buffer;
switches 0:5c4d7b2438d3 139 t.rx_length = rx_length;
switches 0:5c4d7b2438d3 140 t.event = event;
switches 0:5c4d7b2438d3 141 t.callback = callback;
switches 0:5c4d7b2438d3 142 t.width = bit_width;
switches 0:5c4d7b2438d3 143 Transaction<SPI> transaction(this, t);
switches 0:5c4d7b2438d3 144 if (_transaction_buffer.full()) {
switches 0:5c4d7b2438d3 145 return -1; // the buffer is full
switches 0:5c4d7b2438d3 146 } else {
switches 0:5c4d7b2438d3 147 core_util_critical_section_enter();
switches 0:5c4d7b2438d3 148 _transaction_buffer.push(transaction);
switches 0:5c4d7b2438d3 149 if (!spi_active(&_spi)) {
switches 0:5c4d7b2438d3 150 dequeue_transaction();
switches 0:5c4d7b2438d3 151 }
switches 0:5c4d7b2438d3 152 core_util_critical_section_exit();
switches 0:5c4d7b2438d3 153 return 0;
switches 0:5c4d7b2438d3 154 }
switches 0:5c4d7b2438d3 155 #else
switches 0:5c4d7b2438d3 156 return -1;
switches 0:5c4d7b2438d3 157 #endif
switches 0:5c4d7b2438d3 158 }
switches 0:5c4d7b2438d3 159
switches 0:5c4d7b2438d3 160 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
switches 0:5c4d7b2438d3 161 {
switches 0:5c4d7b2438d3 162 aquire();
switches 0:5c4d7b2438d3 163 _callback = callback;
switches 0:5c4d7b2438d3 164 _irq.callback(&SPI::irq_handler_asynch);
switches 0:5c4d7b2438d3 165 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
switches 0:5c4d7b2438d3 166 }
switches 0:5c4d7b2438d3 167
switches 0:5c4d7b2438d3 168 #if TRANSACTION_QUEUE_SIZE_SPI
switches 0:5c4d7b2438d3 169
switches 0:5c4d7b2438d3 170 void SPI::start_transaction(transaction_t *data)
switches 0:5c4d7b2438d3 171 {
switches 0:5c4d7b2438d3 172 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
switches 0:5c4d7b2438d3 173 }
switches 0:5c4d7b2438d3 174
switches 0:5c4d7b2438d3 175 void SPI::dequeue_transaction()
switches 0:5c4d7b2438d3 176 {
switches 0:5c4d7b2438d3 177 Transaction<SPI> t;
switches 0:5c4d7b2438d3 178 if (_transaction_buffer.pop(t)) {
switches 0:5c4d7b2438d3 179 SPI* obj = t.get_object();
switches 0:5c4d7b2438d3 180 transaction_t* data = t.get_transaction();
switches 0:5c4d7b2438d3 181 obj->start_transaction(data);
switches 0:5c4d7b2438d3 182 }
switches 0:5c4d7b2438d3 183 }
switches 0:5c4d7b2438d3 184
switches 0:5c4d7b2438d3 185 #endif
switches 0:5c4d7b2438d3 186
switches 0:5c4d7b2438d3 187 void SPI::irq_handler_asynch(void)
switches 0:5c4d7b2438d3 188 {
switches 0:5c4d7b2438d3 189 int event = spi_irq_handler_asynch(&_spi);
switches 0:5c4d7b2438d3 190 if (_callback && (event & SPI_EVENT_ALL)) {
switches 0:5c4d7b2438d3 191 _callback.call(event & SPI_EVENT_ALL);
switches 0:5c4d7b2438d3 192 }
switches 0:5c4d7b2438d3 193 #if TRANSACTION_QUEUE_SIZE_SPI
switches 0:5c4d7b2438d3 194 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
switches 0:5c4d7b2438d3 195 // SPI peripheral is free (event happend), dequeue transaction
switches 0:5c4d7b2438d3 196 dequeue_transaction();
switches 0:5c4d7b2438d3 197 }
switches 0:5c4d7b2438d3 198 #endif
switches 0:5c4d7b2438d3 199 }
switches 0:5c4d7b2438d3 200
switches 0:5c4d7b2438d3 201 #endif
switches 0:5c4d7b2438d3 202
switches 0:5c4d7b2438d3 203 } // namespace mbed
switches 0:5c4d7b2438d3 204
switches 0:5c4d7b2438d3 205 #endif