Greg Steiert / pegasus_dev

Development mbed library for MAX32630FTHR

Dependents:   blinky_max32630fthr

cmsis/core_ca9.h@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /**************************************************************************//**
switches 0:5c4d7b2438d3 2 * @file core_ca9.h
switches 0:5c4d7b2438d3 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
switches 0:5c4d7b2438d3 4 * @version
switches 0:5c4d7b2438d3 5 * @date 25 March 2013
switches 0:5c4d7b2438d3 6 *
switches 0:5c4d7b2438d3 7 * @note
switches 0:5c4d7b2438d3 8 *
switches 0:5c4d7b2438d3 9 ******************************************************************************/
switches 0:5c4d7b2438d3 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
switches 0:5c4d7b2438d3 11
switches 0:5c4d7b2438d3 12 All rights reserved.
switches 0:5c4d7b2438d3 13 Redistribution and use in source and binary forms, with or without
switches 0:5c4d7b2438d3 14 modification, are permitted provided that the following conditions are met:
switches 0:5c4d7b2438d3 15 - Redistributions of source code must retain the above copyright
switches 0:5c4d7b2438d3 16 notice, this list of conditions and the following disclaimer.
switches 0:5c4d7b2438d3 17 - Redistributions in binary form must reproduce the above copyright
switches 0:5c4d7b2438d3 18 notice, this list of conditions and the following disclaimer in the
switches 0:5c4d7b2438d3 19 documentation and/or other materials provided with the distribution.
switches 0:5c4d7b2438d3 20 - Neither the name of ARM nor the names of its contributors may be used
switches 0:5c4d7b2438d3 21 to endorse or promote products derived from this software without
switches 0:5c4d7b2438d3 22 specific prior written permission.
switches 0:5c4d7b2438d3 23 *
switches 0:5c4d7b2438d3 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
switches 0:5c4d7b2438d3 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
switches 0:5c4d7b2438d3 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
switches 0:5c4d7b2438d3 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
switches 0:5c4d7b2438d3 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
switches 0:5c4d7b2438d3 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
switches 0:5c4d7b2438d3 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
switches 0:5c4d7b2438d3 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
switches 0:5c4d7b2438d3 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
switches 0:5c4d7b2438d3 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
switches 0:5c4d7b2438d3 34 POSSIBILITY OF SUCH DAMAGE.
switches 0:5c4d7b2438d3 35 ---------------------------------------------------------------------------*/
switches 0:5c4d7b2438d3 36
switches 0:5c4d7b2438d3 37
switches 0:5c4d7b2438d3 38 #if defined ( __ICCARM__ )
switches 0:5c4d7b2438d3 39 #pragma system_include /* treat file as system include file for MISRA check */
switches 0:5c4d7b2438d3 40 #endif
switches 0:5c4d7b2438d3 41
switches 0:5c4d7b2438d3 42 #ifdef __cplusplus
switches 0:5c4d7b2438d3 43 extern "C" {
switches 0:5c4d7b2438d3 44 #endif
switches 0:5c4d7b2438d3 45
switches 0:5c4d7b2438d3 46 #ifndef __CORE_CA9_H_GENERIC
switches 0:5c4d7b2438d3 47 #define __CORE_CA9_H_GENERIC
switches 0:5c4d7b2438d3 48
switches 0:5c4d7b2438d3 49
switches 0:5c4d7b2438d3 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
switches 0:5c4d7b2438d3 51 CMSIS violates the following MISRA-C:2004 rules:
switches 0:5c4d7b2438d3 52
switches 0:5c4d7b2438d3 53 \li Required Rule 8.5, object/function definition in header file.<br>
switches 0:5c4d7b2438d3 54 Function definitions in header files are used to allow 'inlining'.
switches 0:5c4d7b2438d3 55
switches 0:5c4d7b2438d3 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
switches 0:5c4d7b2438d3 57 Unions are used for effective representation of core registers.
switches 0:5c4d7b2438d3 58
switches 0:5c4d7b2438d3 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
switches 0:5c4d7b2438d3 60 Function-like macros are used to allow more efficient code.
switches 0:5c4d7b2438d3 61 */
switches 0:5c4d7b2438d3 62
switches 0:5c4d7b2438d3 63
switches 0:5c4d7b2438d3 64 /*******************************************************************************
switches 0:5c4d7b2438d3 65 * CMSIS definitions
switches 0:5c4d7b2438d3 66 ******************************************************************************/
switches 0:5c4d7b2438d3 67 /** \ingroup Cortex_A9
switches 0:5c4d7b2438d3 68 @{
switches 0:5c4d7b2438d3 69 */
switches 0:5c4d7b2438d3 70
switches 0:5c4d7b2438d3 71 /* CMSIS CA9 definitions */
switches 0:5c4d7b2438d3 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
switches 0:5c4d7b2438d3 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
switches 0:5c4d7b2438d3 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
switches 0:5c4d7b2438d3 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
switches 0:5c4d7b2438d3 76
switches 0:5c4d7b2438d3 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
switches 0:5c4d7b2438d3 78
switches 0:5c4d7b2438d3 79
switches 0:5c4d7b2438d3 80 #if defined ( __CC_ARM )
switches 0:5c4d7b2438d3 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
switches 0:5c4d7b2438d3 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
switches 0:5c4d7b2438d3 83 #define __STATIC_INLINE static __inline
switches 0:5c4d7b2438d3 84 #define __STATIC_ASM static __asm
switches 0:5c4d7b2438d3 85
switches 0:5c4d7b2438d3 86 #elif defined ( __ICCARM__ )
switches 0:5c4d7b2438d3 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
switches 0:5c4d7b2438d3 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
switches 0:5c4d7b2438d3 89 #define __STATIC_INLINE static inline
switches 0:5c4d7b2438d3 90 #define __STATIC_ASM static __asm
switches 0:5c4d7b2438d3 91
switches 0:5c4d7b2438d3 92 #include <stdint.h>
switches 0:5c4d7b2438d3 93 inline uint32_t __get_PSR(void) {
switches 0:5c4d7b2438d3 94 __ASM("mrs r0, cpsr");
switches 0:5c4d7b2438d3 95 }
switches 0:5c4d7b2438d3 96
switches 0:5c4d7b2438d3 97 #elif defined ( __TMS470__ )
switches 0:5c4d7b2438d3 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
switches 0:5c4d7b2438d3 99 #define __STATIC_INLINE static inline
switches 0:5c4d7b2438d3 100 #define __STATIC_ASM static __asm
switches 0:5c4d7b2438d3 101
switches 0:5c4d7b2438d3 102 #elif defined ( __GNUC__ )
switches 0:5c4d7b2438d3 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
switches 0:5c4d7b2438d3 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
switches 0:5c4d7b2438d3 105 #define __STATIC_INLINE static inline
switches 0:5c4d7b2438d3 106 #define __STATIC_ASM static __asm
switches 0:5c4d7b2438d3 107
switches 0:5c4d7b2438d3 108 #elif defined ( __TASKING__ )
switches 0:5c4d7b2438d3 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
switches 0:5c4d7b2438d3 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
switches 0:5c4d7b2438d3 111 #define __STATIC_INLINE static inline
switches 0:5c4d7b2438d3 112 #define __STATIC_ASM static __asm
switches 0:5c4d7b2438d3 113
switches 0:5c4d7b2438d3 114 #endif
switches 0:5c4d7b2438d3 115
switches 0:5c4d7b2438d3 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
switches 0:5c4d7b2438d3 117 */
switches 0:5c4d7b2438d3 118 #if defined ( __CC_ARM )
switches 0:5c4d7b2438d3 119 #if defined __TARGET_FPU_VFP
switches 0:5c4d7b2438d3 120 #if (__FPU_PRESENT == 1)
switches 0:5c4d7b2438d3 121 #define __FPU_USED 1
switches 0:5c4d7b2438d3 122 #else
switches 0:5c4d7b2438d3 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
switches 0:5c4d7b2438d3 124 #define __FPU_USED 0
switches 0:5c4d7b2438d3 125 #endif
switches 0:5c4d7b2438d3 126 #else
switches 0:5c4d7b2438d3 127 #define __FPU_USED 0
switches 0:5c4d7b2438d3 128 #endif
switches 0:5c4d7b2438d3 129
switches 0:5c4d7b2438d3 130 #elif defined ( __ICCARM__ )
switches 0:5c4d7b2438d3 131 #if defined __ARMVFP__
switches 0:5c4d7b2438d3 132 #if (__FPU_PRESENT == 1)
switches 0:5c4d7b2438d3 133 #define __FPU_USED 1
switches 0:5c4d7b2438d3 134 #else
switches 0:5c4d7b2438d3 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
switches 0:5c4d7b2438d3 136 #define __FPU_USED 0
switches 0:5c4d7b2438d3 137 #endif
switches 0:5c4d7b2438d3 138 #else
switches 0:5c4d7b2438d3 139 #define __FPU_USED 0
switches 0:5c4d7b2438d3 140 #endif
switches 0:5c4d7b2438d3 141
switches 0:5c4d7b2438d3 142 #elif defined ( __TMS470__ )
switches 0:5c4d7b2438d3 143 #if defined __TI_VFP_SUPPORT__
switches 0:5c4d7b2438d3 144 #if (__FPU_PRESENT == 1)
switches 0:5c4d7b2438d3 145 #define __FPU_USED 1
switches 0:5c4d7b2438d3 146 #else
switches 0:5c4d7b2438d3 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
switches 0:5c4d7b2438d3 148 #define __FPU_USED 0
switches 0:5c4d7b2438d3 149 #endif
switches 0:5c4d7b2438d3 150 #else
switches 0:5c4d7b2438d3 151 #define __FPU_USED 0
switches 0:5c4d7b2438d3 152 #endif
switches 0:5c4d7b2438d3 153
switches 0:5c4d7b2438d3 154 #elif defined ( __GNUC__ )
switches 0:5c4d7b2438d3 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
switches 0:5c4d7b2438d3 156 #if (__FPU_PRESENT == 1)
switches 0:5c4d7b2438d3 157 #define __FPU_USED 1
switches 0:5c4d7b2438d3 158 #else
switches 0:5c4d7b2438d3 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
switches 0:5c4d7b2438d3 160 #define __FPU_USED 0
switches 0:5c4d7b2438d3 161 #endif
switches 0:5c4d7b2438d3 162 #else
switches 0:5c4d7b2438d3 163 #define __FPU_USED 0
switches 0:5c4d7b2438d3 164 #endif
switches 0:5c4d7b2438d3 165
switches 0:5c4d7b2438d3 166 #elif defined ( __TASKING__ )
switches 0:5c4d7b2438d3 167 #if defined __FPU_VFP__
switches 0:5c4d7b2438d3 168 #if (__FPU_PRESENT == 1)
switches 0:5c4d7b2438d3 169 #define __FPU_USED 1
switches 0:5c4d7b2438d3 170 #else
switches 0:5c4d7b2438d3 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
switches 0:5c4d7b2438d3 172 #define __FPU_USED 0
switches 0:5c4d7b2438d3 173 #endif
switches 0:5c4d7b2438d3 174 #else
switches 0:5c4d7b2438d3 175 #define __FPU_USED 0
switches 0:5c4d7b2438d3 176 #endif
switches 0:5c4d7b2438d3 177 #endif
switches 0:5c4d7b2438d3 178
switches 0:5c4d7b2438d3 179 #include <stdint.h> /*!< standard types definitions */
switches 0:5c4d7b2438d3 180 #include "core_caInstr.h" /*!< Core Instruction Access */
switches 0:5c4d7b2438d3 181 #include "core_caFunc.h" /*!< Core Function Access */
switches 0:5c4d7b2438d3 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
switches 0:5c4d7b2438d3 183
switches 0:5c4d7b2438d3 184 #endif /* __CORE_CA9_H_GENERIC */
switches 0:5c4d7b2438d3 185
switches 0:5c4d7b2438d3 186 #ifndef __CMSIS_GENERIC
switches 0:5c4d7b2438d3 187
switches 0:5c4d7b2438d3 188 #ifndef __CORE_CA9_H_DEPENDANT
switches 0:5c4d7b2438d3 189 #define __CORE_CA9_H_DEPENDANT
switches 0:5c4d7b2438d3 190
switches 0:5c4d7b2438d3 191 /* check device defines and use defaults */
switches 0:5c4d7b2438d3 192 #if defined __CHECK_DEVICE_DEFINES
switches 0:5c4d7b2438d3 193 #ifndef __CA9_REV
switches 0:5c4d7b2438d3 194 #define __CA9_REV 0x0000
switches 0:5c4d7b2438d3 195 #warning "__CA9_REV not defined in device header file; using default!"
switches 0:5c4d7b2438d3 196 #endif
switches 0:5c4d7b2438d3 197
switches 0:5c4d7b2438d3 198 #ifndef __FPU_PRESENT
switches 0:5c4d7b2438d3 199 #define __FPU_PRESENT 1
switches 0:5c4d7b2438d3 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
switches 0:5c4d7b2438d3 201 #endif
switches 0:5c4d7b2438d3 202
switches 0:5c4d7b2438d3 203 #ifndef __Vendor_SysTickConfig
switches 0:5c4d7b2438d3 204 #define __Vendor_SysTickConfig 1
switches 0:5c4d7b2438d3 205 #endif
switches 0:5c4d7b2438d3 206
switches 0:5c4d7b2438d3 207 #if __Vendor_SysTickConfig == 0
switches 0:5c4d7b2438d3 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
switches 0:5c4d7b2438d3 209 #endif
switches 0:5c4d7b2438d3 210 #endif
switches 0:5c4d7b2438d3 211
switches 0:5c4d7b2438d3 212 /* IO definitions (access restrictions to peripheral registers) */
switches 0:5c4d7b2438d3 213 /**
switches 0:5c4d7b2438d3 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
switches 0:5c4d7b2438d3 215
switches 0:5c4d7b2438d3 216 <strong>IO Type Qualifiers</strong> are used
switches 0:5c4d7b2438d3 217 \li to specify the access to peripheral variables.
switches 0:5c4d7b2438d3 218 \li for automatic generation of peripheral register debug information.
switches 0:5c4d7b2438d3 219 */
switches 0:5c4d7b2438d3 220 #ifdef __cplusplus
switches 0:5c4d7b2438d3 221 #define __I volatile /*!< Defines 'read only' permissions */
switches 0:5c4d7b2438d3 222 #else
switches 0:5c4d7b2438d3 223 #define __I volatile const /*!< Defines 'read only' permissions */
switches 0:5c4d7b2438d3 224 #endif
switches 0:5c4d7b2438d3 225 #define __O volatile /*!< Defines 'write only' permissions */
switches 0:5c4d7b2438d3 226 #define __IO volatile /*!< Defines 'read / write' permissions */
switches 0:5c4d7b2438d3 227
switches 0:5c4d7b2438d3 228 /*@} end of group Cortex_A9 */
switches 0:5c4d7b2438d3 229
switches 0:5c4d7b2438d3 230
switches 0:5c4d7b2438d3 231 /*******************************************************************************
switches 0:5c4d7b2438d3 232 * Register Abstraction
switches 0:5c4d7b2438d3 233 ******************************************************************************/
switches 0:5c4d7b2438d3 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
switches 0:5c4d7b2438d3 235 \brief Type definitions and defines for Cortex-A processor based devices.
switches 0:5c4d7b2438d3 236 */
switches 0:5c4d7b2438d3 237
switches 0:5c4d7b2438d3 238 /** \ingroup CMSIS_core_register
switches 0:5c4d7b2438d3 239 \defgroup CMSIS_CORE Status and Control Registers
switches 0:5c4d7b2438d3 240 \brief Core Register type definitions.
switches 0:5c4d7b2438d3 241 @{
switches 0:5c4d7b2438d3 242 */
switches 0:5c4d7b2438d3 243
switches 0:5c4d7b2438d3 244 /** \brief Union type to access the Application Program Status Register (APSR).
switches 0:5c4d7b2438d3 245 */
switches 0:5c4d7b2438d3 246 typedef union
switches 0:5c4d7b2438d3 247 {
switches 0:5c4d7b2438d3 248 struct
switches 0:5c4d7b2438d3 249 {
switches 0:5c4d7b2438d3 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
switches 0:5c4d7b2438d3 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
switches 0:5c4d7b2438d3 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
switches 0:5c4d7b2438d3 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
switches 0:5c4d7b2438d3 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
switches 0:5c4d7b2438d3 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
switches 0:5c4d7b2438d3 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
switches 0:5c4d7b2438d3 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
switches 0:5c4d7b2438d3 258 } b; /*!< Structure used for bit access */
switches 0:5c4d7b2438d3 259 uint32_t w; /*!< Type used for word access */
switches 0:5c4d7b2438d3 260 } APSR_Type;
switches 0:5c4d7b2438d3 261
switches 0:5c4d7b2438d3 262
switches 0:5c4d7b2438d3 263 /*@} end of group CMSIS_CORE */
switches 0:5c4d7b2438d3 264
switches 0:5c4d7b2438d3 265 /*@} end of CMSIS_Core_FPUFunctions */
switches 0:5c4d7b2438d3 266
switches 0:5c4d7b2438d3 267
switches 0:5c4d7b2438d3 268 #endif /* __CORE_CA9_H_GENERIC */
switches 0:5c4d7b2438d3 269
switches 0:5c4d7b2438d3 270 #endif /* __CMSIS_GENERIC */
switches 0:5c4d7b2438d3 271
switches 0:5c4d7b2438d3 272 #ifdef __cplusplus
switches 0:5c4d7b2438d3 273 }
switches 0:5c4d7b2438d3 274
switches 0:5c4d7b2438d3 275
switches 0:5c4d7b2438d3 276 #endif