Greg Steiert / maxim-dev

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sai_ex.c@164:2e7515f8c45d, 2017-03-24 (annotated)

Committer:
switches
Date:
Fri Mar 24 15:15:13 2017 +0000
Revision:
164:2e7515f8c45d
Parent:
149:156823d33999 
Added low level init to clear IO registers

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_sai_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.0
<> 144:ef7eb2e8f9f7 6 * @date 06-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief SAI Extension HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of SAI extension peripheral:
<> 144:ef7eb2e8f9f7 10 * + Extension features functions
<> 144:ef7eb2e8f9f7 11 *
<> 144:ef7eb2e8f9f7 12 @verbatim
<> 144:ef7eb2e8f9f7 13 ==============================================================================
<> 144:ef7eb2e8f9f7 14 ##### SAI peripheral extension features #####
<> 144:ef7eb2e8f9f7 15 ==============================================================================
<> 144:ef7eb2e8f9f7 16
<> 144:ef7eb2e8f9f7 17 [..] Comparing to other previous devices, the SAI interface for STM32F446xx
<> 144:ef7eb2e8f9f7 18 devices contains the following additional features :
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 (+) Possibility to be clocked from PLLR
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 23 ==============================================================================
<> 144:ef7eb2e8f9f7 24 [..] This driver provides functions to manage several sources to clock SAI
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 @endverbatim
<> 144:ef7eb2e8f9f7 27 ******************************************************************************
<> 144:ef7eb2e8f9f7 28 * @attention
<> 144:ef7eb2e8f9f7 29 *
<> 144:ef7eb2e8f9f7 30 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 31 *
<> 144:ef7eb2e8f9f7 32 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 33 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 34 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 35 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 36 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 37 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 38 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 39 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 40 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 41 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 42 *
<> 144:ef7eb2e8f9f7 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 44 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 46 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 49 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 50 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 53 *
<> 144:ef7eb2e8f9f7 54 ******************************************************************************
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 #include "stm32f4xx_hal.h"
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /** @defgroup SAIEx SAIEx
<> 144:ef7eb2e8f9f7 65 * @brief SAI Extension HAL module driver
<> 144:ef7eb2e8f9f7 66 * @{
<> 144:ef7eb2e8f9f7 67 */
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 #ifdef HAL_SAI_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
<> 144:ef7eb2e8f9f7 72 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 75 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 76 /* SAI registers Masks */
<> 144:ef7eb2e8f9f7 77 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 78 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 79 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 80 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /** @defgroup SAI_Private_Functions SAI Private Functions
<> 144:ef7eb2e8f9f7 83 * @{
<> 144:ef7eb2e8f9f7 84 */
<> 144:ef7eb2e8f9f7 85 /**
<> 144:ef7eb2e8f9f7 86 * @}
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 90 /** @defgroup SAIEx_Exported_Functions SAI Extended Exported Functions
<> 144:ef7eb2e8f9f7 91 * @{
<> 144:ef7eb2e8f9f7 92 */
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 /** @defgroup SAIEx_Exported_Functions_Group1 Extension features functions
<> 144:ef7eb2e8f9f7 95 * @brief Extension features functions
<> 144:ef7eb2e8f9f7 96 *
<> 144:ef7eb2e8f9f7 97 @verbatim
<> 144:ef7eb2e8f9f7 98 ===============================================================================
<> 144:ef7eb2e8f9f7 99 ##### Extension features Functions #####
<> 144:ef7eb2e8f9f7 100 ===============================================================================
<> 144:ef7eb2e8f9f7 101 [..]
<> 144:ef7eb2e8f9f7 102 This subsection provides a set of functions allowing to manage the possible
<> 144:ef7eb2e8f9f7 103 SAI clock sources.
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 @endverbatim
<> 144:ef7eb2e8f9f7 106 * @{
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /**
<> 144:ef7eb2e8f9f7 110 * @brief Configure SAI Block synchronization mode
<> 144:ef7eb2e8f9f7 111 * @param hsai: pointer to a SAI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 112 * the configuration information for SAI module.
<> 144:ef7eb2e8f9f7 113 * @retval SAI Clock Input
<> 144:ef7eb2e8f9f7 114 */
<> 144:ef7eb2e8f9f7 115 void SAI_BlockSynchroConfig(SAI_HandleTypeDef *hsai)
<> 144:ef7eb2e8f9f7 116 {
<> 144:ef7eb2e8f9f7 117 uint32_t tmpregisterGCR = 0U;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 #if defined(STM32F446xx)
<> 144:ef7eb2e8f9f7 120 /* This setting must be done with both audio block (A & B) disabled */
<> 144:ef7eb2e8f9f7 121 switch(hsai->Init.SynchroExt)
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 case SAI_SYNCEXT_DISABLE :
<> 144:ef7eb2e8f9f7 124 tmpregisterGCR = 0U;
<> 144:ef7eb2e8f9f7 125 break;
<> 144:ef7eb2e8f9f7 126 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
<> 144:ef7eb2e8f9f7 127 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
<> 144:ef7eb2e8f9f7 128 break;
<> 144:ef7eb2e8f9f7 129 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
<> 144:ef7eb2e8f9f7 130 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
<> 144:ef7eb2e8f9f7 131 break;
<> 144:ef7eb2e8f9f7 132 default:
<> 144:ef7eb2e8f9f7 133 break;
<> 144:ef7eb2e8f9f7 134 }
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 if((hsai->Init.Synchro) == SAI_SYNCHRONOUS_EXT_SAI2)
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 tmpregisterGCR |= SAI_GCR_SYNCIN_0;
<> 144:ef7eb2e8f9f7 139 }
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 if((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
<> 144:ef7eb2e8f9f7 142 {
<> 144:ef7eb2e8f9f7 143 SAI1->GCR = tmpregisterGCR;
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145 else
<> 144:ef7eb2e8f9f7 146 {
<> 144:ef7eb2e8f9f7 147 SAI2->GCR = tmpregisterGCR;
<> 144:ef7eb2e8f9f7 148 }
<> 144:ef7eb2e8f9f7 149 #endif /* STM32F446xx */
<> 144:ef7eb2e8f9f7 150 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
<> 144:ef7eb2e8f9f7 151 defined(STM32F469xx) || defined(STM32F479xx)
<> 144:ef7eb2e8f9f7 152 /* This setting must be done with both audio block (A & B) disabled */
<> 144:ef7eb2e8f9f7 153 switch(hsai->Init.SynchroExt)
<> 144:ef7eb2e8f9f7 154 {
<> 144:ef7eb2e8f9f7 155 case SAI_SYNCEXT_DISABLE :
<> 144:ef7eb2e8f9f7 156 tmpregisterGCR = 0U;
<> 144:ef7eb2e8f9f7 157 break;
<> 144:ef7eb2e8f9f7 158 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
<> 144:ef7eb2e8f9f7 159 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
<> 144:ef7eb2e8f9f7 160 break;
<> 144:ef7eb2e8f9f7 161 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
<> 144:ef7eb2e8f9f7 162 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
<> 144:ef7eb2e8f9f7 163 break;
<> 144:ef7eb2e8f9f7 164 default:
<> 144:ef7eb2e8f9f7 165 break;
<> 144:ef7eb2e8f9f7 166 }
<> 144:ef7eb2e8f9f7 167 SAI1->GCR = tmpregisterGCR;
<> 144:ef7eb2e8f9f7 168 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170 /**
<> 144:ef7eb2e8f9f7 171 * @brief Get SAI Input Clock based on SAI source clock selection
<> 144:ef7eb2e8f9f7 172 * @param hsai: pointer to a SAI_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 173 * the configuration information for SAI module.
<> 144:ef7eb2e8f9f7 174 * @retval SAI Clock Input
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176 uint32_t SAI_GetInputClock(SAI_HandleTypeDef *hsai)
<> 144:ef7eb2e8f9f7 177 {
<> 144:ef7eb2e8f9f7 178 /* This variable used to store the SAI_CK_x (value in Hz) */
<> 144:ef7eb2e8f9f7 179 uint32_t saiclocksource = 0U;
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 #if defined(STM32F446xx)
<> 144:ef7eb2e8f9f7 182 if ((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
<> 144:ef7eb2e8f9f7 183 {
<> 144:ef7eb2e8f9f7 184 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1);
<> 144:ef7eb2e8f9f7 185 }
<> 144:ef7eb2e8f9f7 186 else /* SAI2_Block_A || SAI2_Block_B*/
<> 144:ef7eb2e8f9f7 187 {
<> 144:ef7eb2e8f9f7 188 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI2);
<> 144:ef7eb2e8f9f7 189 }
<> 144:ef7eb2e8f9f7 190 #endif /* STM32F446xx */
<> 144:ef7eb2e8f9f7 191 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
<> 144:ef7eb2e8f9f7 192 defined(STM32F469xx) || defined(STM32F479xx)
<> 144:ef7eb2e8f9f7 193 uint32_t vcoinput = 0U, tmpreg = 0U;
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Check the SAI Block parameters */
<> 144:ef7eb2e8f9f7 196 assert_param(IS_SAI_CLK_SOURCE(hsai->Init.ClockSource));
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /* SAI Block clock source selection */
<> 144:ef7eb2e8f9f7 199 if(hsai->Instance == SAI1_Block_A)
<> 144:ef7eb2e8f9f7 200 {
<> 144:ef7eb2e8f9f7 201 __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(hsai->Init.ClockSource);
<> 144:ef7eb2e8f9f7 202 }
<> 144:ef7eb2e8f9f7 203 else
<> 144:ef7eb2e8f9f7 204 {
<> 144:ef7eb2e8f9f7 205 __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG((uint32_t)(hsai->Init.ClockSource << 2U));
<> 144:ef7eb2e8f9f7 206 }
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 /* VCO Input Clock value calculation */
<> 144:ef7eb2e8f9f7 209 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
<> 144:ef7eb2e8f9f7 210 {
<> 144:ef7eb2e8f9f7 211 /* In Case the PLL Source is HSI (Internal Clock) */
<> 144:ef7eb2e8f9f7 212 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
<> 144:ef7eb2e8f9f7 213 }
<> 144:ef7eb2e8f9f7 214 else
<> 144:ef7eb2e8f9f7 215 {
<> 144:ef7eb2e8f9f7 216 /* In Case the PLL Source is HSE (External Clock) */
<> 144:ef7eb2e8f9f7 217 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
<> 144:ef7eb2e8f9f7 218 }
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
<> 144:ef7eb2e8f9f7 221 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLSAI)
<> 144:ef7eb2e8f9f7 222 {
<> 144:ef7eb2e8f9f7 223 /* Configure the PLLI2S division factor */
<> 144:ef7eb2e8f9f7 224 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
<> 144:ef7eb2e8f9f7 225 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
<> 144:ef7eb2e8f9f7 226 /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
<> 144:ef7eb2e8f9f7 227 tmpreg = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24U;
<> 144:ef7eb2e8f9f7 228 saiclocksource = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6U))/(tmpreg);
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
<> 144:ef7eb2e8f9f7 231 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> 8U) + 1U);
<> 144:ef7eb2e8f9f7 232 saiclocksource = saiclocksource/(tmpreg);
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 }
<> 144:ef7eb2e8f9f7 235 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
<> 144:ef7eb2e8f9f7 236 {
<> 144:ef7eb2e8f9f7 237 /* Configure the PLLI2S division factor */
<> 144:ef7eb2e8f9f7 238 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
<> 144:ef7eb2e8f9f7 239 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
<> 144:ef7eb2e8f9f7 240 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
<> 144:ef7eb2e8f9f7 241 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24U;
<> 144:ef7eb2e8f9f7 242 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
<> 144:ef7eb2e8f9f7 245 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) + 1U);
<> 144:ef7eb2e8f9f7 246 saiclocksource = saiclocksource/(tmpreg);
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
<> 144:ef7eb2e8f9f7 249 {
<> 144:ef7eb2e8f9f7 250 /* Enable the External Clock selection */
<> 144:ef7eb2e8f9f7 251 __HAL_RCC_I2S_CONFIG(RCC_I2SCLKSOURCE_EXT);
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 saiclocksource = EXTERNAL_CLOCK_VALUE;
<> 144:ef7eb2e8f9f7 254 }
<> 144:ef7eb2e8f9f7 255 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
<> 144:ef7eb2e8f9f7 256 /* the return result is the value of SAI clock */
<> 144:ef7eb2e8f9f7 257 return saiclocksource;
<> 144:ef7eb2e8f9f7 258 }
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /**
<> 144:ef7eb2e8f9f7 265 * @}
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
<> 144:ef7eb2e8f9f7 269 #endif /* HAL_SAI_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 270 /**
<> 144:ef7eb2e8f9f7 271 * @}
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 /**
<> 144:ef7eb2e8f9f7 275 * @}
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/