Greg Steiert / maxim-dev

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targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_pcd.h@164:2e7515f8c45d, 2017-03-24 (annotated)

Committer:
switches
Date:
Fri Mar 24 15:15:13 2017 +0000
Revision:
164:2e7515f8c45d
Parent:
157:ff67d9f36b67 
Added low level init to clear IO registers

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f3xx_hal_pcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 157:ff67d9f36b67 5 * @version V1.4.0
<> 157:ff67d9f36b67 6 * @date 16-December-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of PCD HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F3xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F3xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #if defined(STM32F302xE) || defined(STM32F303xE) || \
<> 144:ef7eb2e8f9f7 47 defined(STM32F302xC) || defined(STM32F303xC) || \
<> 144:ef7eb2e8f9f7 48 defined(STM32F302x8) || \
<> 144:ef7eb2e8f9f7 49 defined(STM32F373xC)
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 52 #include "stm32f3xx_hal_def.h"
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /** @addtogroup STM32F3xx_HAL_Driver
<> 144:ef7eb2e8f9f7 55 * @{
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /** @addtogroup PCD
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 63 /** @defgroup PCD_Exported_Types PCD Exported Types
<> 144:ef7eb2e8f9f7 64 * @{
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /**
<> 144:ef7eb2e8f9f7 68 * @brief PCD State structure definition
<> 144:ef7eb2e8f9f7 69 */
<> 144:ef7eb2e8f9f7 70 typedef enum
<> 144:ef7eb2e8f9f7 71 {
<> 157:ff67d9f36b67 72 HAL_PCD_STATE_RESET = 0x00U,
<> 157:ff67d9f36b67 73 HAL_PCD_STATE_READY = 0x01U,
<> 157:ff67d9f36b67 74 HAL_PCD_STATE_ERROR = 0x02U,
<> 157:ff67d9f36b67 75 HAL_PCD_STATE_BUSY = 0x03U,
<> 157:ff67d9f36b67 76 HAL_PCD_STATE_TIMEOUT = 0x04U
<> 144:ef7eb2e8f9f7 77 } PCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 /**
<> 144:ef7eb2e8f9f7 80 * @brief PCD double buffered endpoint direction
<> 144:ef7eb2e8f9f7 81 */
<> 144:ef7eb2e8f9f7 82 typedef enum
<> 144:ef7eb2e8f9f7 83 {
<> 144:ef7eb2e8f9f7 84 PCD_EP_DBUF_OUT,
<> 144:ef7eb2e8f9f7 85 PCD_EP_DBUF_IN,
<> 144:ef7eb2e8f9f7 86 PCD_EP_DBUF_ERR,
<> 144:ef7eb2e8f9f7 87 }PCD_EP_DBUF_DIR;
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /**
<> 144:ef7eb2e8f9f7 90 * @brief PCD endpoint buffer number
<> 144:ef7eb2e8f9f7 91 */
<> 144:ef7eb2e8f9f7 92 typedef enum
<> 144:ef7eb2e8f9f7 93 {
<> 144:ef7eb2e8f9f7 94 PCD_EP_NOBUF,
<> 144:ef7eb2e8f9f7 95 PCD_EP_BUF0,
<> 144:ef7eb2e8f9f7 96 PCD_EP_BUF1
<> 144:ef7eb2e8f9f7 97 }PCD_EP_BUF_NUM;
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /**
<> 144:ef7eb2e8f9f7 100 * @brief PCD Initialization Structure definition
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102 typedef struct
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 uint32_t dev_endpoints; /*!< Device Endpoints number.
<> 144:ef7eb2e8f9f7 105 This parameter depends on the used USB core.
<> 144:ef7eb2e8f9f7 106 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 uint32_t speed; /*!< USB Core speed.
<> 144:ef7eb2e8f9f7 109 This parameter can be any value of @ref PCD_Core_Speed */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
<> 144:ef7eb2e8f9f7 112 This parameter can be any value of @ref PCD_EP0_MPS */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 uint32_t phy_itface; /*!< Select the used PHY interface.
<> 144:ef7eb2e8f9f7 115 This parameter can be any value of @ref PCD_Core_PHY */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
<> 144:ef7eb2e8f9f7 118 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint32_t low_power_enable; /*!< Enable or disable Low Power mode
<> 144:ef7eb2e8f9f7 121 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
<> 144:ef7eb2e8f9f7 124 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
<> 144:ef7eb2e8f9f7 127 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 }PCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 typedef struct
<> 144:ef7eb2e8f9f7 132 {
<> 144:ef7eb2e8f9f7 133 uint8_t num; /*!< Endpoint number
<> 144:ef7eb2e8f9f7 134 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 uint8_t is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 137 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 uint8_t is_stall; /*!< Endpoint stall condition
<> 144:ef7eb2e8f9f7 140 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 uint8_t type; /*!< Endpoint type
<> 144:ef7eb2e8f9f7 143 This parameter can be any value of @ref PCD_EP_Type */
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 uint16_t pmaadress; /*!< PMA Address
<> 144:ef7eb2e8f9f7 146 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 uint16_t pmaaddr0; /*!< PMA Address0
<> 144:ef7eb2e8f9f7 150 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 uint16_t pmaaddr1; /*!< PMA Address1
<> 144:ef7eb2e8f9f7 154 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 uint8_t doublebuffer; /*!< Double buffer enable
<> 144:ef7eb2e8f9f7 158 This parameter can be 0 or 1 */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 uint32_t maxpacket; /*!< Endpoint Max packet size
<> 144:ef7eb2e8f9f7 161 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 uint32_t xfer_len; /*!< Current transfer length */
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 }PCD_EPTypeDef;
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 typedef USB_TypeDef PCD_TypeDef;
<> 144:ef7eb2e8f9f7 173
<> 153:fa9ff456f731 174 typedef struct
<> 153:fa9ff456f731 175 {
<> 153:fa9ff456f731 176 HAL_LockTypeDef Lock;
<> 153:fa9ff456f731 177 } PCD_EPLockDef;
<> 153:fa9ff456f731 178
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @brief PCD Handle Structure definition
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182 typedef struct
<> 144:ef7eb2e8f9f7 183 {
<> 144:ef7eb2e8f9f7 184 PCD_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 185 PCD_InitTypeDef Init; /*!< PCD required parameters */
<> 144:ef7eb2e8f9f7 186 __IO uint8_t USB_Address; /*!< USB Address */
<> 144:ef7eb2e8f9f7 187 PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */
<> 144:ef7eb2e8f9f7 188 PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */
<> 144:ef7eb2e8f9f7 189 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
<> 153:fa9ff456f731 190 PCD_EPLockDef EPLock[15];
<> 144:ef7eb2e8f9f7 191 __IO PCD_StateTypeDef State; /*!< PCD communication state */
<> 144:ef7eb2e8f9f7 192 uint32_t Setup[12]; /*!< Setup packet buffer */
<> 144:ef7eb2e8f9f7 193 void *pData; /*!< Pointer to upper stack Handler */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 } PCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /**
<> 144:ef7eb2e8f9f7 198 * @}
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /* Include PCD HAL Extension module */
<> 144:ef7eb2e8f9f7 202 #include "stm32f3xx_hal_pcd_ex.h"
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 205 /** @defgroup PCD_Exported_Constants PCD Exported Constants
<> 144:ef7eb2e8f9f7 206 * @{
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /** @defgroup PCD_Core_Speed PCD Core Speed
<> 144:ef7eb2e8f9f7 210 * @{
<> 144:ef7eb2e8f9f7 211 */
<> 157:ff67d9f36b67 212 #define PCD_SPEED_HIGH 0U /* Not Supported */
<> 157:ff67d9f36b67 213 #define PCD_SPEED_FULL 2U
<> 144:ef7eb2e8f9f7 214 /**
<> 144:ef7eb2e8f9f7 215 * @}
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /** @defgroup PCD_Core_PHY PCD Core PHY
<> 144:ef7eb2e8f9f7 219 * @{
<> 144:ef7eb2e8f9f7 220 */
<> 157:ff67d9f36b67 221 #define PCD_PHY_EMBEDDED 2U
<> 144:ef7eb2e8f9f7 222 /**
<> 144:ef7eb2e8f9f7 223 * @}
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 /**
<> 144:ef7eb2e8f9f7 226 * @}
<> 144:ef7eb2e8f9f7 227 */
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 230 /** @defgroup PCD_Exported_Macros PCD Exported Macros
<> 144:ef7eb2e8f9f7 231 * @brief macros to handle interrupts and specific clock configurations
<> 144:ef7eb2e8f9f7 232 * @{
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
<> 157:ff67d9f36b67 235 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))))
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
<> 144:ef7eb2e8f9f7 238 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 239 #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 242 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
<> 144:ef7eb2e8f9f7 245 EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 246 EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
<> 157:ff67d9f36b67 247 } while(0U)
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
<> 144:ef7eb2e8f9f7 250 EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 251 EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
<> 157:ff67d9f36b67 252 } while(0U)
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
<> 144:ef7eb2e8f9f7 255 EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 256 EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 257 EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
<> 144:ef7eb2e8f9f7 258 EXTI->FTSR |= USB_WAKEUP_EXTI_LINE;\
<> 157:ff67d9f36b67 259 } while(0U)
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 265 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
<> 144:ef7eb2e8f9f7 266 * @{
<> 144:ef7eb2e8f9f7 267 */
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /* Initialization/de-initialization functions ********************************/
<> 144:ef7eb2e8f9f7 270 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 271 * @{
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 274 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 275 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 276 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 277 /**
<> 144:ef7eb2e8f9f7 278 * @}
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 /* I/O operation functions ***************************************************/
<> 144:ef7eb2e8f9f7 282 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 283 /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 284 * @{
<> 144:ef7eb2e8f9f7 285 */
<> 144:ef7eb2e8f9f7 286 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 287 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 288 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 291 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 292 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 293 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 294 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 295 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 296 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 297 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 298 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 299 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 300 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 301 /**
<> 144:ef7eb2e8f9f7 302 * @}
<> 144:ef7eb2e8f9f7 303 */
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 /* Peripheral Control functions **********************************************/
<> 144:ef7eb2e8f9f7 306 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 307 * @{
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 310 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 311 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
<> 144:ef7eb2e8f9f7 312 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
<> 144:ef7eb2e8f9f7 313 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 314 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 315 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 316 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 317 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 318 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 319 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 320 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 321 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 322 /**
<> 144:ef7eb2e8f9f7 323 * @}
<> 144:ef7eb2e8f9f7 324 */
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 327 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 328 * @{
<> 144:ef7eb2e8f9f7 329 */
<> 144:ef7eb2e8f9f7 330 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 331 /**
<> 144:ef7eb2e8f9f7 332 * @}
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /**
<> 144:ef7eb2e8f9f7 336 * @}
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 340 /** @defgroup PCD_Private_Constants PCD Private Constants
<> 144:ef7eb2e8f9f7 341 * @{
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
<> 144:ef7eb2e8f9f7 344 * @{
<> 144:ef7eb2e8f9f7 345 */
<> 144:ef7eb2e8f9f7 346 #define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
<> 144:ef7eb2e8f9f7 347 /**
<> 144:ef7eb2e8f9f7 348 * @}
<> 144:ef7eb2e8f9f7 349 */
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
<> 144:ef7eb2e8f9f7 352 * @{
<> 144:ef7eb2e8f9f7 353 */
<> 157:ff67d9f36b67 354 #define DEP0CTL_MPS_64 0U
<> 157:ff67d9f36b67 355 #define DEP0CTL_MPS_32 1U
<> 157:ff67d9f36b67 356 #define DEP0CTL_MPS_16 2U
<> 157:ff67d9f36b67 357 #define DEP0CTL_MPS_8 3U
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 #define PCD_EP0MPS_64 DEP0CTL_MPS_64
<> 144:ef7eb2e8f9f7 360 #define PCD_EP0MPS_32 DEP0CTL_MPS_32
<> 144:ef7eb2e8f9f7 361 #define PCD_EP0MPS_16 DEP0CTL_MPS_16
<> 144:ef7eb2e8f9f7 362 #define PCD_EP0MPS_08 DEP0CTL_MPS_8
<> 144:ef7eb2e8f9f7 363 /**
<> 144:ef7eb2e8f9f7 364 * @}
<> 144:ef7eb2e8f9f7 365 */
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 /** @defgroup PCD_EP_Type PCD EP Type
<> 144:ef7eb2e8f9f7 368 * @{
<> 144:ef7eb2e8f9f7 369 */
<> 157:ff67d9f36b67 370 #define PCD_EP_TYPE_CTRL 0U
<> 157:ff67d9f36b67 371 #define PCD_EP_TYPE_ISOC 1U
<> 157:ff67d9f36b67 372 #define PCD_EP_TYPE_BULK 2U
<> 157:ff67d9f36b67 373 #define PCD_EP_TYPE_INTR 3U
<> 144:ef7eb2e8f9f7 374 /**
<> 144:ef7eb2e8f9f7 375 * @}
<> 144:ef7eb2e8f9f7 376 */
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /** @defgroup PCD_ENDP PCD ENDP
<> 144:ef7eb2e8f9f7 379 * @{
<> 144:ef7eb2e8f9f7 380 */
<> 157:ff67d9f36b67 381 #define PCD_ENDP0 ((uint8_t)0U)
<> 157:ff67d9f36b67 382 #define PCD_ENDP1 ((uint8_t)1U)
<> 157:ff67d9f36b67 383 #define PCD_ENDP2 ((uint8_t)2U)
<> 157:ff67d9f36b67 384 #define PCD_ENDP3 ((uint8_t)3U)
<> 157:ff67d9f36b67 385 #define PCD_ENDP4 ((uint8_t)4U)
<> 157:ff67d9f36b67 386 #define PCD_ENDP5 ((uint8_t)5U)
<> 157:ff67d9f36b67 387 #define PCD_ENDP6 ((uint8_t)6U)
<> 157:ff67d9f36b67 388 #define PCD_ENDP7 ((uint8_t)7U)
<> 144:ef7eb2e8f9f7 389 /**
<> 144:ef7eb2e8f9f7 390 * @}
<> 144:ef7eb2e8f9f7 391 */
<> 144:ef7eb2e8f9f7 392
<> 144:ef7eb2e8f9f7 393 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
<> 144:ef7eb2e8f9f7 394 * @{
<> 144:ef7eb2e8f9f7 395 */
<> 157:ff67d9f36b67 396 #define PCD_SNG_BUF 0U
<> 157:ff67d9f36b67 397 #define PCD_DBL_BUF 1U
<> 144:ef7eb2e8f9f7 398 /**
<> 144:ef7eb2e8f9f7 399 * @}
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 /**
<> 144:ef7eb2e8f9f7 403 * @}
<> 144:ef7eb2e8f9f7 404 */
<> 144:ef7eb2e8f9f7 405 /* Internal macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 406
<> 144:ef7eb2e8f9f7 407 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 408 /** @addtogroup PCD_Private_Macros PCD Private Macros
<> 144:ef7eb2e8f9f7 409 * @{
<> 144:ef7eb2e8f9f7 410 */
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /* SetENDPOINT */
<> 157:ff67d9f36b67 413 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415 /* GetENDPOINT */
<> 157:ff67d9f36b67 416 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 /**
<> 144:ef7eb2e8f9f7 421 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
<> 144:ef7eb2e8f9f7 422 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 423 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 424 * @param wType: Endpoint Type.
<> 144:ef7eb2e8f9f7 425 * @retval None
<> 144:ef7eb2e8f9f7 426 */
<> 144:ef7eb2e8f9f7 427 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 157:ff67d9f36b67 428 ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 /**
<> 144:ef7eb2e8f9f7 431 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
<> 144:ef7eb2e8f9f7 432 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 433 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 434 * @retval Endpoint Type
<> 144:ef7eb2e8f9f7 435 */
<> 157:ff67d9f36b67 436 #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 /**
<> 144:ef7eb2e8f9f7 440 * @brief free buffer used from the application realizing it to the line
<> 144:ef7eb2e8f9f7 441 toggles bit SW_BUF in the double buffered endpoint register
<> 144:ef7eb2e8f9f7 442 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 443 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 444 * @param bDir: Direction
<> 144:ef7eb2e8f9f7 445 * @retval None
<> 144:ef7eb2e8f9f7 446 */
<> 144:ef7eb2e8f9f7 447 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
<> 144:ef7eb2e8f9f7 448 {\
<> 144:ef7eb2e8f9f7 449 if ((bDir) == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 450 { /* OUT double buffered endpoint */\
<> 144:ef7eb2e8f9f7 451 PCD_TX_DTOG((USBx), (bEpNum));\
<> 144:ef7eb2e8f9f7 452 }\
<> 144:ef7eb2e8f9f7 453 else if ((bDir) == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 454 { /* IN double buffered endpoint */\
<> 144:ef7eb2e8f9f7 455 PCD_RX_DTOG((USBx), (bEpNum));\
<> 144:ef7eb2e8f9f7 456 }\
<> 144:ef7eb2e8f9f7 457 }
<> 144:ef7eb2e8f9f7 458
<> 144:ef7eb2e8f9f7 459 /**
<> 144:ef7eb2e8f9f7 460 * @brief gets direction of the double buffered endpoint
<> 144:ef7eb2e8f9f7 461 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 462 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 463 * @retval EP_DBUF_OUT, EP_DBUF_IN,
<> 144:ef7eb2e8f9f7 464 * EP_DBUF_ERR if the endpoint counter not yet programmed.
<> 144:ef7eb2e8f9f7 465 */
<> 144:ef7eb2e8f9f7 466 #define PCD_GET_DB_DIR(USBx, bEpNum)\
<> 144:ef7eb2e8f9f7 467 {\
<> 157:ff67d9f36b67 468 if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
<> 144:ef7eb2e8f9f7 469 return(PCD_EP_DBUF_OUT);\
<> 157:ff67d9f36b67 470 else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
<> 144:ef7eb2e8f9f7 471 return(PCD_EP_DBUF_IN);\
<> 144:ef7eb2e8f9f7 472 else\
<> 144:ef7eb2e8f9f7 473 return(PCD_EP_DBUF_ERR);\
<> 144:ef7eb2e8f9f7 474 }
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /**
<> 144:ef7eb2e8f9f7 477 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
<> 144:ef7eb2e8f9f7 478 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 479 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 480 * @param wState: new state
<> 144:ef7eb2e8f9f7 481 * @retval None
<> 144:ef7eb2e8f9f7 482 */
<> 157:ff67d9f36b67 483 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
<> 144:ef7eb2e8f9f7 484 \
<> 157:ff67d9f36b67 485 _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
<> 144:ef7eb2e8f9f7 486 /* toggle first bit ? */ \
<> 157:ff67d9f36b67 487 if((USB_EPTX_DTOG1 & (wState))!= 0U)\
<> 157:ff67d9f36b67 488 { \
<> 157:ff67d9f36b67 489 _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
<> 157:ff67d9f36b67 490 } \
<> 144:ef7eb2e8f9f7 491 /* toggle second bit ? */ \
<> 157:ff67d9f36b67 492 if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
<> 157:ff67d9f36b67 493 { \
<> 157:ff67d9f36b67 494 _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
<> 157:ff67d9f36b67 495 } \
<> 157:ff67d9f36b67 496 PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
<> 144:ef7eb2e8f9f7 497 } /* PCD_SET_EP_TX_STATUS */
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 /**
<> 144:ef7eb2e8f9f7 500 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
<> 144:ef7eb2e8f9f7 501 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 502 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 503 * @param wState: new state
<> 144:ef7eb2e8f9f7 504 * @retval None
<> 144:ef7eb2e8f9f7 505 */
<> 144:ef7eb2e8f9f7 506 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
<> 144:ef7eb2e8f9f7 507 register uint16_t _wRegVal; \
<> 144:ef7eb2e8f9f7 508 \
<> 157:ff67d9f36b67 509 _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
<> 144:ef7eb2e8f9f7 510 /* toggle first bit ? */ \
<> 157:ff67d9f36b67 511 if((USB_EPRX_DTOG1 & (wState))!= 0U) \
<> 157:ff67d9f36b67 512 { \
<> 157:ff67d9f36b67 513 _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
<> 157:ff67d9f36b67 514 } \
<> 144:ef7eb2e8f9f7 515 /* toggle second bit ? */ \
<> 157:ff67d9f36b67 516 if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
<> 157:ff67d9f36b67 517 { \
<> 157:ff67d9f36b67 518 _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
<> 157:ff67d9f36b67 519 } \
<> 157:ff67d9f36b67 520 PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
<> 144:ef7eb2e8f9f7 521 } /* PCD_SET_EP_RX_STATUS */
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /**
<> 144:ef7eb2e8f9f7 524 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
<> 144:ef7eb2e8f9f7 525 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 526 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 527 * @param wStaterx: new state.
<> 144:ef7eb2e8f9f7 528 * @param wStatetx: new state.
<> 144:ef7eb2e8f9f7 529 * @retval None
<> 144:ef7eb2e8f9f7 530 */
<> 144:ef7eb2e8f9f7 531 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
<> 144:ef7eb2e8f9f7 532 register uint32_t _wRegVal; \
<> 144:ef7eb2e8f9f7 533 \
<> 144:ef7eb2e8f9f7 534 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
<> 144:ef7eb2e8f9f7 535 /* toggle first bit ? */ \
<> 157:ff67d9f36b67 536 if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
<> 157:ff67d9f36b67 537 { \
<> 144:ef7eb2e8f9f7 538 _wRegVal ^= USB_EPRX_DTOG1; \
<> 157:ff67d9f36b67 539 } \
<> 144:ef7eb2e8f9f7 540 /* toggle second bit ? */ \
<> 157:ff67d9f36b67 541 if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
<> 157:ff67d9f36b67 542 { \
<> 144:ef7eb2e8f9f7 543 _wRegVal ^= USB_EPRX_DTOG2; \
<> 157:ff67d9f36b67 544 } \
<> 144:ef7eb2e8f9f7 545 /* toggle first bit ? */ \
<> 157:ff67d9f36b67 546 if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
<> 157:ff67d9f36b67 547 { \
<> 144:ef7eb2e8f9f7 548 _wRegVal ^= USB_EPTX_DTOG1; \
<> 157:ff67d9f36b67 549 } \
<> 144:ef7eb2e8f9f7 550 /* toggle second bit ? */ \
<> 157:ff67d9f36b67 551 if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
<> 157:ff67d9f36b67 552 { \
<> 144:ef7eb2e8f9f7 553 _wRegVal ^= USB_EPTX_DTOG2; \
<> 157:ff67d9f36b67 554 } \
<> 144:ef7eb2e8f9f7 555 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
<> 144:ef7eb2e8f9f7 556 } /* PCD_SET_EP_TXRX_STATUS */
<> 144:ef7eb2e8f9f7 557
<> 144:ef7eb2e8f9f7 558 /**
<> 144:ef7eb2e8f9f7 559 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
<> 144:ef7eb2e8f9f7 560 * /STAT_RX[1:0])
<> 144:ef7eb2e8f9f7 561 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 562 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 563 * @retval status
<> 144:ef7eb2e8f9f7 564 */
<> 157:ff67d9f36b67 565 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
<> 157:ff67d9f36b67 566 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 /**
<> 144:ef7eb2e8f9f7 569 * @brief sets directly the VALID tx/rx-status into the endpoint register
<> 144:ef7eb2e8f9f7 570 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 571 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 572 * @retval None
<> 144:ef7eb2e8f9f7 573 */
<> 144:ef7eb2e8f9f7 574 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
<> 144:ef7eb2e8f9f7 575
<> 144:ef7eb2e8f9f7 576 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 /**
<> 144:ef7eb2e8f9f7 579 * @brief checks stall condition in an endpoint.
<> 144:ef7eb2e8f9f7 580 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 581 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 582 * @retval TRUE = endpoint in stall condition.
<> 144:ef7eb2e8f9f7 583 */
<> 144:ef7eb2e8f9f7 584 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
<> 144:ef7eb2e8f9f7 585 == USB_EP_TX_STALL)
<> 144:ef7eb2e8f9f7 586 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
<> 144:ef7eb2e8f9f7 587 == USB_EP_RX_STALL)
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /**
<> 144:ef7eb2e8f9f7 590 * @brief set & clear EP_KIND bit.
<> 144:ef7eb2e8f9f7 591 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 592 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 593 * @retval None
<> 144:ef7eb2e8f9f7 594 */
<> 144:ef7eb2e8f9f7 595 #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 157:ff67d9f36b67 596 (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
<> 144:ef7eb2e8f9f7 597 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 157:ff67d9f36b67 598 (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
<> 144:ef7eb2e8f9f7 599
<> 144:ef7eb2e8f9f7 600 /**
<> 144:ef7eb2e8f9f7 601 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
<> 144:ef7eb2e8f9f7 602 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 603 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 604 * @retval None
<> 144:ef7eb2e8f9f7 605 */
<> 144:ef7eb2e8f9f7 606 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 607 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 608
<> 144:ef7eb2e8f9f7 609 /**
<> 144:ef7eb2e8f9f7 610 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
<> 144:ef7eb2e8f9f7 611 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 612 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 613 * @retval None
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 616 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /**
<> 144:ef7eb2e8f9f7 619 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
<> 144:ef7eb2e8f9f7 620 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 621 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 622 * @retval None
<> 144:ef7eb2e8f9f7 623 */
<> 144:ef7eb2e8f9f7 624 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 157:ff67d9f36b67 625 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
<> 144:ef7eb2e8f9f7 626 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 157:ff67d9f36b67 627 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
<> 144:ef7eb2e8f9f7 628
<> 144:ef7eb2e8f9f7 629 /**
<> 144:ef7eb2e8f9f7 630 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
<> 144:ef7eb2e8f9f7 631 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 632 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 633 * @retval None
<> 144:ef7eb2e8f9f7 634 */
<> 144:ef7eb2e8f9f7 635 #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 157:ff67d9f36b67 636 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
<> 144:ef7eb2e8f9f7 637 #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 157:ff67d9f36b67 638 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
<> 144:ef7eb2e8f9f7 639
<> 144:ef7eb2e8f9f7 640 /**
<> 144:ef7eb2e8f9f7 641 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
<> 144:ef7eb2e8f9f7 642 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 643 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 644 * @retval None
<> 157:ff67d9f36b67 645 */
<> 157:ff67d9f36b67 646 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
<> 157:ff67d9f36b67 647 { \
<> 157:ff67d9f36b67 648 PCD_RX_DTOG((USBx),(bEpNum));\
<> 157:ff67d9f36b67 649 }
<> 157:ff67d9f36b67 650 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
<> 157:ff67d9f36b67 651 {\
<> 157:ff67d9f36b67 652 PCD_TX_DTOG((USBx),(bEpNum));\
<> 157:ff67d9f36b67 653 }
<> 144:ef7eb2e8f9f7 654
<> 144:ef7eb2e8f9f7 655 /**
<> 144:ef7eb2e8f9f7 656 * @brief Sets address in an endpoint register.
<> 144:ef7eb2e8f9f7 657 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 658 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 659 * @param bAddr: Address.
<> 144:ef7eb2e8f9f7 660 * @retval None
<> 144:ef7eb2e8f9f7 661 */
<> 144:ef7eb2e8f9f7 662 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 157:ff67d9f36b67 663 USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
<> 144:ef7eb2e8f9f7 664
<> 144:ef7eb2e8f9f7 665 /**
<> 144:ef7eb2e8f9f7 666 * @brief Gets address in an endpoint register.
<> 144:ef7eb2e8f9f7 667 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 668 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 669 * @retval None
<> 144:ef7eb2e8f9f7 670 */
<> 144:ef7eb2e8f9f7 671 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
<> 144:ef7eb2e8f9f7 672
<> 144:ef7eb2e8f9f7 673 /**
<> 144:ef7eb2e8f9f7 674 * @brief sets address of the tx/rx buffer.
<> 144:ef7eb2e8f9f7 675 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 676 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 677 * @param wAddr: address to be set (must be word aligned).
<> 144:ef7eb2e8f9f7 678 * @retval None
<> 144:ef7eb2e8f9f7 679 */
<> 157:ff67d9f36b67 680 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
<> 157:ff67d9f36b67 681 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
<> 144:ef7eb2e8f9f7 682
<> 144:ef7eb2e8f9f7 683 /**
<> 144:ef7eb2e8f9f7 684 * @brief Gets address of the tx/rx buffer.
<> 144:ef7eb2e8f9f7 685 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 686 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 687 * @retval address of the buffer.
<> 144:ef7eb2e8f9f7 688 */
<> 144:ef7eb2e8f9f7 689 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 690 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 691
<> 144:ef7eb2e8f9f7 692 /**
<> 144:ef7eb2e8f9f7 693 * @brief Sets counter of rx buffer with no. of blocks.
<> 144:ef7eb2e8f9f7 694 * @param dwReg: Register
<> 144:ef7eb2e8f9f7 695 * @param wCount: Counter.
<> 144:ef7eb2e8f9f7 696 * @param wNBlocks: no. of Blocks.
<> 144:ef7eb2e8f9f7 697 * @retval None
<> 144:ef7eb2e8f9f7 698 */
<> 144:ef7eb2e8f9f7 699 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
<> 157:ff67d9f36b67 700 (wNBlocks) = (wCount) >> 5U;\
<> 157:ff67d9f36b67 701 if(((wCount) & 0x1fU) == 0U)\
<> 157:ff67d9f36b67 702 { \
<> 144:ef7eb2e8f9f7 703 (wNBlocks)--;\
<> 157:ff67d9f36b67 704 } \
<> 157:ff67d9f36b67 705 *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
<> 144:ef7eb2e8f9f7 706 }/* PCD_CALC_BLK32 */
<> 144:ef7eb2e8f9f7 707
<> 157:ff67d9f36b67 708
<> 144:ef7eb2e8f9f7 709 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
<> 157:ff67d9f36b67 710 (wNBlocks) = (wCount) >> 1U;\
<> 157:ff67d9f36b67 711 if(((wCount) & 0x1U) != 0U)\
<> 157:ff67d9f36b67 712 { \
<> 144:ef7eb2e8f9f7 713 (wNBlocks)++;\
<> 157:ff67d9f36b67 714 } \
<> 157:ff67d9f36b67 715 *pdwReg = (uint16_t)((wNBlocks) << 10U);\
<> 144:ef7eb2e8f9f7 716 }/* PCD_CALC_BLK2 */
<> 144:ef7eb2e8f9f7 717
<> 144:ef7eb2e8f9f7 718 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
<> 144:ef7eb2e8f9f7 719 uint16_t wNBlocks;\
<> 157:ff67d9f36b67 720 if((wCount) > 62U) \
<> 157:ff67d9f36b67 721 { \
<> 157:ff67d9f36b67 722 PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
<> 157:ff67d9f36b67 723 } \
<> 157:ff67d9f36b67 724 else \
<> 157:ff67d9f36b67 725 { \
<> 157:ff67d9f36b67 726 PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
<> 157:ff67d9f36b67 727 } \
<> 144:ef7eb2e8f9f7 728 }/* PCD_SET_EP_CNT_RX_REG */
<> 144:ef7eb2e8f9f7 729
<> 144:ef7eb2e8f9f7 730 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
<> 157:ff67d9f36b67 731 uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
<> 157:ff67d9f36b67 732 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
<> 144:ef7eb2e8f9f7 733 }
<> 157:ff67d9f36b67 734
<> 144:ef7eb2e8f9f7 735 /**
<> 144:ef7eb2e8f9f7 736 * @brief sets counter for the tx/rx buffer.
<> 144:ef7eb2e8f9f7 737 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 738 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 739 * @param wCount: Counter value.
<> 144:ef7eb2e8f9f7 740 * @retval None
<> 144:ef7eb2e8f9f7 741 */
<> 144:ef7eb2e8f9f7 742 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /**
<> 144:ef7eb2e8f9f7 745 * @brief gets counter of the tx buffer.
<> 144:ef7eb2e8f9f7 746 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 747 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 748 * @retval Counter value
<> 144:ef7eb2e8f9f7 749 */
<> 157:ff67d9f36b67 750 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
<> 157:ff67d9f36b67 751 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
<> 144:ef7eb2e8f9f7 752
<> 144:ef7eb2e8f9f7 753 /**
<> 144:ef7eb2e8f9f7 754 * @brief Sets buffer 0/1 address in a double buffer endpoint.
<> 144:ef7eb2e8f9f7 755 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 756 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 757 * @param wBuf0Addr: buffer 0 address.
<> 144:ef7eb2e8f9f7 758 * @retval Counter value
<> 144:ef7eb2e8f9f7 759 */
<> 157:ff67d9f36b67 760 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
<> 157:ff67d9f36b67 761 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
<> 144:ef7eb2e8f9f7 762
<> 144:ef7eb2e8f9f7 763 /**
<> 144:ef7eb2e8f9f7 764 * @brief Sets addresses in a double buffer endpoint.
<> 144:ef7eb2e8f9f7 765 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 766 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 767 * @param wBuf0Addr: buffer 0 address.
<> 144:ef7eb2e8f9f7 768 * @param wBuf1Addr = buffer 1 address.
<> 144:ef7eb2e8f9f7 769 * @retval None
<> 144:ef7eb2e8f9f7 770 */
<> 144:ef7eb2e8f9f7 771 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
<> 144:ef7eb2e8f9f7 772 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
<> 144:ef7eb2e8f9f7 773 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
<> 144:ef7eb2e8f9f7 774 } /* PCD_SET_EP_DBUF_ADDR */
<> 144:ef7eb2e8f9f7 775
<> 144:ef7eb2e8f9f7 776 /**
<> 144:ef7eb2e8f9f7 777 * @brief Gets buffer 0/1 address of a double buffer endpoint.
<> 144:ef7eb2e8f9f7 778 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 779 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 780 * @retval None
<> 144:ef7eb2e8f9f7 781 */
<> 144:ef7eb2e8f9f7 782 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 783 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 784
<> 144:ef7eb2e8f9f7 785 /**
<> 144:ef7eb2e8f9f7 786 * @brief Gets buffer 0/1 address of a double buffer endpoint.
<> 144:ef7eb2e8f9f7 787 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 788 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 789 * @param bDir: endpoint dir EP_DBUF_OUT = OUT
<> 144:ef7eb2e8f9f7 790 * EP_DBUF_IN = IN
<> 144:ef7eb2e8f9f7 791 * @param wCount: Counter value
<> 144:ef7eb2e8f9f7 792 * @retval None
<> 144:ef7eb2e8f9f7 793 */
<> 144:ef7eb2e8f9f7 794 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
<> 144:ef7eb2e8f9f7 795 if((bDir) == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 796 /* OUT endpoint */ \
<> 157:ff67d9f36b67 797 {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
<> 144:ef7eb2e8f9f7 798 else if((bDir) == PCD_EP_DBUF_IN)\
<> 157:ff67d9f36b67 799 { \
<> 144:ef7eb2e8f9f7 800 *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
<> 157:ff67d9f36b67 801 } \
<> 144:ef7eb2e8f9f7 802 } /* SetEPDblBuf0Count*/
<> 144:ef7eb2e8f9f7 803
<> 144:ef7eb2e8f9f7 804 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
<> 144:ef7eb2e8f9f7 805 if((bDir) == PCD_EP_DBUF_OUT)\
<> 157:ff67d9f36b67 806 {/* OUT endpoint */ \
<> 157:ff67d9f36b67 807 PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
<> 157:ff67d9f36b67 808 } \
<> 144:ef7eb2e8f9f7 809 else if((bDir) == PCD_EP_DBUF_IN)\
<> 157:ff67d9f36b67 810 {/* IN endpoint */ \
<> 144:ef7eb2e8f9f7 811 *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
<> 157:ff67d9f36b67 812 } \
<> 157:ff67d9f36b67 813 } /* SetEPDblBuf1Count */
<> 144:ef7eb2e8f9f7 814
<> 144:ef7eb2e8f9f7 815 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
<> 157:ff67d9f36b67 816 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
<> 157:ff67d9f36b67 817 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
<> 157:ff67d9f36b67 818 } /
<> 144:ef7eb2e8f9f7 819
<> 144:ef7eb2e8f9f7 820 /**
<> 144:ef7eb2e8f9f7 821 * @brief Gets buffer 0/1 rx/tx counter for double buffering.
<> 144:ef7eb2e8f9f7 822 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 823 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 824 * @retval None
<> 144:ef7eb2e8f9f7 825 */
<> 144:ef7eb2e8f9f7 826 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 827 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 828 /**
<> 144:ef7eb2e8f9f7 829 * @}
<> 144:ef7eb2e8f9f7 830 */
<> 144:ef7eb2e8f9f7 831
<> 144:ef7eb2e8f9f7 832 /** @defgroup PCD_Instance_definition PCD Instance definition
<> 144:ef7eb2e8f9f7 833 * @{
<> 144:ef7eb2e8f9f7 834 */
<> 144:ef7eb2e8f9f7 835 #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
<> 144:ef7eb2e8f9f7 836 /**
<> 144:ef7eb2e8f9f7 837 * @}
<> 144:ef7eb2e8f9f7 838 */
<> 144:ef7eb2e8f9f7 839
<> 144:ef7eb2e8f9f7 840 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 841 * @{
<> 144:ef7eb2e8f9f7 842 */
<> 144:ef7eb2e8f9f7 843 /* Peripheral Control functions ************************************************/
<> 144:ef7eb2e8f9f7 844 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 845 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 846 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
<> 144:ef7eb2e8f9f7 847 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
<> 144:ef7eb2e8f9f7 848 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 849 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 850 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 851 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 852 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 853 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 854 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 855 HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 856 HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 857 /**
<> 144:ef7eb2e8f9f7 858 * @}
<> 144:ef7eb2e8f9f7 859 */
<> 144:ef7eb2e8f9f7 860
<> 144:ef7eb2e8f9f7 861 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 862 * @{
<> 144:ef7eb2e8f9f7 863 */
<> 144:ef7eb2e8f9f7 864 /* Peripheral State functions **************************************************/
<> 144:ef7eb2e8f9f7 865 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 866 /**
<> 144:ef7eb2e8f9f7 867 * @}
<> 144:ef7eb2e8f9f7 868 */
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 /** @addtogroup PCDEx_Private_Functions PCD Extended Private Functions
<> 144:ef7eb2e8f9f7 871 * @{
<> 144:ef7eb2e8f9f7 872 */
<> 144:ef7eb2e8f9f7 873 void PCD_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
<> 144:ef7eb2e8f9f7 874 void PCD_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
<> 144:ef7eb2e8f9f7 875 /**
<> 144:ef7eb2e8f9f7 876 * @}
<> 144:ef7eb2e8f9f7 877 */
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 /**
<> 144:ef7eb2e8f9f7 880 * @}
<> 144:ef7eb2e8f9f7 881 */
<> 144:ef7eb2e8f9f7 882
<> 144:ef7eb2e8f9f7 883 /**
<> 144:ef7eb2e8f9f7 884 * @}
<> 144:ef7eb2e8f9f7 885 */
<> 144:ef7eb2e8f9f7 886
<> 144:ef7eb2e8f9f7 887 #endif /* STM32F302xE || STM32F303xE || */
<> 144:ef7eb2e8f9f7 888 /* STM32F302xC || STM32F303xC || */
<> 144:ef7eb2e8f9f7 889 /* STM32F302x8 || */
<> 144:ef7eb2e8f9f7 890 /* STM32F373xC */
<> 144:ef7eb2e8f9f7 891
<> 144:ef7eb2e8f9f7 892 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 893 }
<> 144:ef7eb2e8f9f7 894 #endif
<> 144:ef7eb2e8f9f7 895
<> 144:ef7eb2e8f9f7 896
<> 144:ef7eb2e8f9f7 897 #endif /* __STM32F3xx_HAL_PCD_H */
<> 144:ef7eb2e8f9f7 898
<> 144:ef7eb2e8f9f7 899 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/