Greg Steiert / MAX14690_ptr

MAX14690 library

Fork of MAX14690 by Maxim Integrated

MAX14690.cpp@15:264f38840873, 2017-10-16 (annotated)

Committer:
switches
Date:
Mon Oct 16 19:41:16 2017 +0000
Revision:
15:264f38840873
Parent:
13:666b6c505289 
Changed I2C to pointer

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jbradshaw 0:0e40db4a2b3e 1 /*******************************************************************************
jbradshaw 0:0e40db4a2b3e 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
jbradshaw 0:0e40db4a2b3e 3 *
jbradshaw 0:0e40db4a2b3e 4 * Permission is hereby granted, free of charge, to any person obtaining a
jbradshaw 0:0e40db4a2b3e 5 * copy of this software and associated documentation files (the "Software"),
jbradshaw 0:0e40db4a2b3e 6 * to deal in the Software without restriction, including without limitation
jbradshaw 0:0e40db4a2b3e 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
jbradshaw 0:0e40db4a2b3e 8 * and/or sell copies of the Software, and to permit persons to whom the
jbradshaw 0:0e40db4a2b3e 9 * Software is furnished to do so, subject to the following conditions:
jbradshaw 0:0e40db4a2b3e 10 *
jbradshaw 0:0e40db4a2b3e 11 * The above copyright notice and this permission notice shall be included
jbradshaw 0:0e40db4a2b3e 12 * in all copies or substantial portions of the Software.
jbradshaw 0:0e40db4a2b3e 13 *
jbradshaw 0:0e40db4a2b3e 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
jbradshaw 0:0e40db4a2b3e 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
jbradshaw 0:0e40db4a2b3e 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
jbradshaw 0:0e40db4a2b3e 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
jbradshaw 0:0e40db4a2b3e 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
jbradshaw 0:0e40db4a2b3e 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
jbradshaw 0:0e40db4a2b3e 20 * OTHER DEALINGS IN THE SOFTWARE.
jbradshaw 0:0e40db4a2b3e 21 *
jbradshaw 0:0e40db4a2b3e 22 * Except as contained in this notice, the name of Maxim Integrated
jbradshaw 0:0e40db4a2b3e 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
jbradshaw 0:0e40db4a2b3e 24 * Products, Inc. Branding Policy.
jbradshaw 0:0e40db4a2b3e 25 *
jbradshaw 0:0e40db4a2b3e 26 * The mere transfer of this software does not imply any licenses
jbradshaw 0:0e40db4a2b3e 27 * of trade secrets, proprietary technology, copyrights, patents,
jbradshaw 0:0e40db4a2b3e 28 * trademarks, maskwork rights, or any other form of intellectual
jbradshaw 0:0e40db4a2b3e 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
jbradshaw 0:0e40db4a2b3e 30 * ownership rights.
jbradshaw 0:0e40db4a2b3e 31 *******************************************************************************
jbradshaw 0:0e40db4a2b3e 32 */
jbradshaw 0:0e40db4a2b3e 33
switches 9:8fb54367ceb5 34 #include "MAX14690.h"
jbradshaw 0:0e40db4a2b3e 35
jbradshaw 0:0e40db4a2b3e 36 //******************************************************************************
switches 15:264f38840873 37 MAX14690::MAX14690(I2C *i2c): _i2c(i2c)
jbradshaw 0:0e40db4a2b3e 38 {
switches 10:32c7e2ab67aa 39 resetToDefaults();
jbradshaw 0:0e40db4a2b3e 40 }
jessexm 8:2c3f2da51c5d 41
jbradshaw 0:0e40db4a2b3e 42 //******************************************************************************
switches 9:8fb54367ceb5 43 MAX14690::~MAX14690()
jbradshaw 0:0e40db4a2b3e 44 {
switches 3:cdd88a3d3d24 45 }
switches 3:cdd88a3d3d24 46
switches 3:cdd88a3d3d24 47 //******************************************************************************
switches 10:32c7e2ab67aa 48 void MAX14690::resetToDefaults()
switches 3:cdd88a3d3d24 49 {
switches 10:32c7e2ab67aa 50 intEnThermStatus = false;
switches 10:32c7e2ab67aa 51 intEnChgStatus = false;
switches 10:32c7e2ab67aa 52 intEnILim = false;
switches 10:32c7e2ab67aa 53 intEnUSBOVP = false;
switches 10:32c7e2ab67aa 54 intEnUSBOK = false;
switches 10:32c7e2ab67aa 55 intEnChgThmSD = false;
switches 10:32c7e2ab67aa 56 intEnThermReg = false;
switches 10:32c7e2ab67aa 57 intEnChgTimeOut = false;
switches 10:32c7e2ab67aa 58 intEnThermBuck1 = false;
switches 10:32c7e2ab67aa 59 intEnThermBuck2 = false;
switches 10:32c7e2ab67aa 60 intEnThermLDO1 = false;
switches 10:32c7e2ab67aa 61 intEnThermLDO2 = false;
switches 10:32c7e2ab67aa 62 intEnThermLDO3 = false;
switches 10:32c7e2ab67aa 63 iLimCntl = ILIM_500mA;
switches 10:32c7e2ab67aa 64 chgAutoStp = true;
switches 10:32c7e2ab67aa 65 chgAutoReSta = true;
switches 10:32c7e2ab67aa 66 batReChg = BAT_RECHG_120mV;
switches 10:32c7e2ab67aa 67 batReg = BAT_REG_4200mV;
switches 10:32c7e2ab67aa 68 chgEn = true;
switches 10:32c7e2ab67aa 69 vPChg = VPCHG_3000mV;
switches 10:32c7e2ab67aa 70 iPChg = IPCHG_10;
switches 10:32c7e2ab67aa 71 chgDone = CHGDONE_10;
switches 10:32c7e2ab67aa 72 mtChgTmr = MTCHGTMR_0min;
switches 10:32c7e2ab67aa 73 fChgTmr = FCHGTMR_300min;
switches 10:32c7e2ab67aa 74 pChgTmr = PCHGTMR_60min;
switches 10:32c7e2ab67aa 75 buck1Md = BUCK_BURST;
switches 10:32c7e2ab67aa 76 buck1Ind = 0;
switches 10:32c7e2ab67aa 77 buck2Md = BUCK_BURST;
switches 10:32c7e2ab67aa 78 buck2Ind = 0;
switches 10:32c7e2ab67aa 79 ldo2Mode = LDO_DISABLED;
switches 10:32c7e2ab67aa 80 ldo2Millivolts = 3200;
switches 10:32c7e2ab67aa 81 ldo3Mode = LDO_DISABLED;
switches 10:32c7e2ab67aa 82 ldo3Millivolts = 3000;
switches 10:32c7e2ab67aa 83 thrmCfg = THRM_ENABLED;
switches 10:32c7e2ab67aa 84 monRatio = MON_DIV4;
switches 10:32c7e2ab67aa 85 monCfg = MON_PULLDOWN;
switches 10:32c7e2ab67aa 86 buck2ActDsc = false;
switches 10:32c7e2ab67aa 87 buck2FFET = false;
switches 10:32c7e2ab67aa 88 buck1ActDsc = false;
switches 10:32c7e2ab67aa 89 buck1FFET = false;
switches 10:32c7e2ab67aa 90 pfnResEna = true;
switches 10:32c7e2ab67aa 91 stayOn = true;
jbradshaw 0:0e40db4a2b3e 92 }
jbradshaw 0:0e40db4a2b3e 93
jbradshaw 0:0e40db4a2b3e 94 //******************************************************************************
switches 10:32c7e2ab67aa 95 int MAX14690::ldo2SetMode(ldoMode_t mode)
switches 3:cdd88a3d3d24 96 {
switches 10:32c7e2ab67aa 97 ldo2Mode = mode;
switches 10:32c7e2ab67aa 98 return writeReg(REG_LDO2_CFG, mode);
switches 10:32c7e2ab67aa 99 }
switches 10:32c7e2ab67aa 100
switches 10:32c7e2ab67aa 101 //******************************************************************************
switches 10:32c7e2ab67aa 102 int MAX14690::ldo2SetVoltage(int mV)
switches 10:32c7e2ab67aa 103 {
switches 10:32c7e2ab67aa 104 int regBits = mv2bits(mV);
switches 3:cdd88a3d3d24 105 char data;
jessexm 8:2c3f2da51c5d 106
switches 10:32c7e2ab67aa 107 if (regBits < 0) {
switches 10:32c7e2ab67aa 108 return MAX14690_ERROR;
switches 3:cdd88a3d3d24 109 } else {
switches 10:32c7e2ab67aa 110 data = regBits;
switches 3:cdd88a3d3d24 111 }
jessexm 8:2c3f2da51c5d 112
switches 10:32c7e2ab67aa 113 if (ldo2Mode == LDO_ENABLED) {
switches 10:32c7e2ab67aa 114 if (writeReg(REG_LDO2_CFG, LDO_DISABLED) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 115 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 116 }
switches 3:cdd88a3d3d24 117 }
jessexm 8:2c3f2da51c5d 118
switches 10:32c7e2ab67aa 119 if (writeReg(REG_LDO2_VSET, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 120 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 121 }
jessexm 8:2c3f2da51c5d 122
switches 10:32c7e2ab67aa 123 if (ldo2Mode == LDO_ENABLED) {
switches 10:32c7e2ab67aa 124 if (writeReg(REG_LDO2_CFG, LDO_ENABLED) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 125 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 126 }
switches 10:32c7e2ab67aa 127 }
switches 10:32c7e2ab67aa 128
switches 10:32c7e2ab67aa 129 return MAX14690_NO_ERROR;
switches 10:32c7e2ab67aa 130 }
switches 10:32c7e2ab67aa 131
switches 10:32c7e2ab67aa 132 //******************************************************************************
switches 10:32c7e2ab67aa 133 int MAX14690::ldo3SetMode(ldoMode_t mode)
switches 10:32c7e2ab67aa 134 {
switches 10:32c7e2ab67aa 135 ldo3Mode = mode;
switches 10:32c7e2ab67aa 136 return writeReg(REG_LDO3_CFG, mode);
switches 10:32c7e2ab67aa 137 }
switches 10:32c7e2ab67aa 138
switches 10:32c7e2ab67aa 139 //******************************************************************************
switches 10:32c7e2ab67aa 140 int MAX14690::ldo3SetVoltage(int mV)
switches 10:32c7e2ab67aa 141 {
switches 10:32c7e2ab67aa 142 int regBits = mv2bits(mV);
switches 10:32c7e2ab67aa 143 char data;
switches 10:32c7e2ab67aa 144
switches 10:32c7e2ab67aa 145 if (regBits < 0) {
switches 10:32c7e2ab67aa 146 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 147 } else {
switches 10:32c7e2ab67aa 148 data = regBits;
switches 10:32c7e2ab67aa 149 }
switches 10:32c7e2ab67aa 150
switches 10:32c7e2ab67aa 151 if (ldo3Mode == LDO_ENABLED) {
switches 10:32c7e2ab67aa 152 if (writeReg(REG_LDO3_CFG, LDO_DISABLED) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 153 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 154 }
switches 10:32c7e2ab67aa 155 }
switches 10:32c7e2ab67aa 156
switches 10:32c7e2ab67aa 157 if (writeReg(REG_LDO3_VSET, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 158 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 159 }
switches 10:32c7e2ab67aa 160
switches 10:32c7e2ab67aa 161 if (ldo3Mode == LDO_ENABLED) {
switches 10:32c7e2ab67aa 162 if (writeReg(REG_LDO3_CFG, LDO_ENABLED) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 163 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 164 }
switches 3:cdd88a3d3d24 165 }
jessexm 8:2c3f2da51c5d 166
switches 9:8fb54367ceb5 167 return MAX14690_NO_ERROR;
jbradshaw 0:0e40db4a2b3e 168 }
jbradshaw 0:0e40db4a2b3e 169
jbradshaw 0:0e40db4a2b3e 170 //******************************************************************************
switches 9:8fb54367ceb5 171 int MAX14690::init()
switches 3:cdd88a3d3d24 172 {
switches 10:32c7e2ab67aa 173 int regBits;
switches 3:cdd88a3d3d24 174 char data;
jessexm 8:2c3f2da51c5d 175
switches 10:32c7e2ab67aa 176 // Configure buck regulators
switches 10:32c7e2ab67aa 177 data = (buck1Md << 1) |
switches 10:32c7e2ab67aa 178 (buck1Ind);
switches 10:32c7e2ab67aa 179 if (writeReg(REG_BUCK1_CFG, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 180 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 181 }
switches 10:32c7e2ab67aa 182 data = (buck2Md << 1) |
switches 10:32c7e2ab67aa 183 (buck2Ind);
switches 10:32c7e2ab67aa 184 if (writeReg(REG_BUCK2_CFG, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 185 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 186 }
switches 10:32c7e2ab67aa 187 data = (buck2ActDsc << 5) |
switches 10:32c7e2ab67aa 188 (buck2FFET << 4) |
switches 10:32c7e2ab67aa 189 (buck1ActDsc << 1) |
switches 10:32c7e2ab67aa 190 (buck1FFET);
switches 10:32c7e2ab67aa 191 if (writeReg(REG_BUCK_EXTRA, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 192 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 193 }
jessexm 8:2c3f2da51c5d 194
switches 10:32c7e2ab67aa 195 // Configure Charger
switches 10:32c7e2ab67aa 196 data = (iLimCntl);
switches 10:32c7e2ab67aa 197 if (writeReg(REG_I_LIM_CNTL, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 198 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 199 }
switches 10:32c7e2ab67aa 200 data = (vPChg << 4) |
switches 10:32c7e2ab67aa 201 (iPChg << 2) |
switches 10:32c7e2ab67aa 202 (chgDone);
switches 10:32c7e2ab67aa 203 if (writeReg(REG_CHG_CNTL_B, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 204 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 205 }
switches 10:32c7e2ab67aa 206 data = (mtChgTmr << 4) |
switches 10:32c7e2ab67aa 207 (fChgTmr << 2) |
switches 10:32c7e2ab67aa 208 (pChgTmr);
switches 10:32c7e2ab67aa 209 if (writeReg(REG_CHG_TMR, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 210 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 211 }
switches 10:32c7e2ab67aa 212 data = (thrmCfg);
switches 10:32c7e2ab67aa 213 if (writeReg(REG_THRM_CFG, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 214 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 215 }
switches 10:32c7e2ab67aa 216 // Set enable bit after setting other charger bits
switches 10:32c7e2ab67aa 217 data = (chgAutoStp << 7) |
switches 10:32c7e2ab67aa 218 (chgAutoReSta << 6) |
switches 10:32c7e2ab67aa 219 (batReChg << 4) |
switches 10:32c7e2ab67aa 220 (batReg << 1) |
switches 10:32c7e2ab67aa 221 (chgEn);
switches 10:32c7e2ab67aa 222 if (writeReg(REG_CHG_CNTL_A, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 223 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 224 }
jessexm 8:2c3f2da51c5d 225
switches 10:32c7e2ab67aa 226 // Configure monitor multiplexer
switches 10:32c7e2ab67aa 227 data = (monRatio << 4) |
switches 10:32c7e2ab67aa 228 (monCfg);
switches 10:32c7e2ab67aa 229 if (writeReg(REG_MON_CFG, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 230 return MAX14690_ERROR;
switches 3:cdd88a3d3d24 231 }
jessexm 8:2c3f2da51c5d 232
switches 10:32c7e2ab67aa 233 // Configure and enable LDOs
switches 10:32c7e2ab67aa 234 regBits = mv2bits(ldo2Millivolts);
switches 10:32c7e2ab67aa 235 if (regBits < 0) {
switches 10:32c7e2ab67aa 236 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 237 } else {
switches 10:32c7e2ab67aa 238 data = regBits;
switches 10:32c7e2ab67aa 239 }
switches 10:32c7e2ab67aa 240 if (writeReg(REG_LDO2_VSET, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 241 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 242 }
switches 10:32c7e2ab67aa 243 data = (ldo2Mode);
switches 10:32c7e2ab67aa 244 if (writeReg(REG_LDO2_CFG, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 245 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 246 }
switches 10:32c7e2ab67aa 247 regBits = mv2bits(ldo3Millivolts);
switches 10:32c7e2ab67aa 248 if (regBits < 0) {
switches 10:32c7e2ab67aa 249 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 250 } else {
switches 10:32c7e2ab67aa 251 data = regBits;
switches 10:32c7e2ab67aa 252 }
switches 10:32c7e2ab67aa 253 if (writeReg(REG_LDO3_VSET, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 254 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 255 }
switches 10:32c7e2ab67aa 256 data = (ldo3Mode);
switches 10:32c7e2ab67aa 257 if (writeReg(REG_LDO3_CFG, data) != MAX14690_NO_ERROR) {
switches 10:32c7e2ab67aa 258 return MAX14690_ERROR;
switches 10:32c7e2ab67aa 259 }
switches 10:32c7e2ab67aa 260
switches 10:32c7e2ab67aa 261 // Set stayOn bit after other registers to confirm successful boot.
switches 10:32c7e2ab67aa 262 data = (pfnResEna << 7) |
switches 10:32c7e2ab67aa 263 (stayOn);
switches 10:32c7e2ab67aa 264 if (writeReg(REG_PWR_CFG, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 265 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 266 }
jessexm 8:2c3f2da51c5d 267
switches 10:32c7e2ab67aa 268 // Unmask Interrupts Last
switches 10:32c7e2ab67aa 269 data = (intEnThermStatus << 7) |
switches 10:32c7e2ab67aa 270 (intEnChgStatus << 6) |
switches 10:32c7e2ab67aa 271 (intEnILim << 5) |
switches 10:32c7e2ab67aa 272 (intEnUSBOVP << 4) |
switches 10:32c7e2ab67aa 273 (intEnUSBOK << 3) |
switches 10:32c7e2ab67aa 274 (intEnChgThmSD << 2) |
switches 10:32c7e2ab67aa 275 (intEnThermReg << 1) |
switches 10:32c7e2ab67aa 276 (intEnChgTimeOut);
switches 10:32c7e2ab67aa 277 if (writeReg(REG_INT_MASK_A, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 278 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 279 }
switches 10:32c7e2ab67aa 280 data = (intEnThermBuck1 << 4) |
switches 10:32c7e2ab67aa 281 (intEnThermBuck2 << 3) |
switches 10:32c7e2ab67aa 282 (intEnThermLDO1 << 2) |
switches 10:32c7e2ab67aa 283 (intEnThermLDO2 << 1) |
switches 10:32c7e2ab67aa 284 (intEnThermLDO3);
switches 10:32c7e2ab67aa 285 if (writeReg(REG_INT_MASK_B, data) != MAX14690_NO_ERROR) {
switches 9:8fb54367ceb5 286 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 287 }
switches 10:32c7e2ab67aa 288
switches 9:8fb54367ceb5 289 return MAX14690_NO_ERROR;
jbradshaw 0:0e40db4a2b3e 290 }
jbradshaw 0:0e40db4a2b3e 291
jbradshaw 0:0e40db4a2b3e 292 //******************************************************************************
switches 10:32c7e2ab67aa 293 int MAX14690::monSet(monCfg_t newMonCfg, monRatio_t newMonRatio)
switches 3:cdd88a3d3d24 294 {
switches 10:32c7e2ab67aa 295 char data = (newMonRatio << 4) | (newMonCfg);
switches 10:32c7e2ab67aa 296 monCfg = newMonCfg;
switches 10:32c7e2ab67aa 297 monRatio = newMonRatio;
switches 10:32c7e2ab67aa 298 return writeReg(REG_MON_CFG, data);
jbradshaw 0:0e40db4a2b3e 299 }
jbradshaw 0:0e40db4a2b3e 300
jbradshaw 0:0e40db4a2b3e 301 //******************************************************************************
switches 9:8fb54367ceb5 302 int MAX14690::shutdown()
switches 3:cdd88a3d3d24 303 {
jessexm 8:2c3f2da51c5d 304 return writeReg(REG_PWR_OFF, 0xB2);
jbradshaw 0:0e40db4a2b3e 305 }
jbradshaw 0:0e40db4a2b3e 306
switches 3:cdd88a3d3d24 307
jbradshaw 0:0e40db4a2b3e 308 //******************************************************************************
switches 9:8fb54367ceb5 309 int MAX14690::writeReg(registers_t reg, char value)
jbradshaw 0:0e40db4a2b3e 310 {
jbradshaw 0:0e40db4a2b3e 311 char cmdData[2] = { (char)reg, value };
jessexm 8:2c3f2da51c5d 312
switches 15:264f38840873 313 if ((*_i2c).write(MAX14690_I2C_ADDR, cmdData, sizeof(cmdData)) != 0) {
switches 9:8fb54367ceb5 314 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 315 }
jessexm 8:2c3f2da51c5d 316
switches 9:8fb54367ceb5 317 return MAX14690_NO_ERROR;
jbradshaw 0:0e40db4a2b3e 318 }
jbradshaw 0:0e40db4a2b3e 319
jbradshaw 0:0e40db4a2b3e 320 //******************************************************************************
switches 9:8fb54367ceb5 321 int MAX14690::readReg(registers_t reg, char *value)
jbradshaw 0:0e40db4a2b3e 322 {
jbradshaw 0:0e40db4a2b3e 323 char cmdData[1] = { (char)reg };
switches 3:cdd88a3d3d24 324
switches 15:264f38840873 325 if ((*_i2c).write(MAX14690_I2C_ADDR, cmdData, sizeof(cmdData)) != 0) {
switches 9:8fb54367ceb5 326 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 327 }
jessexm 8:2c3f2da51c5d 328
switches 15:264f38840873 329 if ((*_i2c).read(MAX14690_I2C_ADDR, value, 1) != 0) {
switches 9:8fb54367ceb5 330 return MAX14690_ERROR;
jessexm 8:2c3f2da51c5d 331 }
jessexm 8:2c3f2da51c5d 332
switches 9:8fb54367ceb5 333 return MAX14690_NO_ERROR;
jbradshaw 0:0e40db4a2b3e 334 }
switches 10:32c7e2ab67aa 335
switches 10:32c7e2ab67aa 336 //******************************************************************************
switches 10:32c7e2ab67aa 337 int MAX14690::mv2bits(int mV)
switches 10:32c7e2ab67aa 338 {
switches 10:32c7e2ab67aa 339 int regBits;
switches 10:32c7e2ab67aa 340
switches 10:32c7e2ab67aa 341 if ((MAX14690_LDO_MIN_MV <= mV) && (mV <= MAX14690_LDO_MAX_MV)) {
switches 10:32c7e2ab67aa 342 regBits = (mV - MAX14690_LDO_MIN_MV) / MAX14690_LDO_STEP_MV;
switches 10:32c7e2ab67aa 343 } else {
switches 10:32c7e2ab67aa 344 return -1;
switches 10:32c7e2ab67aa 345 }
switches 10:32c7e2ab67aa 346
switches 10:32c7e2ab67aa 347 return regBits;
switches 10:32c7e2ab67aa 348 }