Diff: LPC1768_dma.c

Revision:

1:86b13bfcbe46

Parent:

0:226ca65983a2

--- a/LPC1768_dma.c	Thu Aug 14 01:58:45 2014 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,146 +0,0 @@
-#ifdef TARGET_LPC1768
-#include "mbed.h"
-#include "user_LPC17xx.h"
-
-/**
-  * @brief  Initializes the DMAy Channelx according to the specified parameters 
-  *         in the DMA_InitStruct.
-  * @param  DMAy_Channelx: where y can be 1 to select the DMA and x can be 1 to 7
-  *         for DMA1 to select the DMA Channel.
-  * @note   Channel 6 and 7 are available only for STM32F072 devices. 
-  * @param  DMA_InitStruct: pointer to a DMA_InitTypeDef structure that contains
-  *         the configuration information for the specified DMA Channel.
-  * @retval None
-  */
-void DMA_init(LPC_GPDMACH_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct)
-{
-    uint32_t tmpreg = 0;
-
-    
-  /* clear the pending interrupts on the channel to be used by writing to the DMACIntTCClear and DMACIntErrClear register. */  
-    if (DMAy_Channelx == LPC_GPDMACH0){
-      /* Reset interrupt pending bits for DMA1 Channel1 */
-        GPDMA->DMACIntTCClear = 1<<0;
-        GPDMA->DMACIntErrClr = 1<<0;
-    }
-    else if (DMAy_Channelx == LPC_GPDMACH1){
-     /* Reset interrupt pending bits for DMA1 Channel2 */
-        GPDMA->DMACIntTCClear = 1<<1;
-        GPDMA->DMACIntErrClr = 1<<1;
-    }
-    else if (DMAy_Channelx == LPC_GPDMACH2){
-    /* Reset interrupt pending bits for DMA1 Channel3 */
-        GPDMA->DMACIntTCClear = 1<<2;
-        GPDMA->DMACIntErrClr = 1<<2;
-    }
-    else if (DMAy_Channelx= LPC_GPDMACH3){
-    /* Reset interrupt pending bits for DMA1 Channel3 */
-        GPDMA->DMACIntTCClear = 1<<3;
-        GPDMA->DMACIntErrClr = 1<<3;
-    }
-    else if (DMAy_Channelx == LPC_GPDMACH4){
-    /* Reset interrupt pending bits for DMA1 Channel4 */
-        GPDMA->DMACIntTCClear = 1<<4;
-        GPDMA->DMACIntErrClr = 1<<4;
-    }
-    else if (DMAy_Channelx == LPC_GPDMACH5){
-    /* Reset interrupt pending bits for DMA1 Channel5 */
-        GPDMA->DMACIntTCClear = 1<<5;
-        GPDMA->DMACIntErrClr = 1<<5;
-    }
-    else if (DMAy_Channelx == LPC_GPDMACH6){
-    /* Reset interrupt pending bits for DMA1 Channel6 */
-        GPDMA->DMACIntTCClear = 1<<6;
-        GPDMA->DMACIntErrClr = 1<<6;
-    }
-    else if (DMAy_Channelx == DMA1_Channel7) {
-      /* Reset interrupt pending bits for DMA1 Channel7 */
-        GPDMA->DMACIntTCClear = 1<<7;
-        GPDMA->DMACIntErrClr = 1<<7;
-    }
-    }
-    
-    
-    tmpreg = DMAy_Channelx->DMACControl;
-    //tmpreg &= CControl_CLEAR_MASK; //undo
-    
-    DMAy_Channelx->DMACCSrcAddr = DMA_InitStruct->DMA_SrcAddr;
-    DMAy_Channelx->DMACCDestAddr = DMA_InitStruct->DMA_DestAddr;
-    DMAy_Channelx->DMACCLLI = DMA_InitStruct->LLI->next;
-    DMAy_Channelx->DMACCControl| = (DMA_InitStruct->DMA_TransSize<<DMA_CCxControl_TransferSize_Pos) |
-                                  (DMA_InitStruct->DMA_SrcBurst<<DMA_CCxControl_SBSize_Pos)  |
-                                  (DMA_InitStruct->DMA_DestBurst<<DMA_CCxControl_DBSize_Pos) |
-                                  (DMA_InitStruct->DMA_SrcWidth<<DMA_CCxControl_SWidth_Pos)  |
-                                  (DMA_InitStruct->DMA_DestWidth<<DMA_CCxControl_DWidth_Pos) |
-                                  (DMA_InitStruct->DMA_SrcInc<<DMA_CCxControl_SI_Pos)    |
-                                  (DMA_InitStruct->DMA_DestInc<<DMA_CCxControl_DI_Pos)   |
-                                  (DMA_InitStruct->DMA_TermInt<<DMA_CCxControl_I_Pos ) ; 
-    DMAy_Channelx->DMACCConfig |= (DMA_InitStruct->DMA_SrcPeripheral<<DMA_CCxConfig_SrcPeripheral_Pos)|
-                                  (DMA_InitStruct->DMA_DMA_DestPeripheral<<DMA_CCxConfig_DestPeripheral_Pos)|
-                                  (DMA_InitStruct->DMA_TransferType<< DMA_CCxConfig_TransferType_Pos);   
-    
-    //DMAy_Channelx->DMACCConfig=;
-
-}
-
-/**
-  * @brief  Fills each DMA_InitStruct member with its default value.
-  * @param  DMA_InitStruct: pointer to a DMA_InitTypeDef structure which will
-  *         be initialized.
-  * @retval None
-  */
-void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
-{
-/*-------------- Reset DMA init structure parameters values ------------------*/
-  
-    DMA_InitStruct->DMA_DestAddr=0; 
-    DMA_InitStruct->DMA_SrcAddr=0;    
-    //DMA_InitStruct->LLI;//undo
-    DMA_InitStruct->DMA_TransSize=0;
-    DMA_InitStruct->DMA_SrcBurst=0;
-    DMA_InitStruct->DMA_DestBurst=0;
-    DMA_InitStruct->DMA_SrcWidth=0;
-    DMA_InitStruct->DMA_DestWidth=0;
-    DMA_InitStruct->DMA_SrcInc=0; 
-    DMA_InitStruct->DMA_DestInc=0; 
-    DMA_InitStruct->DMA_TermInt=0; 
-    
-    DMA_InitStruct->DMA_SrcPeripheral=0;
-    DMA_InitStruct->DMA_DestPeripheral=0;
-    DMA_InitStruct->DMA_TransferType=0;       
-}
-
-
-
-
-/**
-  * @brief  Enables or disables the specified DMAy Channelx.
-  * @param  DMAy_Channelx: where y can be 1 to select the DMA and
-  *         x can be 1 to 7 for DMA1 to select the DMA Channel.
-  * @note   Channel 6 and 7 are available only for STM32F072 devices.  
-  * @param  NewState: new state of the DMAy Channelx. 
-  *         This parameter can be: ENABLE or DISABLE.
-  * @retval None
-  */
-void DMA_Cmd(LPC_GPDMACH_TypeDef*  DMAy_Channelx, FunctionalState NewState)
-{
-    /* Check the parameters */
-    //assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
-    //assert_param(IS_DMA_CONTROL(cmd));
-
-  if (NewState->DMA_Enable != DISABLE)
-  {
-    /* Enable the selected DMAy Channelx */
-    DMAy_Channelx->CConfig |= 1<<DMA_CCxConfig_E_Pos;
-  }
-  else
-  {
-    /* Disable the selected DMAy Channelx */
-    DMAy_Channelx->CConfig &= (uint16_t)(~1<<DMA_CCxConfig_E_Pos);
-  }
-}
-
-
-
-
-#endif
\ No newline at end of file