FMS_all.h

00001 
00002 // Includes MMS RAM functions also
00003 
00004 /*===================================================FMS Functions=================================================*/
00005 
00006 
00007 //Run processes
00008 void P_PL_INIT();
00009 void P_PL_MAIN();
00010 void P_COM_INIT();
00011 void P_CDMS_HK_MAIN();
00012 void P_PL_RCV_SC_DATA();
00013 void P_CDMS_INIT_SD();
00014 
00015 // Switch ON/OFF functions
00016 void CDMS_SD_SW_ON();
00017 void CDMS_SD_SW_OFF();
00018 void CDMS_RTC_ON();
00019 void CDMS_RTC_OFF();
00020 void SW_ON_BAE();
00021 void SW_OFF_BAE();
00022 void SW_ON_PL_BEE();
00023 void SW_OFF_PL_BEE();
00024 void SW_ON_PL_EPS();
00025 void SW_OFF_PL_EPS();
00026 void SW_ON_V_A_EN();
00027 void SW_OFF_V_A_EN();
00028 
00029 // RST functions
00030 void RST_SD();
00031 void SW_RST_BAE();
00032 void SW_RST_PL_BEE();
00033 void RST_BAE();
00034 void RST_PL_BEE();
00035 void CDMS_RESET();
00036 void SYS_PWR_RESET();  // Have to be decided with EPS team.
00037 void sys_pwr_reset(void const *args);
00038 void EPS_V_A_EN();
00039 void EPS_V_C_EN();
00040 
00041 void RST_HK_COUNTER();
00042 int8_t CDMS_RD_SD_HK(uint8_t *);
00043 void CDMS_CALIB_RTC(uint8_t *);
00044 void TOTAL_RESET_WITH_CDMS();
00045 
00046 void sys_pwr_reset(void const *args){
00047     SYS_PWR_RESET();
00048 }
00049 
00050 void P_PL_INIT()
00051 {
00052     
00053 }
00054 
00055 void P_PL_MAIN()
00056 {
00057    FCTN_CDMS_PL_MAIN((void *)NULL);
00058 }
00059 
00060 void P_COM_INIT()
00061 {
00062     P_COM_INIT;
00063 }
00064 
00065 void P_CDMS_HK_MAIN()
00066 {
00067     FCTN_CDMS_HK_MAIN((void *)NULL);
00068 }
00069 
00070 void P_PL_RCV_SC_DATA()
00071 {
00072     
00073 }
00074 
00075 void P_CDMS_INIT_SD()
00076 {
00077     FCTN_CDMS_SD_INIT();
00078 }
00079 
00080 void CDMS_SD_SW_ON()
00081 {
00082     SD_SW_EN_DS = 1;
00083     SD_STATUS = DEVICE_POWERED;
00084     FCTN_CDMS_WR_FLASH(2,DEVICE_POWERED);
00085     gPC.printf("sw on sd\n");
00086 }
00087 
00088 void CDMS_SD_SW_OFF()
00089 {
00090     SD_SW_EN_DS = 0;
00091     SD_STATUS = DEVICE_DISABLED;
00092     FCTN_CDMS_WR_FLASH(2,DEVICE_DISABLED);
00093     gPC.printf("sw off sd\n");
00094 }
00095 
00096 void CDMS_RTC_ON()
00097 {
00098     //FCTN_CDMS_INIT_RTC();
00099     SPI_mutex.lock();
00100     gCS_RTC=1;
00101     gCS_RTC=0;
00102     spi.write(0x81); //register address with write flag
00103     spi.write(0x00);//disabling stop bit in the seconds register
00104     SPI_mutex.unlock();
00105     gPC.printf("sw on rtc\n");
00106 }
00107 
00108 void CDMS_RTC_OFF()
00109 {
00110     SPI_mutex.lock();
00111     gCS_RTC=1;
00112     gCS_RTC=0;
00113     spi.write(0x81); //register address with write flag
00114     spi.write(0x80);//enabling stop bit in the seconds register
00115     SPI_mutex.unlock();
00116     gPC.printf("sw off rtc\n");
00117 }
00118 
00119 void SW_ON_BAE()
00120 {
00121     BAE_SW_EN_DS = 1;
00122     BAE_STATUS = DEVICE_POWERED;
00123     FCTN_CDMS_WR_FLASH(1,DEVICE_POWERED);
00124     gPC.printf("sw on bae\n");
00125 }
00126 
00127 void SW_OFF_BAE()
00128 {
00129     BAE_SW_EN_DS = 0;
00130     BAE_STATUS = DEVICE_DISABLED;
00131     FCTN_CDMS_WR_FLASH(1,DEVICE_DISABLED);
00132     gPC.printf("sw off bae\n");
00133 }
00134 
00135 void SW_ON_PL_BEE()
00136 {
00137     PYLD_DFF_CLK = 0;
00138     PYLD_DFF = 1;
00139     wait_us(1);
00140     PYLD_DFF_CLK = 1;
00141     wait_us(1);
00142     PYLD_DFF_CLK = 0;
00143     wait_us(1);
00144     PL_STATUS = DEVICE_POWERED;
00145     FCTN_CDMS_WR_FLASH(3,DEVICE_POWERED);
00146 }
00147 
00148 void SW_OFF_PL_BEE()
00149 {
00150     PYLD_DFF_CLK = 0;
00151     PYLD_DFF = 0;
00152     wait_us(1);
00153     PYLD_DFF_CLK = 1;
00154     wait_us(1);
00155     PYLD_DFF_CLK = 0;
00156     wait_us(1);
00157     PL_STATUS = DEVICE_DISABLED;
00158     FCTN_CDMS_WR_FLASH(3,DEVICE_DISABLED);
00159 }
00160 
00161 void SW_ON_PL_EPS()
00162 {
00163     PYLD_EPS_DFF_PWR_CLK = 0;
00164     PYLD_EPS_DFF_PWR = 1;
00165     wait_us(1);
00166     PYLD_EPS_DFF_PWR_CLK = 1;
00167     wait_us(1);
00168     PYLD_EPS_DFF_PWR_CLK = 0;
00169     wait_us(1);
00170     PL_EPS_LATCH_SW_EN = 1;
00171     FCTN_CDMS_WR_FLASH(4,1);
00172 }
00173 
00174 void SW_OFF_PL_EPS()
00175 {
00176     PYLD_EPS_DFF_PWR_CLK = 0;
00177     PYLD_EPS_DFF_PWR = 0;
00178     wait_us(1);
00179     PYLD_EPS_DFF_PWR_CLK = 1;
00180     wait_us(1);
00181     PYLD_EPS_DFF_PWR_CLK = 0;
00182     wait_us(1);
00183     PL_EPS_LATCH_SW_EN = 0;
00184     FCTN_CDMS_WR_FLASH(4,0);
00185 }
00186 
00187 void SW_ON_V_A_EN()
00188 {
00189     V_A_EN = 1;
00190     EPS_V_A_EN_STATUS = 1;
00191     FCTN_CDMS_WR_FLASH(0,1);
00192 }
00193 
00194 void SW_OFF_V_A_EN()
00195 {
00196     V_A_EN = 0;
00197     EPS_V_A_EN_STATUS = 0;
00198     FCTN_CDMS_WR_FLASH(0,0);
00199 }
00200 
00201 void RST_SD()
00202 {
00203     SD_SW_EN_DS = 0;
00204     wait_ms(10);
00205     SD_SW_EN_DS = 1;
00206     SD_STATUS = DEVICE_POWERED;
00207     FCTN_CDMS_WR_FLASH(2,DEVICE_POWERED);
00208     gPC.printf("rst sd\n");
00209 }
00210 
00211 void SW_RST_BAE()
00212 {
00213     BAE_SW_EN_DS = 0;
00214     wait_ms(10);
00215     BAE_SW_EN_DS = 1;
00216     BAE_STATUS = DEVICE_POWERED;
00217     FCTN_CDMS_WR_FLASH(1,DEVICE_POWERED);
00218     gPC.printf("rst bae\n");
00219 }
00220 
00221 void SW_RST_PL_BEE()
00222 {
00223     PYLD_DFF = 0;
00224     wait_ms(10);
00225     PYLD_DFF = 1;
00226     PL_STATUS = DEVICE_POWERED;
00227     FCTN_CDMS_WR_FLASH(3,DEVICE_POWERED);
00228 }
00229 
00230 void RST_BAE()
00231 {
00232     RESET_TO_BAE = 0;
00233     wait_ms(10);
00234     RESET_TO_BAE = 1;
00235 }
00236 
00237 void RST_PL_BEE()
00238 {
00239     RESET_TO_PYLD = 0;
00240     wait_ms(10);
00241     RESET_TO_PYLD = 1;
00242 }
00243 
00244 void CDMS_INTERNAL_RESET()
00245 {
00246     NVIC_SystemReset();
00247 }
00248 
00249 void SYS_PWR_RESET()  // Have to be decided with EPS team.
00250 {
00251     //sys_pwr_rst = 1;
00252 }
00253 
00254 void EPS_V_A_EN()     // This is a reset function
00255 {
00256     V_A_EN = 0;
00257     wait_ms(10);
00258     V_A_EN = 1;
00259 }
00260 
00261 void EPS_V_C_EN()     // This is a reset function
00262 {
00263     COM_RX_CNTRL = 0;
00264     wait_ms(10);
00265     COM_RX_CNTRL = 1;
00266 }
00267 
00268 void RST_HK_COUNTER()
00269 {
00270     firstCount = true;
00271 }
00272 
00273 int8_t CDMS_RD_SD_HK(uint8_t *sd_statusbits)
00274 {
00275     int8_t p;
00276     if(SD_SW_EN_DS != DEVICE_POWERED)
00277     {
00278         SD_RD_ERROR = 1;
00279         p = 1;
00280     }
00281     else
00282     {
00283         p = disk_read_statusbits(sd_statusbits);
00284     }
00285     return p;
00286 }
00287 
00288 void CDMS_CALIB_RTC(uint64_t time)
00289 {
00290     SPI_mutex.lock();
00291     gCS_RTC=1;
00292     spi.format(8,0);
00293     spi.frequency(1000000);
00294  
00295     gCS_RTC=0;
00296     spi.write(0x82);
00297     spi.write((uint8_t)time);//set minutes
00298     gCS_RTC=1;
00299  
00300     gCS_RTC=0;
00301     spi.write(0x83); 
00302     spi.write((uint8_t)(time>>8) & 0x3F); //set hours
00303     gCS_RTC=1;
00304     
00305     gCS_RTC=0;
00306     spi.write(0x85); 
00307     spi.write((uint8_t)(time>>16) & 0x3F); //set date
00308     gCS_RTC=1;
00309     
00310     gCS_RTC=0;
00311     spi.write(0x86); 
00312     spi.write((uint8_t)(time>>24) & 0x1F); //set month
00313     gCS_RTC=1;
00314     
00315     gCS_RTC=0;
00316     spi.write(0x87); 
00317     spi.write((uint8_t)(time>>32)); //set year to 00(2000)
00318     gCS_RTC=1;
00319     gPC.puts("\n\r rtc initalised \n");
00320     SPI_mutex.unlock();
00321 }
00322 
00323 void CDMS_RESET()
00324 {
00325     NVIC_SystemReset();    
00326 }
00327 
00328 /*
00329 //void CDMS_INTERNAL_RESET()
00330 {
00331     
00332 }
00333 */
00334 
00335 //===============================MMS RAM functions==================================
00336 
00337 void FCTN_CDMS_RD_L_RAM(Base_tm *);
00338 
00339 void FCTN_CDMS_RD_L_RAM(Base_tm *tm_pointer)
00340 {
00341     for(int i=0;i<128;i++)
00342     {
00343         //tm_pointer->TM_string[i] = 0;
00344         tm_pointer->TM_string[i+4] = CDMS_HEALTH_DATA[i];
00345     }
00346 }