siva surendar / mbed-dev

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_uart.c@150:da61ba4e9755, 2016-11-25 (annotated)

Committer:
sivasuren
Date:
Fri Nov 25 07:57:40 2016 +0000
Revision:
150:da61ba4e9755
Parent:
149:156823d33999 
surendar changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_uart.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.0.4
<> 144:ef7eb2e8f9f7 6 * @date 29-April-2016
<> 144:ef7eb2e8f9f7 7 * @brief UART HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 13 * + Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 14 @verbatim
<> 144:ef7eb2e8f9f7 15 ==============================================================================
<> 144:ef7eb2e8f9f7 16 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 17 ==============================================================================
<> 144:ef7eb2e8f9f7 18 [..]
<> 144:ef7eb2e8f9f7 19 The UART HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 (#) Declare a UART_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
<> 144:ef7eb2e8f9f7 24 (##) Enable the USARTx interface clock.
<> 144:ef7eb2e8f9f7 25 (##) UART pins configuration:
<> 144:ef7eb2e8f9f7 26 (+++) Enable the clock for the UART GPIOs.
<> 144:ef7eb2e8f9f7 27 (+++) Configure the USART pins (TX as alternate function pull-up, RX as alternate function Input).
<> 144:ef7eb2e8f9f7 28 (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 29 and HAL_UART_Receive_IT() APIs):
<> 144:ef7eb2e8f9f7 30 (+++) Configure the USARTx interrupt priority.
<> 144:ef7eb2e8f9f7 31 (+++) Enable the NVIC USART IRQ handle.
<> 144:ef7eb2e8f9f7 32 (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 33 and HAL_UART_Receive_DMA() APIs):
<> 144:ef7eb2e8f9f7 34 (+++) Declare a DMA handle structure for the Tx/Rx channel.
<> 144:ef7eb2e8f9f7 35 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 36 (+++) Configure the declared DMA handle structure with the required
<> 144:ef7eb2e8f9f7 37 Tx/Rx parameters.
<> 144:ef7eb2e8f9f7 38 (+++) Configure the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 39 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
<> 144:ef7eb2e8f9f7 40 (+++) Configure the priority and enable the NVIC for the transfer complete
<> 144:ef7eb2e8f9f7 41 interrupt on the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 42 (+++) Configure the USARTx interrupt priority and enable the NVIC USART IRQ handle
<> 144:ef7eb2e8f9f7 43 (used for last byte sending completion detection in DMA non circular mode)
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<> 144:ef7eb2e8f9f7 46 flow control and Mode(Receiver/Transmitter) in the huart Init structure.
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 (#) For the UART asynchronous mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 49 the HAL_UART_Init() API.
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 (#) For the UART Half duplex mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 52 the HAL_HalfDuplex_Init() API.
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 (#) For the Multi-Processor mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 57 the HAL_MultiProcessor_Init() API.
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 [..]
<> 144:ef7eb2e8f9f7 60 (@) The specific UART interrupts (Transmission complete interrupt,
<> 144:ef7eb2e8f9f7 61 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 144:ef7eb2e8f9f7 62 __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
<> 144:ef7eb2e8f9f7 63 and receive process.
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 [..]
<> 144:ef7eb2e8f9f7 66 (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
<> 144:ef7eb2e8f9f7 67 low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customed
<> 144:ef7eb2e8f9f7 68 HAL_UART_MspInit() API.
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 [..]
<> 144:ef7eb2e8f9f7 71 Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 74 =================================
<> 144:ef7eb2e8f9f7 75 [..]
<> 144:ef7eb2e8f9f7 76 (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
<> 144:ef7eb2e8f9f7 77 (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 80 ===================================
<> 144:ef7eb2e8f9f7 81 [..]
<> 144:ef7eb2e8f9f7 82 (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 83 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 84 add his own code by customization of function pointer HAL_UART_TxCpltCallback
<> 144:ef7eb2e8f9f7 85 (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 86 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 87 add his own code by customization of function pointer HAL_UART_RxCpltCallback
<> 144:ef7eb2e8f9f7 88 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 89 add his own code by customization of function pointer HAL_UART_ErrorCallback
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 92 ==============================
<> 144:ef7eb2e8f9f7 93 [..]
<> 144:ef7eb2e8f9f7 94 (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 95 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 96 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 97 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 98 add his own code by customization of function pointer HAL_UART_TxCpltCallback
<> 144:ef7eb2e8f9f7 99 (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
<> 144:ef7eb2e8f9f7 100 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 101 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 102 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 103 add his own code by customization of function pointer HAL_UART_RxCpltCallback
<> 144:ef7eb2e8f9f7 104 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 105 add his own code by customization of function pointer HAL_UART_ErrorCallback
<> 144:ef7eb2e8f9f7 106 (+) Pause the DMA Transfer using HAL_UART_DMAPause()
<> 144:ef7eb2e8f9f7 107 (+) Resume the DMA Transfer using HAL_UART_DMAResume()
<> 144:ef7eb2e8f9f7 108 (+) Stop the DMA Transfer using HAL_UART_DMAStop()
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 *** UART HAL driver macros list ***
<> 144:ef7eb2e8f9f7 111 =============================================
<> 144:ef7eb2e8f9f7 112 [..]
<> 144:ef7eb2e8f9f7 113 Below the list of most used macros in UART HAL driver.
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 (+) __HAL_UART_ENABLE: Enable the UART peripheral
<> 144:ef7eb2e8f9f7 116 (+) __HAL_UART_DISABLE: Disable the UART peripheral
<> 144:ef7eb2e8f9f7 117 (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
<> 144:ef7eb2e8f9f7 118 (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
<> 144:ef7eb2e8f9f7 119 (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
<> 144:ef7eb2e8f9f7 120 (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
<> 144:ef7eb2e8f9f7 121 (+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 [..]
<> 144:ef7eb2e8f9f7 124 (@) You can refer to the UART HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 @endverbatim
<> 144:ef7eb2e8f9f7 127 ******************************************************************************
<> 144:ef7eb2e8f9f7 128 * @attention
<> 144:ef7eb2e8f9f7 129 *
<> 144:ef7eb2e8f9f7 130 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 131 *
<> 144:ef7eb2e8f9f7 132 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 133 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 134 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 135 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 136 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 137 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 138 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 139 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 140 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 141 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 142 *
<> 144:ef7eb2e8f9f7 143 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 144 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 145 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 146 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 147 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 148 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 149 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 150 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 151 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 152 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 153 *
<> 144:ef7eb2e8f9f7 154 ******************************************************************************
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 158 #include "stm32f1xx_hal.h"
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 161 * @{
<> 144:ef7eb2e8f9f7 162 */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /** @defgroup UART UART
<> 144:ef7eb2e8f9f7 165 * @brief HAL UART module driver
<> 144:ef7eb2e8f9f7 166 * @{
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168 #ifdef HAL_UART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 171 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 172 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 173 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 174 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 175 /** @addtogroup UART_Private_Functions UART Private Functions
<> 144:ef7eb2e8f9f7 176 * @{
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 static void UART_SetConfig (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 179 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 180 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 181 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 182 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 183 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 184 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 185 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 186 static void UART_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 187 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 188 /**
<> 144:ef7eb2e8f9f7 189 * @}
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /* Exported functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /** @defgroup UART_Exported_Functions UART Exported Functions
<> 144:ef7eb2e8f9f7 195 * @{
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 199 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 200 *
<> 144:ef7eb2e8f9f7 201 @verbatim
<> 144:ef7eb2e8f9f7 202 ===============================================================================
<> 144:ef7eb2e8f9f7 203 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 204 ===============================================================================
<> 144:ef7eb2e8f9f7 205 [..]
<> 144:ef7eb2e8f9f7 206 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
<> 144:ef7eb2e8f9f7 207 in asynchronous mode.
<> 144:ef7eb2e8f9f7 208 (+) For the asynchronous mode only these parameters can be configured:
<> 144:ef7eb2e8f9f7 209 (++) Baud Rate
<> 144:ef7eb2e8f9f7 210 (++) Word Length
<> 144:ef7eb2e8f9f7 211 (++) Stop Bit
<> 144:ef7eb2e8f9f7 212 (++) Parity
<> 144:ef7eb2e8f9f7 213 (++) Hardware flow control
<> 144:ef7eb2e8f9f7 214 (++) Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 215 [..]
<> 144:ef7eb2e8f9f7 216 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
<> 144:ef7eb2e8f9f7 217 follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
<> 144:ef7eb2e8f9f7 218 configuration procedures (details for the procedures are available in reference manuals
<> 144:ef7eb2e8f9f7 219 (RM0008 for STM32F10Xxx MCUs and RM0041 for STM32F100xx MCUs)).
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 @endverbatim
<> 144:ef7eb2e8f9f7 223 * @{
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /*
<> 144:ef7eb2e8f9f7 227 Additionnal remark: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 228 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 229 Depending on the frame length defined by the M bit (8-bits or 9-bits),
<> 144:ef7eb2e8f9f7 230 the possible UART frame formats are as listed in the following table:
<> 144:ef7eb2e8f9f7 231 +-------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 232 | M bit | PCE bit | UART frame |
<> 144:ef7eb2e8f9f7 233 |---------------------|---------------------------------------|
<> 144:ef7eb2e8f9f7 234 | 0 | 0 | | SB | 8 bit data | STB | |
<> 144:ef7eb2e8f9f7 235 |---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 236 | 0 | 1 | | SB | 7 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 237 |---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 238 | 1 | 0 | | SB | 9 bit data | STB | |
<> 144:ef7eb2e8f9f7 239 |---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 240 | 1 | 1 | | SB | 8 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 241 +-------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /**
<> 144:ef7eb2e8f9f7 245 * @brief Initializes the UART mode according to the specified parameters in
<> 144:ef7eb2e8f9f7 246 * the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 247 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 248 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 249 * @retval HAL status
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 252 {
<> 144:ef7eb2e8f9f7 253 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 254 if(huart == NULL)
<> 144:ef7eb2e8f9f7 255 {
<> 144:ef7eb2e8f9f7 256 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 257 }
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /* Check the parameters */
<> 144:ef7eb2e8f9f7 260 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
<> 144:ef7eb2e8f9f7 261 {
<> 144:ef7eb2e8f9f7 262 /* The hardware flow control is available only for USART1, USART2, USART3 */
<> 144:ef7eb2e8f9f7 263 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 264 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
<> 144:ef7eb2e8f9f7 265 }
<> 144:ef7eb2e8f9f7 266 else
<> 144:ef7eb2e8f9f7 267 {
<> 144:ef7eb2e8f9f7 268 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 271 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 if(huart->State == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 274 {
<> 144:ef7eb2e8f9f7 275 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 276 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 279 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 280 }
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 285 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 288 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /* In asynchronous mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 291 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 292 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
<> 144:ef7eb2e8f9f7 293 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 144:ef7eb2e8f9f7 294 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 297 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /* Initialize the UART state */
<> 144:ef7eb2e8f9f7 300 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 301 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 return HAL_OK;
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /**
<> 144:ef7eb2e8f9f7 307 * @brief Initializes the half-duplex mode according to the specified
<> 144:ef7eb2e8f9f7 308 * parameters in the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 309 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 310 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 311 * @retval HAL status
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 314 {
<> 144:ef7eb2e8f9f7 315 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 316 if(huart == NULL)
<> 144:ef7eb2e8f9f7 317 {
<> 144:ef7eb2e8f9f7 318 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 319 }
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /* Check UART instance */
<> 144:ef7eb2e8f9f7 322 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 323 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 324 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 if(huart->State == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 327 {
<> 144:ef7eb2e8f9f7 328 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 329 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 332 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 333 }
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 338 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 341 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /* In half-duplex mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 344 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 345 - SCEN and IREN bits in the USART_CR3 register.*/
<> 144:ef7eb2e8f9f7 346 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 144:ef7eb2e8f9f7 347 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
<> 144:ef7eb2e8f9f7 350 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 353 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /* Initialize the UART state*/
<> 144:ef7eb2e8f9f7 356 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 357 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 return HAL_OK;
<> 144:ef7eb2e8f9f7 360 }
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /**
<> 144:ef7eb2e8f9f7 363 * @brief Initializes the LIN mode according to the specified
<> 144:ef7eb2e8f9f7 364 * parameters in the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 365 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 366 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 367 * @param BreakDetectLength: Specifies the LIN break detection length.
<> 144:ef7eb2e8f9f7 368 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 369 * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
<> 144:ef7eb2e8f9f7 370 * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
<> 144:ef7eb2e8f9f7 371 * @retval HAL status
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
<> 144:ef7eb2e8f9f7 374 {
<> 144:ef7eb2e8f9f7 375 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 376 if(huart == NULL)
<> 144:ef7eb2e8f9f7 377 {
<> 144:ef7eb2e8f9f7 378 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 379 }
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 /* Check the LIN UART instance */
<> 144:ef7eb2e8f9f7 382 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 383 /* Check the Break detection length parameter */
<> 144:ef7eb2e8f9f7 384 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
<> 144:ef7eb2e8f9f7 385 assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 386 assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 if(huart->State == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 389 {
<> 144:ef7eb2e8f9f7 390 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 391 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 392
<> 144:ef7eb2e8f9f7 393 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 394 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 395 }
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 400 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 403 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 /* In LIN mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 406 - CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 407 - SCEN and IREN bits in the USART_CR3 register.*/
<> 144:ef7eb2e8f9f7 408 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 409 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
<> 144:ef7eb2e8f9f7 412 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
<> 144:ef7eb2e8f9f7 413
<> 144:ef7eb2e8f9f7 414 /* Set the USART LIN Break detection length. */
<> 144:ef7eb2e8f9f7 415 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 418 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 /* Initialize the UART state*/
<> 144:ef7eb2e8f9f7 421 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 422 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 423
<> 144:ef7eb2e8f9f7 424 return HAL_OK;
<> 144:ef7eb2e8f9f7 425 }
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 /**
<> 144:ef7eb2e8f9f7 428 * @brief Initializes the Multi-Processor mode according to the specified
<> 144:ef7eb2e8f9f7 429 * parameters in the UART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 430 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 431 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 432 * @param Address: UART node address
<> 144:ef7eb2e8f9f7 433 * @param WakeUpMethod: specifies the UART wakeup method.
<> 144:ef7eb2e8f9f7 434 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 435 * @arg UART_WAKEUPMETHOD_IDLELINE: Wakeup by an idle line detection
<> 144:ef7eb2e8f9f7 436 * @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wakeup by an address mark
<> 144:ef7eb2e8f9f7 437 * @retval HAL status
<> 144:ef7eb2e8f9f7 438 */
<> 144:ef7eb2e8f9f7 439 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
<> 144:ef7eb2e8f9f7 440 {
<> 144:ef7eb2e8f9f7 441 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 442 if(huart == NULL)
<> 144:ef7eb2e8f9f7 443 {
<> 144:ef7eb2e8f9f7 444 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 445 }
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /* Check UART instance capabilities */
<> 144:ef7eb2e8f9f7 448 assert_param(IS_UART_MULTIPROCESSOR_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450 /* Check the Address & wake up method parameters */
<> 144:ef7eb2e8f9f7 451 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
<> 144:ef7eb2e8f9f7 452 assert_param(IS_UART_ADDRESS(Address));
<> 144:ef7eb2e8f9f7 453 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 454 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 455
<> 144:ef7eb2e8f9f7 456 if(huart->State == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 457 {
<> 144:ef7eb2e8f9f7 458 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 459 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 462 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 463 }
<> 144:ef7eb2e8f9f7 464
<> 144:ef7eb2e8f9f7 465 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 /* Disable the peripheral */
<> 144:ef7eb2e8f9f7 468 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 469
<> 144:ef7eb2e8f9f7 470 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 471 UART_SetConfig(huart);
<> 144:ef7eb2e8f9f7 472
<> 144:ef7eb2e8f9f7 473 /* In Multi-Processor mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 474 - LINEN and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 475 - SCEN, HDSEL and IREN bits in the USART_CR3 register */
<> 144:ef7eb2e8f9f7 476 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 144:ef7eb2e8f9f7 477 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /* Set the USART address node */
<> 144:ef7eb2e8f9f7 480 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, Address);
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 /* Set the wake up method by setting the WAKE bit in the CR1 register */
<> 144:ef7eb2e8f9f7 483 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 /* Enable the peripheral */
<> 144:ef7eb2e8f9f7 486 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 487
<> 144:ef7eb2e8f9f7 488 /* Initialize the UART state */
<> 144:ef7eb2e8f9f7 489 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 490 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 491
<> 144:ef7eb2e8f9f7 492 return HAL_OK;
<> 144:ef7eb2e8f9f7 493 }
<> 144:ef7eb2e8f9f7 494
<> 144:ef7eb2e8f9f7 495 /**
<> 144:ef7eb2e8f9f7 496 * @brief DeInitializes the UART peripheral.
<> 144:ef7eb2e8f9f7 497 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 498 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 499 * @retval HAL status
<> 144:ef7eb2e8f9f7 500 */
<> 144:ef7eb2e8f9f7 501 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 502 {
<> 144:ef7eb2e8f9f7 503 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 504 if(huart == NULL)
<> 144:ef7eb2e8f9f7 505 {
<> 144:ef7eb2e8f9f7 506 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 507 }
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 /* Check the parameters */
<> 144:ef7eb2e8f9f7 510 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 515 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 huart->Instance->CR1 = 0x0;
<> 144:ef7eb2e8f9f7 518 huart->Instance->CR2 = 0x0;
<> 144:ef7eb2e8f9f7 519 huart->Instance->CR3 = 0x0;
<> 144:ef7eb2e8f9f7 520
<> 144:ef7eb2e8f9f7 521 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 522 HAL_UART_MspDeInit(huart);
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 525 huart->State = HAL_UART_STATE_RESET;
<> 144:ef7eb2e8f9f7 526
<> 144:ef7eb2e8f9f7 527 /* Process Unlock */
<> 144:ef7eb2e8f9f7 528 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 529
<> 144:ef7eb2e8f9f7 530 return HAL_OK;
<> 144:ef7eb2e8f9f7 531 }
<> 144:ef7eb2e8f9f7 532
<> 144:ef7eb2e8f9f7 533 /**
<> 144:ef7eb2e8f9f7 534 * @brief UART MSP Init.
<> 144:ef7eb2e8f9f7 535 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 536 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 537 * @retval None
<> 144:ef7eb2e8f9f7 538 */
<> 144:ef7eb2e8f9f7 539 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 540 {
<> 144:ef7eb2e8f9f7 541 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 542 UNUSED(huart);
<> 144:ef7eb2e8f9f7 543 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 544 the HAL_UART_MspInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 545 */
<> 144:ef7eb2e8f9f7 546 }
<> 144:ef7eb2e8f9f7 547
<> 144:ef7eb2e8f9f7 548 /**
<> 144:ef7eb2e8f9f7 549 * @brief UART MSP DeInit.
<> 144:ef7eb2e8f9f7 550 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 551 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 552 * @retval None
<> 144:ef7eb2e8f9f7 553 */
<> 144:ef7eb2e8f9f7 554 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 555 {
<> 144:ef7eb2e8f9f7 556 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 557 UNUSED(huart);
<> 144:ef7eb2e8f9f7 558 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 559 the HAL_UART_MspDeInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 560 */
<> 144:ef7eb2e8f9f7 561 }
<> 144:ef7eb2e8f9f7 562
<> 144:ef7eb2e8f9f7 563 /**
<> 144:ef7eb2e8f9f7 564 * @}
<> 144:ef7eb2e8f9f7 565 */
<> 144:ef7eb2e8f9f7 566
<> 144:ef7eb2e8f9f7 567 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 568 * @brief UART Transmit and Receive functions
<> 144:ef7eb2e8f9f7 569 *
<> 144:ef7eb2e8f9f7 570 @verbatim
<> 144:ef7eb2e8f9f7 571 ==============================================================================
<> 144:ef7eb2e8f9f7 572 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 573 ==============================================================================
<> 144:ef7eb2e8f9f7 574 [..]
<> 144:ef7eb2e8f9f7 575 This subsection provides a set of functions allowing to manage the UART asynchronous
<> 144:ef7eb2e8f9f7 576 and Half duplex data transfers.
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 (#) There are two modes of transfer:
<> 144:ef7eb2e8f9f7 579 (++) Blocking mode: The communication is performed in polling mode.
<> 144:ef7eb2e8f9f7 580 The HAL status of all data processing is returned by the same function
<> 144:ef7eb2e8f9f7 581 after finishing transfer.
<> 144:ef7eb2e8f9f7 582 (++) Non blocking mode: The communication is performed using Interrupts
<> 144:ef7eb2e8f9f7 583 or DMA, these APIs return the HAL status.
<> 144:ef7eb2e8f9f7 584 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 585 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
<> 144:ef7eb2e8f9f7 586 using DMA mode.
<> 144:ef7eb2e8f9f7 587 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
<> 144:ef7eb2e8f9f7 588 will be executed respectively at the end of the transmit or receive process.
<> 144:ef7eb2e8f9f7 589 The HAL_UART_ErrorCallback() user callback will be executed when
<> 144:ef7eb2e8f9f7 590 a communication error is detected.
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 (#) Blocking mode APIs are:
<> 144:ef7eb2e8f9f7 593 (++) HAL_UART_Transmit()
<> 144:ef7eb2e8f9f7 594 (++) HAL_UART_Receive()
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 (#) Non Blocking mode APIs with Interrupt are:
<> 144:ef7eb2e8f9f7 597 (++) HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 598 (++) HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 599 (++) HAL_UART_IRQHandler()
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 (#) Non Blocking mode functions with DMA are:
<> 144:ef7eb2e8f9f7 602 (++) HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 603 (++) HAL_UART_Receive_DMA()
<> 144:ef7eb2e8f9f7 604 (++) HAL_UART_DMAPause()
<> 144:ef7eb2e8f9f7 605 (++) HAL_UART_DMAResume()
<> 144:ef7eb2e8f9f7 606 (++) HAL_UART_DMAStop()
<> 144:ef7eb2e8f9f7 607
<> 144:ef7eb2e8f9f7 608 (#) A set of Transfer Complete Callbacks are provided in non blocking mode:
<> 144:ef7eb2e8f9f7 609 (++) HAL_UART_TxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 610 (++) HAL_UART_TxCpltCallback()
<> 144:ef7eb2e8f9f7 611 (++) HAL_UART_RxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 612 (++) HAL_UART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 613 (++) HAL_UART_ErrorCallback()
<> 144:ef7eb2e8f9f7 614
<> 144:ef7eb2e8f9f7 615 [..]
<> 144:ef7eb2e8f9f7 616 (@) In the Half duplex communication, it is forbidden to run the transmit
<> 144:ef7eb2e8f9f7 617 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX
<> 144:ef7eb2e8f9f7 618 can't be useful.
<> 144:ef7eb2e8f9f7 619
<> 144:ef7eb2e8f9f7 620 @endverbatim
<> 144:ef7eb2e8f9f7 621 * @{
<> 144:ef7eb2e8f9f7 622 */
<> 144:ef7eb2e8f9f7 623
<> 144:ef7eb2e8f9f7 624 /**
<> 144:ef7eb2e8f9f7 625 * @brief Sends an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 626 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 627 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 628 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 629 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 630 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 631 * @retval HAL status
<> 144:ef7eb2e8f9f7 632 */
<> 144:ef7eb2e8f9f7 633 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 634 {
<> 144:ef7eb2e8f9f7 635 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 636 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 637
<> 144:ef7eb2e8f9f7 638 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 639 if((tmp_state == HAL_UART_STATE_READY) || (tmp_state == HAL_UART_STATE_BUSY_RX))
<> 144:ef7eb2e8f9f7 640 {
<> 144:ef7eb2e8f9f7 641 if((pData == NULL) || (Size == 0))
<> 144:ef7eb2e8f9f7 642 {
<> 144:ef7eb2e8f9f7 643 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 644 }
<> 144:ef7eb2e8f9f7 645
<> 144:ef7eb2e8f9f7 646 /* Process Locked */
<> 144:ef7eb2e8f9f7 647 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 650 /* Check if a non-blocking receive process is ongoing or not */
<> 144:ef7eb2e8f9f7 651 if(huart->State == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 652 {
<> 144:ef7eb2e8f9f7 653 huart->State = HAL_UART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 654 }
<> 144:ef7eb2e8f9f7 655 else
<> 144:ef7eb2e8f9f7 656 {
<> 144:ef7eb2e8f9f7 657 huart->State = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 658 }
<> 144:ef7eb2e8f9f7 659
<> 144:ef7eb2e8f9f7 660 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 661 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 662 while(huart->TxXferCount > 0)
<> 144:ef7eb2e8f9f7 663 {
<> 144:ef7eb2e8f9f7 664 huart->TxXferCount--;
<> 144:ef7eb2e8f9f7 665 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 666 {
<> 144:ef7eb2e8f9f7 667 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 668 {
<> 144:ef7eb2e8f9f7 669 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 670 }
<> 144:ef7eb2e8f9f7 671 tmp = (uint16_t*) pData;
<> 144:ef7eb2e8f9f7 672 huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 673 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 674 {
<> 144:ef7eb2e8f9f7 675 pData +=2;
<> 144:ef7eb2e8f9f7 676 }
<> 144:ef7eb2e8f9f7 677 else
<> 144:ef7eb2e8f9f7 678 {
<> 144:ef7eb2e8f9f7 679 pData +=1;
<> 144:ef7eb2e8f9f7 680 }
<> 144:ef7eb2e8f9f7 681 }
<> 144:ef7eb2e8f9f7 682 else
<> 144:ef7eb2e8f9f7 683 {
<> 144:ef7eb2e8f9f7 684 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 685 {
<> 144:ef7eb2e8f9f7 686 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 687 }
<> 144:ef7eb2e8f9f7 688 huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
<> 144:ef7eb2e8f9f7 689 }
<> 144:ef7eb2e8f9f7 690 }
<> 144:ef7eb2e8f9f7 691
<> 144:ef7eb2e8f9f7 692 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 693 {
<> 144:ef7eb2e8f9f7 694 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 695 }
<> 144:ef7eb2e8f9f7 696
<> 144:ef7eb2e8f9f7 697 /* Check if a non-blocking receive process is ongoing or not */
<> 144:ef7eb2e8f9f7 698 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 699 {
<> 144:ef7eb2e8f9f7 700 huart->State = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 701 }
<> 144:ef7eb2e8f9f7 702 else
<> 144:ef7eb2e8f9f7 703 {
<> 144:ef7eb2e8f9f7 704 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 705 }
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 708 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 709
<> 144:ef7eb2e8f9f7 710 return HAL_OK;
<> 144:ef7eb2e8f9f7 711 }
<> 144:ef7eb2e8f9f7 712 else
<> 144:ef7eb2e8f9f7 713 {
<> 144:ef7eb2e8f9f7 714 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 715 }
<> 144:ef7eb2e8f9f7 716 }
<> 144:ef7eb2e8f9f7 717
<> 144:ef7eb2e8f9f7 718 /**
<> 144:ef7eb2e8f9f7 719 * @brief Receives an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 720 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 721 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 722 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 723 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 724 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 725 * @retval HAL status
<> 144:ef7eb2e8f9f7 726 */
<> 144:ef7eb2e8f9f7 727 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 728 {
<> 144:ef7eb2e8f9f7 729 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 730 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 731
<> 144:ef7eb2e8f9f7 732 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 733 if((tmp_state == HAL_UART_STATE_READY) || (tmp_state == HAL_UART_STATE_BUSY_TX))
<> 144:ef7eb2e8f9f7 734 {
<> 144:ef7eb2e8f9f7 735 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 736 {
<> 144:ef7eb2e8f9f7 737 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 738 }
<> 144:ef7eb2e8f9f7 739
<> 144:ef7eb2e8f9f7 740 /* Process Locked */
<> 144:ef7eb2e8f9f7 741 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 742
<> 144:ef7eb2e8f9f7 743 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 744 /* Check if a non-blocking transmit process is ongoing or not */
<> 144:ef7eb2e8f9f7 745 if(huart->State == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 746 {
<> 144:ef7eb2e8f9f7 747 huart->State = HAL_UART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 748 }
<> 144:ef7eb2e8f9f7 749 else
<> 144:ef7eb2e8f9f7 750 {
<> 144:ef7eb2e8f9f7 751 huart->State = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 752 }
<> 144:ef7eb2e8f9f7 753
<> 144:ef7eb2e8f9f7 754 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 755 huart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 756
<> 144:ef7eb2e8f9f7 757 /* Check the remain data to be received */
<> 144:ef7eb2e8f9f7 758 while(huart->RxXferCount > 0)
<> 144:ef7eb2e8f9f7 759 {
<> 144:ef7eb2e8f9f7 760 huart->RxXferCount--;
<> 144:ef7eb2e8f9f7 761 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 762 {
<> 144:ef7eb2e8f9f7 763 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 764 {
<> 144:ef7eb2e8f9f7 765 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 766 }
<> 144:ef7eb2e8f9f7 767 tmp = (uint16_t*) pData ;
<> 144:ef7eb2e8f9f7 768 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 769 {
<> 144:ef7eb2e8f9f7 770 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 771 pData +=2;
<> 144:ef7eb2e8f9f7 772 }
<> 144:ef7eb2e8f9f7 773 else
<> 144:ef7eb2e8f9f7 774 {
<> 144:ef7eb2e8f9f7 775 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 776 pData +=1;
<> 144:ef7eb2e8f9f7 777 }
<> 144:ef7eb2e8f9f7 778
<> 144:ef7eb2e8f9f7 779 }
<> 144:ef7eb2e8f9f7 780 else
<> 144:ef7eb2e8f9f7 781 {
<> 144:ef7eb2e8f9f7 782 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 783 {
<> 144:ef7eb2e8f9f7 784 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 785 }
<> 144:ef7eb2e8f9f7 786 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 787 {
<> 144:ef7eb2e8f9f7 788 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 789 }
<> 144:ef7eb2e8f9f7 790 else
<> 144:ef7eb2e8f9f7 791 {
<> 144:ef7eb2e8f9f7 792 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
<> 144:ef7eb2e8f9f7 793 }
<> 144:ef7eb2e8f9f7 794
<> 144:ef7eb2e8f9f7 795 }
<> 144:ef7eb2e8f9f7 796 }
<> 144:ef7eb2e8f9f7 797
<> 144:ef7eb2e8f9f7 798 /* Check if a non-blocking transmit process is ongoing or not */
<> 144:ef7eb2e8f9f7 799 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 800 {
<> 144:ef7eb2e8f9f7 801 huart->State = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 802 }
<> 144:ef7eb2e8f9f7 803 else
<> 144:ef7eb2e8f9f7 804 {
<> 144:ef7eb2e8f9f7 805 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 806 }
<> 144:ef7eb2e8f9f7 807 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 808 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 809
<> 144:ef7eb2e8f9f7 810 return HAL_OK;
<> 144:ef7eb2e8f9f7 811 }
<> 144:ef7eb2e8f9f7 812 else
<> 144:ef7eb2e8f9f7 813 {
<> 144:ef7eb2e8f9f7 814 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 815 }
<> 144:ef7eb2e8f9f7 816 }
<> 144:ef7eb2e8f9f7 817
<> 144:ef7eb2e8f9f7 818 /**
<> 144:ef7eb2e8f9f7 819 * @brief Sends an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 820 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 821 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 822 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 823 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 824 * @retval HAL status
<> 144:ef7eb2e8f9f7 825 */
<> 144:ef7eb2e8f9f7 826 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 827 {
<> 144:ef7eb2e8f9f7 828 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 829
<> 144:ef7eb2e8f9f7 830 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 831 if((tmp_state == HAL_UART_STATE_READY) || (tmp_state == HAL_UART_STATE_BUSY_RX))
<> 144:ef7eb2e8f9f7 832 {
<> 144:ef7eb2e8f9f7 833 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 834 {
<> 144:ef7eb2e8f9f7 835 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 836 }
<> 144:ef7eb2e8f9f7 837
<> 144:ef7eb2e8f9f7 838 /* Process Locked */
<> 144:ef7eb2e8f9f7 839 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 840
<> 144:ef7eb2e8f9f7 841 huart->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 842 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 843 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 844
<> 144:ef7eb2e8f9f7 845 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 846 /* Check if a receive process is ongoing or not */
<> 144:ef7eb2e8f9f7 847 if(huart->State == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 848 {
<> 144:ef7eb2e8f9f7 849 huart->State = HAL_UART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 850 }
<> 144:ef7eb2e8f9f7 851 else
<> 144:ef7eb2e8f9f7 852 {
<> 144:ef7eb2e8f9f7 853 huart->State = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 854 }
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 857 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 858
<> 144:ef7eb2e8f9f7 859 /* Enable the UART Transmit data register empty Interrupt */
<> 144:ef7eb2e8f9f7 860 __HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 861
<> 144:ef7eb2e8f9f7 862 return HAL_OK;
<> 144:ef7eb2e8f9f7 863 }
<> 144:ef7eb2e8f9f7 864 else
<> 144:ef7eb2e8f9f7 865 {
<> 144:ef7eb2e8f9f7 866 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 867 }
<> 144:ef7eb2e8f9f7 868 }
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 /**
<> 144:ef7eb2e8f9f7 871 * @brief Receives an amount of data in non blocking mode
<> 144:ef7eb2e8f9f7 872 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 873 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 874 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 875 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 876 * @retval HAL status
<> 144:ef7eb2e8f9f7 877 */
<> 144:ef7eb2e8f9f7 878 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 879 {
<> 144:ef7eb2e8f9f7 880 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 881
<> 144:ef7eb2e8f9f7 882 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 883 if((tmp_state == HAL_UART_STATE_READY) || (tmp_state == HAL_UART_STATE_BUSY_TX))
<> 144:ef7eb2e8f9f7 884 {
<> 144:ef7eb2e8f9f7 885 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 886 {
<> 144:ef7eb2e8f9f7 887 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 888 }
<> 144:ef7eb2e8f9f7 889
<> 144:ef7eb2e8f9f7 890 /* Process Locked */
<> 144:ef7eb2e8f9f7 891 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 892
<> 144:ef7eb2e8f9f7 893 huart->pRxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 894 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 895 huart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 896
<> 144:ef7eb2e8f9f7 897 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 898 /* Check if a transmit process is ongoing or not */
<> 144:ef7eb2e8f9f7 899 if(huart->State == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 900 {
<> 144:ef7eb2e8f9f7 901 huart->State = HAL_UART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 902 }
<> 144:ef7eb2e8f9f7 903 else
<> 144:ef7eb2e8f9f7 904 {
<> 144:ef7eb2e8f9f7 905 huart->State = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 906 }
<> 144:ef7eb2e8f9f7 907
<> 144:ef7eb2e8f9f7 908 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 909 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 910
<> 144:ef7eb2e8f9f7 911 /* Enable the UART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 912 __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 913
<> 144:ef7eb2e8f9f7 914 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 915 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 916
<> 144:ef7eb2e8f9f7 917 /* Enable the UART Data Register not empty Interrupt */
<> 144:ef7eb2e8f9f7 918 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 919
<> 144:ef7eb2e8f9f7 920 return HAL_OK;
<> 144:ef7eb2e8f9f7 921 }
<> 144:ef7eb2e8f9f7 922 else
<> 144:ef7eb2e8f9f7 923 {
<> 144:ef7eb2e8f9f7 924 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 925 }
<> 144:ef7eb2e8f9f7 926 }
<> 144:ef7eb2e8f9f7 927
<> 144:ef7eb2e8f9f7 928 /**
<> 144:ef7eb2e8f9f7 929 * @brief Sends an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 930 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 931 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 932 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 933 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 934 * @retval HAL status
<> 144:ef7eb2e8f9f7 935 */
<> 144:ef7eb2e8f9f7 936 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 937 {
<> 144:ef7eb2e8f9f7 938 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 939 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 940
<> 144:ef7eb2e8f9f7 941 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 942 if((tmp_state == HAL_UART_STATE_READY) || (tmp_state == HAL_UART_STATE_BUSY_RX))
<> 144:ef7eb2e8f9f7 943 {
<> 144:ef7eb2e8f9f7 944 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 945 {
<> 144:ef7eb2e8f9f7 946 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 947 }
<> 144:ef7eb2e8f9f7 948
<> 144:ef7eb2e8f9f7 949 /* Process Locked */
<> 144:ef7eb2e8f9f7 950 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 951
<> 144:ef7eb2e8f9f7 952 huart->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 953 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 954 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 955
<> 144:ef7eb2e8f9f7 956 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 957 /* Check if a receive process is ongoing or not */
<> 144:ef7eb2e8f9f7 958 if(huart->State == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 959 {
<> 144:ef7eb2e8f9f7 960 huart->State = HAL_UART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 961 }
<> 144:ef7eb2e8f9f7 962 else
<> 144:ef7eb2e8f9f7 963 {
<> 144:ef7eb2e8f9f7 964 huart->State = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 965 }
<> 144:ef7eb2e8f9f7 966
<> 144:ef7eb2e8f9f7 967 /* Set the UART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 968 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 969
<> 144:ef7eb2e8f9f7 970 /* Set the UART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 971 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 972
<> 144:ef7eb2e8f9f7 973 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 974 huart->hdmatx->XferErrorCallback = UART_DMAError;
<> 144:ef7eb2e8f9f7 975
<> 144:ef7eb2e8f9f7 976 /* Enable the UART transmit DMA channel */
<> 144:ef7eb2e8f9f7 977 tmp = (uint32_t*)&pData;
<> 144:ef7eb2e8f9f7 978 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 979
<> 144:ef7eb2e8f9f7 980 /* Clear the TC flag in the SR register by writing 0 to it */
<> 144:ef7eb2e8f9f7 981 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
<> 144:ef7eb2e8f9f7 982
<> 144:ef7eb2e8f9f7 983 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 984 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 985 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 986
<> 144:ef7eb2e8f9f7 987 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 988 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 989
<> 144:ef7eb2e8f9f7 990 return HAL_OK;
<> 144:ef7eb2e8f9f7 991 }
<> 144:ef7eb2e8f9f7 992 else
<> 144:ef7eb2e8f9f7 993 {
<> 144:ef7eb2e8f9f7 994 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 995 }
<> 144:ef7eb2e8f9f7 996 }
<> 144:ef7eb2e8f9f7 997
<> 144:ef7eb2e8f9f7 998 /**
<> 144:ef7eb2e8f9f7 999 * @brief Receives an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 1000 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1001 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1002 * @param pData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 1003 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 1004 * @note When the UART parity is enabled (PCE = 1), the received data contain
<> 144:ef7eb2e8f9f7 1005 * the parity bit (MSB position)
<> 144:ef7eb2e8f9f7 1006 * @retval HAL status
<> 144:ef7eb2e8f9f7 1007 */
<> 144:ef7eb2e8f9f7 1008 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1009 {
<> 144:ef7eb2e8f9f7 1010 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1011 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 1012
<> 144:ef7eb2e8f9f7 1013 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 1014 if((tmp_state == HAL_UART_STATE_READY) || (tmp_state == HAL_UART_STATE_BUSY_TX))
<> 144:ef7eb2e8f9f7 1015 {
<> 144:ef7eb2e8f9f7 1016 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 1017 {
<> 144:ef7eb2e8f9f7 1018 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1019 }
<> 144:ef7eb2e8f9f7 1020
<> 144:ef7eb2e8f9f7 1021 /* Process Locked */
<> 144:ef7eb2e8f9f7 1022 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1023
<> 144:ef7eb2e8f9f7 1024 huart->pRxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 1025 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 1026
<> 144:ef7eb2e8f9f7 1027 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1028 /* Check if a transmit process is ongoing or not */
<> 144:ef7eb2e8f9f7 1029 if(huart->State == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1030 {
<> 144:ef7eb2e8f9f7 1031 huart->State = HAL_UART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 1032 }
<> 144:ef7eb2e8f9f7 1033 else
<> 144:ef7eb2e8f9f7 1034 {
<> 144:ef7eb2e8f9f7 1035 huart->State = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 1036 }
<> 144:ef7eb2e8f9f7 1037
<> 144:ef7eb2e8f9f7 1038 /* Set the UART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 1039 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 1040
<> 144:ef7eb2e8f9f7 1041 /* Set the UART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1042 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 1043
<> 144:ef7eb2e8f9f7 1044 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 1045 huart->hdmarx->XferErrorCallback = UART_DMAError;
<> 144:ef7eb2e8f9f7 1046
<> 144:ef7eb2e8f9f7 1047 /* Enable the DMA channel */
<> 144:ef7eb2e8f9f7 1048 tmp = (uint32_t*)&pData;
<> 144:ef7eb2e8f9f7 1049 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 1050
<> 144:ef7eb2e8f9f7 1051 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1052 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1053 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1054
<> 144:ef7eb2e8f9f7 1055 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1056 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1057
<> 144:ef7eb2e8f9f7 1058 return HAL_OK;
<> 144:ef7eb2e8f9f7 1059 }
<> 144:ef7eb2e8f9f7 1060 else
<> 144:ef7eb2e8f9f7 1061 {
<> 144:ef7eb2e8f9f7 1062 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1063 }
<> 144:ef7eb2e8f9f7 1064 }
<> 144:ef7eb2e8f9f7 1065
<> 144:ef7eb2e8f9f7 1066 /**
<> 144:ef7eb2e8f9f7 1067 * @brief Pauses the DMA Transfer.
<> 144:ef7eb2e8f9f7 1068 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1069 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1070 * @retval HAL status
<> 144:ef7eb2e8f9f7 1071 */
<> 144:ef7eb2e8f9f7 1072 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1073 {
<> 144:ef7eb2e8f9f7 1074 /* Process Locked */
<> 144:ef7eb2e8f9f7 1075 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1076
<> 144:ef7eb2e8f9f7 1077 if(huart->State == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1078 {
<> 144:ef7eb2e8f9f7 1079 /* Disable the UART DMA Tx request */
<> 144:ef7eb2e8f9f7 1080 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1081 }
<> 144:ef7eb2e8f9f7 1082 else if(huart->State == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1083 {
<> 144:ef7eb2e8f9f7 1084 /* Disable the UART DMA Rx request */
<> 144:ef7eb2e8f9f7 1085 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1086 }
<> 144:ef7eb2e8f9f7 1087 else if (huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 1088 {
<> 144:ef7eb2e8f9f7 1089 /* Disable the UART DMA Tx & Rx requests */
<> 144:ef7eb2e8f9f7 1090 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_DMAT | USART_CR3_DMAR));
<> 144:ef7eb2e8f9f7 1091 }
<> 144:ef7eb2e8f9f7 1092 else
<> 144:ef7eb2e8f9f7 1093 {
<> 144:ef7eb2e8f9f7 1094 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1095 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1096
<> 144:ef7eb2e8f9f7 1097 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1098 }
<> 144:ef7eb2e8f9f7 1099
<> 144:ef7eb2e8f9f7 1100 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1101 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1102
<> 144:ef7eb2e8f9f7 1103 return HAL_OK;
<> 144:ef7eb2e8f9f7 1104 }
<> 144:ef7eb2e8f9f7 1105
<> 144:ef7eb2e8f9f7 1106 /**
<> 144:ef7eb2e8f9f7 1107 * @brief Resumes the DMA Transfer.
<> 144:ef7eb2e8f9f7 1108 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1109 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1110 * @retval HAL status
<> 144:ef7eb2e8f9f7 1111 */
<> 144:ef7eb2e8f9f7 1112 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1113 {
<> 144:ef7eb2e8f9f7 1114 /* Process Locked */
<> 144:ef7eb2e8f9f7 1115 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1116
<> 144:ef7eb2e8f9f7 1117 if(huart->State == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1118 {
<> 144:ef7eb2e8f9f7 1119 /* Enable the UART DMA Tx request */
<> 144:ef7eb2e8f9f7 1120 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1121 }
<> 144:ef7eb2e8f9f7 1122 else if(huart->State == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1123 {
<> 144:ef7eb2e8f9f7 1124 /* Clear the Overrun flag before resumming the Rx transfer*/
<> 144:ef7eb2e8f9f7 1125 __HAL_UART_CLEAR_OREFLAG(huart);
<> 144:ef7eb2e8f9f7 1126 /* Enable the UART DMA Rx request */
<> 144:ef7eb2e8f9f7 1127 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1128 }
<> 144:ef7eb2e8f9f7 1129 else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 1130 {
<> 144:ef7eb2e8f9f7 1131 /* Clear the Overrun flag before resumming the Rx transfer*/
<> 144:ef7eb2e8f9f7 1132 __HAL_UART_CLEAR_OREFLAG(huart);
<> 144:ef7eb2e8f9f7 1133 /* Enable the UART DMA Tx & Rx request */
<> 144:ef7eb2e8f9f7 1134 SET_BIT(huart->Instance->CR3, (USART_CR3_DMAT | USART_CR3_DMAR));
<> 144:ef7eb2e8f9f7 1135 }
<> 144:ef7eb2e8f9f7 1136 else
<> 144:ef7eb2e8f9f7 1137 {
<> 144:ef7eb2e8f9f7 1138 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1139 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1140
<> 144:ef7eb2e8f9f7 1141 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1142 }
<> 144:ef7eb2e8f9f7 1143
<> 144:ef7eb2e8f9f7 1144 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1145 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1146
<> 144:ef7eb2e8f9f7 1147 return HAL_OK;
<> 144:ef7eb2e8f9f7 1148 }
<> 144:ef7eb2e8f9f7 1149
<> 144:ef7eb2e8f9f7 1150 /**
<> 144:ef7eb2e8f9f7 1151 * @brief Stops the DMA Transfer.
<> 144:ef7eb2e8f9f7 1152 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1153 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1154 * @retval HAL status
<> 144:ef7eb2e8f9f7 1155 */
<> 144:ef7eb2e8f9f7 1156 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1157 {
<> 144:ef7eb2e8f9f7 1158 /* The Lock is not implemented on this API to allow the user application
<> 144:ef7eb2e8f9f7 1159 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
<> 144:ef7eb2e8f9f7 1160 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
<> 144:ef7eb2e8f9f7 1161 and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 1162 */
<> 144:ef7eb2e8f9f7 1163
<> 144:ef7eb2e8f9f7 1164 /* Disable the UART Tx/Rx DMA requests */
<> 144:ef7eb2e8f9f7 1165 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_DMAT | USART_CR3_DMAR));
<> 144:ef7eb2e8f9f7 1166
<> 144:ef7eb2e8f9f7 1167 /* Abort the UART DMA tx channel */
<> 144:ef7eb2e8f9f7 1168 if(huart->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 1169 {
<> 144:ef7eb2e8f9f7 1170 HAL_DMA_Abort(huart->hdmatx);
<> 144:ef7eb2e8f9f7 1171 }
<> 144:ef7eb2e8f9f7 1172 /* Abort the UART DMA rx channel */
<> 144:ef7eb2e8f9f7 1173 if(huart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1174 {
<> 144:ef7eb2e8f9f7 1175 HAL_DMA_Abort(huart->hdmarx);
<> 144:ef7eb2e8f9f7 1176 }
<> 144:ef7eb2e8f9f7 1177
<> 144:ef7eb2e8f9f7 1178 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1179
<> 144:ef7eb2e8f9f7 1180 return HAL_OK;
<> 144:ef7eb2e8f9f7 1181 }
<> 144:ef7eb2e8f9f7 1182
<> 144:ef7eb2e8f9f7 1183 /**
<> 144:ef7eb2e8f9f7 1184 * @brief This function handles UART interrupt request.
<> 144:ef7eb2e8f9f7 1185 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1186 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1187 * @retval None
<> 144:ef7eb2e8f9f7 1188 */
<> 144:ef7eb2e8f9f7 1189 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1190 {
<> 144:ef7eb2e8f9f7 1191 uint32_t tmp_flag = 0, tmp_it_source = 0;
<> 144:ef7eb2e8f9f7 1192
<> 144:ef7eb2e8f9f7 1193 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_PE);
<> 144:ef7eb2e8f9f7 1194 tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1195 /* UART parity error interrupt occurred ------------------------------------*/
<> 144:ef7eb2e8f9f7 1196 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1197 {
<> 144:ef7eb2e8f9f7 1198 huart->ErrorCode |= HAL_UART_ERROR_PE;
<> 144:ef7eb2e8f9f7 1199 }
<> 144:ef7eb2e8f9f7 1200
<> 144:ef7eb2e8f9f7 1201 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_FE);
<> 144:ef7eb2e8f9f7 1202 tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 1203 /* UART frame error interrupt occurred -------------------------------------*/
<> 144:ef7eb2e8f9f7 1204 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1205 {
<> 144:ef7eb2e8f9f7 1206 huart->ErrorCode |= HAL_UART_ERROR_FE;
<> 144:ef7eb2e8f9f7 1207 }
<> 144:ef7eb2e8f9f7 1208
<> 144:ef7eb2e8f9f7 1209 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_NE);
<> 144:ef7eb2e8f9f7 1210 /* UART noise error interrupt occurred -------------------------------------*/
<> 144:ef7eb2e8f9f7 1211 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1212 {
<> 144:ef7eb2e8f9f7 1213 huart->ErrorCode |= HAL_UART_ERROR_NE;
<> 144:ef7eb2e8f9f7 1214 }
<> 144:ef7eb2e8f9f7 1215
<> 144:ef7eb2e8f9f7 1216 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_ORE);
<> 144:ef7eb2e8f9f7 1217 /* UART Over-Run interrupt occurred ----------------------------------------*/
<> 144:ef7eb2e8f9f7 1218 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1219 {
<> 144:ef7eb2e8f9f7 1220 huart->ErrorCode |= HAL_UART_ERROR_ORE;
<> 144:ef7eb2e8f9f7 1221 }
<> 144:ef7eb2e8f9f7 1222
<> 144:ef7eb2e8f9f7 1223 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE);
<> 144:ef7eb2e8f9f7 1224 tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1225 /* UART in mode Receiver ---------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1226 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1227 {
<> 144:ef7eb2e8f9f7 1228 UART_Receive_IT(huart);
<> 144:ef7eb2e8f9f7 1229 }
<> 144:ef7eb2e8f9f7 1230
<> 144:ef7eb2e8f9f7 1231 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_TXE);
<> 144:ef7eb2e8f9f7 1232 tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1233 /* UART in mode Transmitter ------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1234 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1235 {
<> 144:ef7eb2e8f9f7 1236 UART_Transmit_IT(huart);
<> 144:ef7eb2e8f9f7 1237 }
<> 144:ef7eb2e8f9f7 1238
<> 144:ef7eb2e8f9f7 1239 tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_TC);
<> 144:ef7eb2e8f9f7 1240 tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1241 /* UART in mode Transmitter end --------------------------------------------*/
<> 144:ef7eb2e8f9f7 1242 if((tmp_flag != RESET) && (tmp_it_source != RESET))
<> 144:ef7eb2e8f9f7 1243 {
<> 144:ef7eb2e8f9f7 1244 UART_EndTransmit_IT(huart);
<> 144:ef7eb2e8f9f7 1245 }
<> 144:ef7eb2e8f9f7 1246
<> 144:ef7eb2e8f9f7 1247 if(huart->ErrorCode != HAL_UART_ERROR_NONE)
<> 144:ef7eb2e8f9f7 1248 {
<> 144:ef7eb2e8f9f7 1249 /* Clear all the error flag at once */
<> 144:ef7eb2e8f9f7 1250 __HAL_UART_CLEAR_PEFLAG(huart);
<> 144:ef7eb2e8f9f7 1251
<> 144:ef7eb2e8f9f7 1252 /* Set the UART state ready to be able to start again the process */
<> 144:ef7eb2e8f9f7 1253 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1254
<> 144:ef7eb2e8f9f7 1255 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1256 }
<> 144:ef7eb2e8f9f7 1257 }
<> 144:ef7eb2e8f9f7 1258
<> 144:ef7eb2e8f9f7 1259 /**
<> 144:ef7eb2e8f9f7 1260 * @brief Tx Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1261 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1262 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1263 * @retval None
<> 144:ef7eb2e8f9f7 1264 */
<> 144:ef7eb2e8f9f7 1265 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1266 {
<> 144:ef7eb2e8f9f7 1267 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1268 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1269 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1270 the HAL_UART_TxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1271 */
<> 144:ef7eb2e8f9f7 1272 }
<> 144:ef7eb2e8f9f7 1273
<> 144:ef7eb2e8f9f7 1274 /**
<> 144:ef7eb2e8f9f7 1275 * @brief Tx Half Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1276 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1277 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1278 * @retval None
<> 144:ef7eb2e8f9f7 1279 */
<> 144:ef7eb2e8f9f7 1280 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1281 {
<> 144:ef7eb2e8f9f7 1282 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1283 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1284 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1285 the HAL_UART_TxHalfCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1286 */
<> 144:ef7eb2e8f9f7 1287 }
<> 144:ef7eb2e8f9f7 1288
<> 144:ef7eb2e8f9f7 1289 /**
<> 144:ef7eb2e8f9f7 1290 * @brief Rx Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1291 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1292 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1293 * @retval None
<> 144:ef7eb2e8f9f7 1294 */
<> 144:ef7eb2e8f9f7 1295 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1296 {
<> 144:ef7eb2e8f9f7 1297 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1298 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1299 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1300 the HAL_UART_RxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1301 */
<> 144:ef7eb2e8f9f7 1302 }
<> 144:ef7eb2e8f9f7 1303
<> 144:ef7eb2e8f9f7 1304 /**
<> 144:ef7eb2e8f9f7 1305 * @brief Rx Half Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1306 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1307 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1308 * @retval None
<> 144:ef7eb2e8f9f7 1309 */
<> 144:ef7eb2e8f9f7 1310 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1311 {
<> 144:ef7eb2e8f9f7 1312 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1313 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1314 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1315 the HAL_UART_RxHalfCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1316 */
<> 144:ef7eb2e8f9f7 1317 }
<> 144:ef7eb2e8f9f7 1318
<> 144:ef7eb2e8f9f7 1319 /**
<> 144:ef7eb2e8f9f7 1320 * @brief UART error callbacks.
<> 144:ef7eb2e8f9f7 1321 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1322 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1323 * @retval None
<> 144:ef7eb2e8f9f7 1324 */
<> 144:ef7eb2e8f9f7 1325 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1326 {
<> 144:ef7eb2e8f9f7 1327 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1328 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1329 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1330 the HAL_UART_ErrorCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1331 */
<> 144:ef7eb2e8f9f7 1332 }
<> 144:ef7eb2e8f9f7 1333
<> 144:ef7eb2e8f9f7 1334 /**
<> 144:ef7eb2e8f9f7 1335 * @}
<> 144:ef7eb2e8f9f7 1336 */
<> 144:ef7eb2e8f9f7 1337
<> 144:ef7eb2e8f9f7 1338 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 1339 * @brief UART control functions
<> 144:ef7eb2e8f9f7 1340 *
<> 144:ef7eb2e8f9f7 1341 @verbatim
<> 144:ef7eb2e8f9f7 1342 ==============================================================================
<> 144:ef7eb2e8f9f7 1343 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1344 ==============================================================================
<> 144:ef7eb2e8f9f7 1345 [..]
<> 144:ef7eb2e8f9f7 1346 This subsection provides a set of functions allowing to control the UART:
<> 144:ef7eb2e8f9f7 1347 (+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
<> 144:ef7eb2e8f9f7 1348 (+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
<> 144:ef7eb2e8f9f7 1349 (+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
<> 144:ef7eb2e8f9f7 1350 (+) HAL_HalfDuplex_EnableTransmitter() API to enable the UART transmitter and disables the UART receiver in Half Duplex mode
<> 144:ef7eb2e8f9f7 1351 (+) HAL_HalfDuplex_EnableReceiver() API to enable the UART receiver and disables the UART transmitter in Half Duplex mode
<> 144:ef7eb2e8f9f7 1352
<> 144:ef7eb2e8f9f7 1353 @endverbatim
<> 144:ef7eb2e8f9f7 1354 * @{
<> 144:ef7eb2e8f9f7 1355 */
<> 144:ef7eb2e8f9f7 1356
<> 144:ef7eb2e8f9f7 1357 /**
<> 144:ef7eb2e8f9f7 1358 * @brief Transmits break characters.
<> 144:ef7eb2e8f9f7 1359 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1360 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1361 * @retval HAL status
<> 144:ef7eb2e8f9f7 1362 */
<> 144:ef7eb2e8f9f7 1363 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1364 {
<> 144:ef7eb2e8f9f7 1365 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1366 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1367
<> 144:ef7eb2e8f9f7 1368 /* Process Locked */
<> 144:ef7eb2e8f9f7 1369 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1370
<> 144:ef7eb2e8f9f7 1371 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1372
<> 144:ef7eb2e8f9f7 1373 /* Send break characters */
<> 144:ef7eb2e8f9f7 1374 SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
<> 144:ef7eb2e8f9f7 1375
<> 144:ef7eb2e8f9f7 1376 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1377
<> 144:ef7eb2e8f9f7 1378 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1379 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1380
<> 144:ef7eb2e8f9f7 1381 return HAL_OK;
<> 144:ef7eb2e8f9f7 1382 }
<> 144:ef7eb2e8f9f7 1383
<> 144:ef7eb2e8f9f7 1384 /**
<> 144:ef7eb2e8f9f7 1385 * @brief Enters the UART in mute mode.
<> 144:ef7eb2e8f9f7 1386 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1387 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1388 * @retval HAL status
<> 144:ef7eb2e8f9f7 1389 */
<> 144:ef7eb2e8f9f7 1390 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1391 {
<> 144:ef7eb2e8f9f7 1392 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1393 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1394
<> 144:ef7eb2e8f9f7 1395 /* Process Locked */
<> 144:ef7eb2e8f9f7 1396 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1397
<> 144:ef7eb2e8f9f7 1398 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1399
<> 144:ef7eb2e8f9f7 1400 /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
<> 144:ef7eb2e8f9f7 1401 SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
<> 144:ef7eb2e8f9f7 1402
<> 144:ef7eb2e8f9f7 1403 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1404
<> 144:ef7eb2e8f9f7 1405 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1406 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1407
<> 144:ef7eb2e8f9f7 1408 return HAL_OK;
<> 144:ef7eb2e8f9f7 1409 }
<> 144:ef7eb2e8f9f7 1410
<> 144:ef7eb2e8f9f7 1411 /**
<> 144:ef7eb2e8f9f7 1412 * @brief Exits the UART mute mode: wake up software.
<> 144:ef7eb2e8f9f7 1413 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1414 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1415 * @retval HAL status
<> 144:ef7eb2e8f9f7 1416 */
<> 144:ef7eb2e8f9f7 1417 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1418 {
<> 144:ef7eb2e8f9f7 1419 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1420 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1421
<> 144:ef7eb2e8f9f7 1422 /* Process Locked */
<> 144:ef7eb2e8f9f7 1423 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1424
<> 144:ef7eb2e8f9f7 1425 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1426
<> 144:ef7eb2e8f9f7 1427 /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
<> 144:ef7eb2e8f9f7 1428 CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
<> 144:ef7eb2e8f9f7 1429
<> 144:ef7eb2e8f9f7 1430 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1431
<> 144:ef7eb2e8f9f7 1432 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1433 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1434
<> 144:ef7eb2e8f9f7 1435 return HAL_OK;
<> 144:ef7eb2e8f9f7 1436 }
<> 144:ef7eb2e8f9f7 1437
<> 144:ef7eb2e8f9f7 1438 /**
<> 144:ef7eb2e8f9f7 1439 * @brief Enables the UART transmitter and disables the UART receiver.
<> 144:ef7eb2e8f9f7 1440 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1441 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1442 * @retval HAL status
<> 144:ef7eb2e8f9f7 1443 */
<> 144:ef7eb2e8f9f7 1444 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1445 {
<> 144:ef7eb2e8f9f7 1446 /* Process Locked */
<> 144:ef7eb2e8f9f7 1447 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1448
<> 144:ef7eb2e8f9f7 1449 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1450
<> 144:ef7eb2e8f9f7 1451 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1452 /* Clear TE and RE bits */
<> 144:ef7eb2e8f9f7 1453 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
<> 144:ef7eb2e8f9f7 1454 MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_TE | USART_CR1_RE), USART_CR1_TE);
<> 144:ef7eb2e8f9f7 1455
<> 144:ef7eb2e8f9f7 1456 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1457
<> 144:ef7eb2e8f9f7 1458 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1459 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1460
<> 144:ef7eb2e8f9f7 1461 return HAL_OK;
<> 144:ef7eb2e8f9f7 1462 }
<> 144:ef7eb2e8f9f7 1463
<> 144:ef7eb2e8f9f7 1464 /**
<> 144:ef7eb2e8f9f7 1465 * @brief Enables the UART receiver and disables the UART transmitter.
<> 144:ef7eb2e8f9f7 1466 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1467 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1468 * @retval HAL status
<> 144:ef7eb2e8f9f7 1469 */
<> 144:ef7eb2e8f9f7 1470 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1471 {
<> 144:ef7eb2e8f9f7 1472 /* Process Locked */
<> 144:ef7eb2e8f9f7 1473 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1474
<> 144:ef7eb2e8f9f7 1475 huart->State = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1476
<> 144:ef7eb2e8f9f7 1477 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1478 /* Clear TE and RE bits */
<> 144:ef7eb2e8f9f7 1479 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
<> 144:ef7eb2e8f9f7 1480 MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_TE | USART_CR1_RE), USART_CR1_RE);
<> 144:ef7eb2e8f9f7 1481
<> 144:ef7eb2e8f9f7 1482 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1483
<> 144:ef7eb2e8f9f7 1484 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1485 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1486
<> 144:ef7eb2e8f9f7 1487 return HAL_OK;
<> 144:ef7eb2e8f9f7 1488 }
<> 144:ef7eb2e8f9f7 1489
<> 144:ef7eb2e8f9f7 1490 /**
<> 144:ef7eb2e8f9f7 1491 * @}
<> 144:ef7eb2e8f9f7 1492 */
<> 144:ef7eb2e8f9f7 1493
<> 144:ef7eb2e8f9f7 1494 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 1495 * @brief UART State and Errors functions
<> 144:ef7eb2e8f9f7 1496 *
<> 144:ef7eb2e8f9f7 1497 @verbatim
<> 144:ef7eb2e8f9f7 1498 ==============================================================================
<> 144:ef7eb2e8f9f7 1499 ##### Peripheral State and Errors functions #####
<> 144:ef7eb2e8f9f7 1500 ==============================================================================
<> 144:ef7eb2e8f9f7 1501 [..]
<> 144:ef7eb2e8f9f7 1502 This subsection provides a set of functions allowing to return the State of
<> 144:ef7eb2e8f9f7 1503 UART communication process, return Peripheral Errors occurred during communication
<> 144:ef7eb2e8f9f7 1504 process
<> 144:ef7eb2e8f9f7 1505 (+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
<> 144:ef7eb2e8f9f7 1506 (+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
<> 144:ef7eb2e8f9f7 1507
<> 144:ef7eb2e8f9f7 1508 @endverbatim
<> 144:ef7eb2e8f9f7 1509 * @{
<> 144:ef7eb2e8f9f7 1510 */
<> 144:ef7eb2e8f9f7 1511
<> 144:ef7eb2e8f9f7 1512 /**
<> 144:ef7eb2e8f9f7 1513 * @brief Returns the UART state.
<> 144:ef7eb2e8f9f7 1514 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1515 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1516 * @retval HAL state
<> 144:ef7eb2e8f9f7 1517 */
<> 144:ef7eb2e8f9f7 1518 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1519 {
<> 144:ef7eb2e8f9f7 1520 return huart->State;
<> 144:ef7eb2e8f9f7 1521 }
<> 144:ef7eb2e8f9f7 1522
<> 144:ef7eb2e8f9f7 1523 /**
<> 144:ef7eb2e8f9f7 1524 * @brief Return the UART error code
<> 144:ef7eb2e8f9f7 1525 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1526 * the configuration information for the specified UART.
<> 144:ef7eb2e8f9f7 1527 * @retval UART Error Code
<> 144:ef7eb2e8f9f7 1528 */
<> 144:ef7eb2e8f9f7 1529 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1530 {
<> 144:ef7eb2e8f9f7 1531 return huart->ErrorCode;
<> 144:ef7eb2e8f9f7 1532 }
<> 144:ef7eb2e8f9f7 1533
<> 144:ef7eb2e8f9f7 1534 /**
<> 144:ef7eb2e8f9f7 1535 * @}
<> 144:ef7eb2e8f9f7 1536 */
<> 144:ef7eb2e8f9f7 1537
<> 144:ef7eb2e8f9f7 1538 /**
<> 144:ef7eb2e8f9f7 1539 * @}
<> 144:ef7eb2e8f9f7 1540 */
<> 144:ef7eb2e8f9f7 1541
<> 144:ef7eb2e8f9f7 1542 /** @defgroup UART_Private_Functions UART Private Functions
<> 144:ef7eb2e8f9f7 1543 * @brief UART Private functions
<> 144:ef7eb2e8f9f7 1544 * @{
<> 144:ef7eb2e8f9f7 1545 */
<> 144:ef7eb2e8f9f7 1546 /**
<> 144:ef7eb2e8f9f7 1547 * @brief DMA UART transmit process complete callback.
<> 144:ef7eb2e8f9f7 1548 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1549 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1550 * @retval None
<> 144:ef7eb2e8f9f7 1551 */
<> 144:ef7eb2e8f9f7 1552 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1553 {
<> 144:ef7eb2e8f9f7 1554 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1555 /* DMA Normal mode*/
<> 144:ef7eb2e8f9f7 1556 if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<> 144:ef7eb2e8f9f7 1557 {
<> 144:ef7eb2e8f9f7 1558 huart->TxXferCount = 0;
<> 144:ef7eb2e8f9f7 1559
<> 144:ef7eb2e8f9f7 1560 /* Disable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1561 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1562 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1563
<> 144:ef7eb2e8f9f7 1564 /* Enable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1565 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1566 }
<> 144:ef7eb2e8f9f7 1567 /* DMA Circular mode */
<> 144:ef7eb2e8f9f7 1568 else
<> 144:ef7eb2e8f9f7 1569 {
<> 144:ef7eb2e8f9f7 1570 HAL_UART_TxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1571 }
<> 144:ef7eb2e8f9f7 1572 }
<> 144:ef7eb2e8f9f7 1573
<> 144:ef7eb2e8f9f7 1574 /**
<> 144:ef7eb2e8f9f7 1575 * @brief DMA UART transmit process half complete callback
<> 144:ef7eb2e8f9f7 1576 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1577 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1578 * @retval None
<> 144:ef7eb2e8f9f7 1579 */
<> 144:ef7eb2e8f9f7 1580 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1581 {
<> 144:ef7eb2e8f9f7 1582 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1583
<> 144:ef7eb2e8f9f7 1584 HAL_UART_TxHalfCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1585 }
<> 144:ef7eb2e8f9f7 1586
<> 144:ef7eb2e8f9f7 1587 /**
<> 144:ef7eb2e8f9f7 1588 * @brief DMA UART receive process complete callback.
<> 144:ef7eb2e8f9f7 1589 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1590 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1591 * @retval None
<> 144:ef7eb2e8f9f7 1592 */
<> 144:ef7eb2e8f9f7 1593 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1594 {
<> 144:ef7eb2e8f9f7 1595 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1596 /* DMA Normal mode*/
<> 144:ef7eb2e8f9f7 1597 if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<> 144:ef7eb2e8f9f7 1598 {
<> 144:ef7eb2e8f9f7 1599 huart->RxXferCount = 0;
<> 144:ef7eb2e8f9f7 1600
<> 144:ef7eb2e8f9f7 1601 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1602 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1603 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1604
<> 144:ef7eb2e8f9f7 1605 /* Check if a transmit process is ongoing or not */
<> 144:ef7eb2e8f9f7 1606 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 1607 {
<> 144:ef7eb2e8f9f7 1608 huart->State = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 1609 }
<> 144:ef7eb2e8f9f7 1610 else
<> 144:ef7eb2e8f9f7 1611 {
<> 144:ef7eb2e8f9f7 1612 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1613 }
<> 144:ef7eb2e8f9f7 1614 }
<> 144:ef7eb2e8f9f7 1615 HAL_UART_RxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1616 }
<> 144:ef7eb2e8f9f7 1617
<> 144:ef7eb2e8f9f7 1618 /**
<> 144:ef7eb2e8f9f7 1619 * @brief DMA UART receive process half complete callback
<> 144:ef7eb2e8f9f7 1620 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1621 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1622 * @retval None
<> 144:ef7eb2e8f9f7 1623 */
<> 144:ef7eb2e8f9f7 1624 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1625 {
<> 144:ef7eb2e8f9f7 1626 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1627
<> 144:ef7eb2e8f9f7 1628 HAL_UART_RxHalfCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1629 }
<> 144:ef7eb2e8f9f7 1630
<> 144:ef7eb2e8f9f7 1631 /**
<> 144:ef7eb2e8f9f7 1632 * @brief DMA UART communication error callback.
<> 144:ef7eb2e8f9f7 1633 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1634 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1635 * @retval None
<> 144:ef7eb2e8f9f7 1636 */
<> 144:ef7eb2e8f9f7 1637 static void UART_DMAError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1638 {
<> 144:ef7eb2e8f9f7 1639 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1640 huart->RxXferCount = 0;
<> 144:ef7eb2e8f9f7 1641 huart->TxXferCount = 0;
<> 144:ef7eb2e8f9f7 1642 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1643 huart->ErrorCode |= HAL_UART_ERROR_DMA;
<> 144:ef7eb2e8f9f7 1644 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1645 }
<> 144:ef7eb2e8f9f7 1646
<> 144:ef7eb2e8f9f7 1647 /**
<> 144:ef7eb2e8f9f7 1648 * @brief This function handles UART Communication Timeout.
<> 144:ef7eb2e8f9f7 1649 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1650 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1651 * @param Flag: specifies the UART flag to check.
<> 144:ef7eb2e8f9f7 1652 * @param Status: The new Flag status (SET or RESET).
<> 144:ef7eb2e8f9f7 1653 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1654 * @retval HAL status
<> 144:ef7eb2e8f9f7 1655 */
<> 144:ef7eb2e8f9f7 1656 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1657 {
<> 144:ef7eb2e8f9f7 1658 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1659
<> 144:ef7eb2e8f9f7 1660 /* Get tick */
<> 144:ef7eb2e8f9f7 1661 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1662
<> 144:ef7eb2e8f9f7 1663 /* Wait until flag is set */
<> 144:ef7eb2e8f9f7 1664 if(Status == RESET)
<> 144:ef7eb2e8f9f7 1665 {
<> 144:ef7eb2e8f9f7 1666 while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
<> 144:ef7eb2e8f9f7 1667 {
<> 144:ef7eb2e8f9f7 1668 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1669 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1670 {
<> 144:ef7eb2e8f9f7 1671 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1672 {
<> 144:ef7eb2e8f9f7 1673 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 144:ef7eb2e8f9f7 1674 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1675 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1676 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1677 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 1678
<> 144:ef7eb2e8f9f7 1679 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1680
<> 144:ef7eb2e8f9f7 1681 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1682 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1683
<> 144:ef7eb2e8f9f7 1684 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1685 }
<> 144:ef7eb2e8f9f7 1686 }
<> 144:ef7eb2e8f9f7 1687 }
<> 144:ef7eb2e8f9f7 1688 }
<> 144:ef7eb2e8f9f7 1689 else
<> 144:ef7eb2e8f9f7 1690 {
<> 144:ef7eb2e8f9f7 1691 while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
<> 144:ef7eb2e8f9f7 1692 {
<> 144:ef7eb2e8f9f7 1693 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1694 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1695 {
<> 144:ef7eb2e8f9f7 1696 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1697 {
<> 144:ef7eb2e8f9f7 1698 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 144:ef7eb2e8f9f7 1699 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1700 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1701 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1702 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 1703
<> 144:ef7eb2e8f9f7 1704 huart->State= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1705
<> 144:ef7eb2e8f9f7 1706 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1707 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1708
<> 144:ef7eb2e8f9f7 1709 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1710 }
<> 144:ef7eb2e8f9f7 1711 }
<> 144:ef7eb2e8f9f7 1712 }
<> 144:ef7eb2e8f9f7 1713 }
<> 144:ef7eb2e8f9f7 1714 return HAL_OK;
<> 144:ef7eb2e8f9f7 1715 }
<> 144:ef7eb2e8f9f7 1716
<> 144:ef7eb2e8f9f7 1717 /**
<> 144:ef7eb2e8f9f7 1718 * @brief Sends an amount of data in non blocking mode.
<> 144:ef7eb2e8f9f7 1719 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1720 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1721 * @retval HAL status
<> 144:ef7eb2e8f9f7 1722 */
<> 144:ef7eb2e8f9f7 1723 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1724 {
<> 144:ef7eb2e8f9f7 1725 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1726 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 1727
<> 144:ef7eb2e8f9f7 1728 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 1729 if((tmp_state == HAL_UART_STATE_BUSY_TX) || (tmp_state == HAL_UART_STATE_BUSY_TX_RX))
<> 144:ef7eb2e8f9f7 1730 {
<> 144:ef7eb2e8f9f7 1731 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1732 {
<> 144:ef7eb2e8f9f7 1733 tmp = (uint16_t*) huart->pTxBuffPtr;
<> 144:ef7eb2e8f9f7 1734 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 1735 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1736 {
<> 144:ef7eb2e8f9f7 1737 huart->pTxBuffPtr += 2;
<> 144:ef7eb2e8f9f7 1738 }
<> 144:ef7eb2e8f9f7 1739 else
<> 144:ef7eb2e8f9f7 1740 {
<> 144:ef7eb2e8f9f7 1741 huart->pTxBuffPtr += 1;
<> 144:ef7eb2e8f9f7 1742 }
<> 144:ef7eb2e8f9f7 1743 }
<> 144:ef7eb2e8f9f7 1744 else
<> 144:ef7eb2e8f9f7 1745 {
<> 144:ef7eb2e8f9f7 1746 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 1747 }
<> 144:ef7eb2e8f9f7 1748
<> 144:ef7eb2e8f9f7 1749 if(--huart->TxXferCount == 0)
<> 144:ef7eb2e8f9f7 1750 {
<> 144:ef7eb2e8f9f7 1751 /* Disable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1752 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1753
<> 144:ef7eb2e8f9f7 1754 /* Enable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1755 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1756 }
<> 144:ef7eb2e8f9f7 1757 return HAL_OK;
<> 144:ef7eb2e8f9f7 1758 }
<> 144:ef7eb2e8f9f7 1759 else
<> 144:ef7eb2e8f9f7 1760 {
<> 144:ef7eb2e8f9f7 1761 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1762 }
<> 144:ef7eb2e8f9f7 1763 }
<> 144:ef7eb2e8f9f7 1764
<> 144:ef7eb2e8f9f7 1765
<> 144:ef7eb2e8f9f7 1766 /**
<> 144:ef7eb2e8f9f7 1767 * @brief Wraps up transmission in non blocking mode.
<> 144:ef7eb2e8f9f7 1768 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1769 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1770 * @retval HAL status
<> 144:ef7eb2e8f9f7 1771 */
<> 144:ef7eb2e8f9f7 1772 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1773 {
<> 144:ef7eb2e8f9f7 1774 /* Disable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1775 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1776
<> 144:ef7eb2e8f9f7 1777 /* Check if a receive process is ongoing or not */
<> 144:ef7eb2e8f9f7 1778 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 1779 {
<> 144:ef7eb2e8f9f7 1780 huart->State = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 1781 }
<> 144:ef7eb2e8f9f7 1782 else
<> 144:ef7eb2e8f9f7 1783 {
<> 144:ef7eb2e8f9f7 1784 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1785 }
<> 144:ef7eb2e8f9f7 1786
<> 144:ef7eb2e8f9f7 1787 HAL_UART_TxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1788
<> 144:ef7eb2e8f9f7 1789 return HAL_OK;
<> 144:ef7eb2e8f9f7 1790 }
<> 144:ef7eb2e8f9f7 1791
<> 144:ef7eb2e8f9f7 1792 /**
<> 144:ef7eb2e8f9f7 1793 * @brief Receives an amount of data in non blocking mode
<> 144:ef7eb2e8f9f7 1794 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1795 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1796 * @retval HAL status
<> 144:ef7eb2e8f9f7 1797 */
<> 144:ef7eb2e8f9f7 1798 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1799 {
<> 144:ef7eb2e8f9f7 1800 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1801 uint32_t tmp_state = 0;
<> 144:ef7eb2e8f9f7 1802
<> 144:ef7eb2e8f9f7 1803 tmp_state = huart->State;
<> 144:ef7eb2e8f9f7 1804 if((tmp_state == HAL_UART_STATE_BUSY_RX) || (tmp_state == HAL_UART_STATE_BUSY_TX_RX))
<> 144:ef7eb2e8f9f7 1805 {
<> 144:ef7eb2e8f9f7 1806 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1807 {
<> 144:ef7eb2e8f9f7 1808 tmp = (uint16_t*) huart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 1809 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1810 {
<> 144:ef7eb2e8f9f7 1811 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 1812 huart->pRxBuffPtr += 2;
<> 144:ef7eb2e8f9f7 1813 }
<> 144:ef7eb2e8f9f7 1814 else
<> 144:ef7eb2e8f9f7 1815 {
<> 144:ef7eb2e8f9f7 1816 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
<> 144:ef7eb2e8f9f7 1817 huart->pRxBuffPtr += 1;
<> 144:ef7eb2e8f9f7 1818 }
<> 144:ef7eb2e8f9f7 1819 }
<> 144:ef7eb2e8f9f7 1820 else
<> 144:ef7eb2e8f9f7 1821 {
<> 144:ef7eb2e8f9f7 1822 if(huart->Init.Parity == UART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1823 {
<> 144:ef7eb2e8f9f7 1824 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
<> 144:ef7eb2e8f9f7 1825 }
<> 144:ef7eb2e8f9f7 1826 else
<> 144:ef7eb2e8f9f7 1827 {
<> 144:ef7eb2e8f9f7 1828 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
<> 144:ef7eb2e8f9f7 1829 }
<> 144:ef7eb2e8f9f7 1830 }
<> 144:ef7eb2e8f9f7 1831
<> 144:ef7eb2e8f9f7 1832 if(--huart->RxXferCount == 0)
<> 144:ef7eb2e8f9f7 1833 {
<> 144:ef7eb2e8f9f7 1834 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1835
<> 144:ef7eb2e8f9f7 1836 /* Check if a transmit process is ongoing or not */
<> 144:ef7eb2e8f9f7 1837 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 1838 {
<> 144:ef7eb2e8f9f7 1839 huart->State = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 1840 }
<> 144:ef7eb2e8f9f7 1841 else
<> 144:ef7eb2e8f9f7 1842 {
<> 144:ef7eb2e8f9f7 1843 /* Disable the UART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1844 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1845
<> 144:ef7eb2e8f9f7 1846 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1847 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 1848
<> 144:ef7eb2e8f9f7 1849 huart->State = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1850 }
<> 144:ef7eb2e8f9f7 1851 HAL_UART_RxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1852
<> 144:ef7eb2e8f9f7 1853 return HAL_OK;
<> 144:ef7eb2e8f9f7 1854 }
<> 144:ef7eb2e8f9f7 1855 return HAL_OK;
<> 144:ef7eb2e8f9f7 1856 }
<> 144:ef7eb2e8f9f7 1857 else
<> 144:ef7eb2e8f9f7 1858 {
<> 144:ef7eb2e8f9f7 1859 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1860 }
<> 144:ef7eb2e8f9f7 1861 }
<> 144:ef7eb2e8f9f7 1862
<> 144:ef7eb2e8f9f7 1863 /**
<> 144:ef7eb2e8f9f7 1864 * @brief Configures the UART peripheral.
<> 144:ef7eb2e8f9f7 1865 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1866 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1867 * @retval None
<> 144:ef7eb2e8f9f7 1868 */
<> 144:ef7eb2e8f9f7 1869 static void UART_SetConfig(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1870 {
<> 144:ef7eb2e8f9f7 1871 uint32_t tmpreg = 0x00;
<> 144:ef7eb2e8f9f7 1872
<> 144:ef7eb2e8f9f7 1873 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1874 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1875 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
<> 144:ef7eb2e8f9f7 1876 assert_param(IS_UART_PARITY(huart->Init.Parity));
<> 144:ef7eb2e8f9f7 1877 assert_param(IS_UART_MODE(huart->Init.Mode));
<> 144:ef7eb2e8f9f7 1878
<> 144:ef7eb2e8f9f7 1879 /*------- UART-associated USART registers setting : CR2 Configuration ------*/
<> 144:ef7eb2e8f9f7 1880 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
<> 144:ef7eb2e8f9f7 1881 * to huart->Init.StopBits value */
<> 144:ef7eb2e8f9f7 1882 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
<> 144:ef7eb2e8f9f7 1883
<> 144:ef7eb2e8f9f7 1884 /*------- UART-associated USART registers setting : CR1 Configuration ------*/
<> 144:ef7eb2e8f9f7 1885 /* Configure the UART Word Length, Parity and mode:
<> 144:ef7eb2e8f9f7 1886 Set the M bits according to huart->Init.WordLength value
<> 144:ef7eb2e8f9f7 1887 Set PCE and PS bits according to huart->Init.Parity value
<> 144:ef7eb2e8f9f7 1888 Set TE and RE bits according to huart->Init.Mode value */
<> 144:ef7eb2e8f9f7 1889 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode ;
<> 144:ef7eb2e8f9f7 1890 MODIFY_REG(huart->Instance->CR1,
<> 144:ef7eb2e8f9f7 1891 (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
<> 144:ef7eb2e8f9f7 1892 tmpreg);
<> 144:ef7eb2e8f9f7 1893
<> 144:ef7eb2e8f9f7 1894 /*------- UART-associated USART registers setting : CR3 Configuration ------*/
<> 144:ef7eb2e8f9f7 1895 /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
<> 144:ef7eb2e8f9f7 1896 MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
<> 144:ef7eb2e8f9f7 1897
<> 144:ef7eb2e8f9f7 1898 /*------- UART-associated USART registers setting : BRR Configuration ------*/
<> 144:ef7eb2e8f9f7 1899 if((huart->Instance == USART1))
<> 144:ef7eb2e8f9f7 1900 {
<> 144:ef7eb2e8f9f7 1901 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 1902 }
<> 144:ef7eb2e8f9f7 1903 else
<> 144:ef7eb2e8f9f7 1904 {
<> 144:ef7eb2e8f9f7 1905 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 1906 }
<> 144:ef7eb2e8f9f7 1907 }
<> 144:ef7eb2e8f9f7 1908 /**
<> 144:ef7eb2e8f9f7 1909 * @}
<> 144:ef7eb2e8f9f7 1910 */
<> 144:ef7eb2e8f9f7 1911
<> 144:ef7eb2e8f9f7 1912 #endif /* HAL_UART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1913 /**
<> 144:ef7eb2e8f9f7 1914 * @}
<> 144:ef7eb2e8f9f7 1915 */
<> 144:ef7eb2e8f9f7 1916
<> 144:ef7eb2e8f9f7 1917 /**
<> 144:ef7eb2e8f9f7 1918 * @}
<> 144:ef7eb2e8f9f7 1919 */
<> 144:ef7eb2e8f9f7 1920
<> 144:ef7eb2e8f9f7 1921 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/