ADC_spike - ADC Spike2

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Simon Blandford / Mbed 2 deprecated ADC_spike

ADC Spike2

ADC_full/adc.cpp@1:0d866e3f26ab, 2010-03-09 (annotated)

Committer:: simonb
Date:: Tue Mar 09 16:41:55 2010 +0000
Revision:: 1:0d866e3f26ab
Parent:: 0:db49fab3bd78

Who changed what in which revision?

User	Revision	Line number	New contents of line
simonb	0:db49fab3bd78	1	/* mbed Library - ADC
simonb	0:db49fab3bd78	2	* Copyright (c) 2010, sblandford
simonb	0:db49fab3bd78	3	* released under MIT license http://mbed.org/licence/mit
simonb	0:db49fab3bd78	4	*/
simonb	0:db49fab3bd78	5	#include "mbed.h"
simonb	0:db49fab3bd78	6	#include "adc.h"
simonb	0:db49fab3bd78	7
simonb	0:db49fab3bd78	8
simonb	0:db49fab3bd78	9	ADC *ADC::instance;
simonb	0:db49fab3bd78	10
simonb	0:db49fab3bd78	11	ADC::ADC(int sample_rate, int cclk_div)
simonb	0:db49fab3bd78	12	{
simonb	0:db49fab3bd78	13
simonb	0:db49fab3bd78	14	int i, adc_clk_freq, pclk, clock_div, max_div=1;
simonb	0:db49fab3bd78	15
simonb	0:db49fab3bd78	16	//Work out CCLK
simonb	0:db49fab3bd78	17	adc_clk_freq=CLKS_PER_SAMPLE*sample_rate;
simonb	0:db49fab3bd78	18	int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
simonb	0:db49fab3bd78	19	int n = (LPC_SC->PLL0CFG >> 16) + 1;
simonb	0:db49fab3bd78	20	int cclkdiv = LPC_SC->CCLKCFG + 1;
simonb	0:db49fab3bd78	21	int Fcco = (2 * m * XTAL_FREQ) / n;
simonb	0:db49fab3bd78	22	int cclk = Fcco / cclkdiv;
simonb	0:db49fab3bd78	23
simonb	0:db49fab3bd78	24	//Power up the ADC
simonb	0:db49fab3bd78	25	LPC_SC->PCONP \|= (1 << 12);
simonb	0:db49fab3bd78	26	//Set clock at cclk / 1.
simonb	0:db49fab3bd78	27	LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
simonb	0:db49fab3bd78	28	switch (cclk_div) {
simonb	0:db49fab3bd78	29	case 1:
simonb	0:db49fab3bd78	30	LPC_SC->PCLKSEL0 \|= 0x1 << 24;
simonb	0:db49fab3bd78	31	break;
simonb	0:db49fab3bd78	32	case 2:
simonb	0:db49fab3bd78	33	LPC_SC->PCLKSEL0 \|= 0x2 << 24;
simonb	0:db49fab3bd78	34	break;
simonb	0:db49fab3bd78	35	case 4:
simonb	0:db49fab3bd78	36	LPC_SC->PCLKSEL0 \|= 0x0 << 24;
simonb	0:db49fab3bd78	37	break;
simonb	0:db49fab3bd78	38	case 8:
simonb	0:db49fab3bd78	39	LPC_SC->PCLKSEL0 \|= 0x3 << 24;
simonb	0:db49fab3bd78	40	break;
simonb	0:db49fab3bd78	41	default:
simonb	0:db49fab3bd78	42	fprintf(stderr, "Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n",
simonb	0:db49fab3bd78	43	cclk_div);
simonb	0:db49fab3bd78	44	fprintf(stderr, "Defaulting to 1.\n");
simonb	0:db49fab3bd78	45	LPC_SC->PCLKSEL0 \|= 0x1 << 24;
simonb	0:db49fab3bd78	46	break;
simonb	0:db49fab3bd78	47	}
simonb	0:db49fab3bd78	48	pclk = cclk / cclk_div;
simonb	0:db49fab3bd78	49	clock_div=pclk / adc_clk_freq;
simonb	0:db49fab3bd78	50
simonb	0:db49fab3bd78	51	if (clock_div > 0xFF) {
simonb	0:db49fab3bd78	52	fprintf(stderr, "Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n",
simonb	0:db49fab3bd78	53	clock_div);
simonb	0:db49fab3bd78	54	clock_div=0xFF;
simonb	0:db49fab3bd78	55	}
simonb	0:db49fab3bd78	56	if (clock_div == 0) {
simonb	0:db49fab3bd78	57	fprintf(stderr, "Warning: Clock division is 0. Re-Setting to 1.\n");
simonb	0:db49fab3bd78	58	clock_div=1;
simonb	0:db49fab3bd78	59	}
simonb	0:db49fab3bd78	60
simonb	0:db49fab3bd78	61	_adc_clk_freq=pclk / clock_div;
simonb	0:db49fab3bd78	62	if (_adc_clk_freq > MAX_ADC_CLOCK) {
simonb	0:db49fab3bd78	63	fprintf(stderr, "Warning: Actual ADC sample rate of %u which is above %u limit\n",
simonb	0:db49fab3bd78	64	_adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE);
simonb	0:db49fab3bd78	65	while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++;
simonb	0:db49fab3bd78	66	fprintf(stderr, "Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE);
simonb	0:db49fab3bd78	67	}
simonb	0:db49fab3bd78	68
simonb	0:db49fab3bd78	69	LPC_ADC->ADCR =
simonb	0:db49fab3bd78	70	((clock_div - 1 ) << 8 ) \| //Clkdiv
simonb	0:db49fab3bd78	71	( 1 << 21 ); //A/D operational
simonb	0:db49fab3bd78	72
simonb	0:db49fab3bd78	73	//Default no channels enabled
simonb	0:db49fab3bd78	74	LPC_ADC->ADCR &= ~0xFF;
simonb	0:db49fab3bd78	75	//Default NULL global custom isr
simonb	0:db49fab3bd78	76	_adc_g_isr = NULL;
simonb	0:db49fab3bd78	77	//Initialize arrays
simonb	0:db49fab3bd78	78	for (i=7; i>=0; i--) {
simonb	0:db49fab3bd78	79	_adc_data[i] = 0;
simonb	0:db49fab3bd78	80	_adc_isr[i] = NULL;
simonb	0:db49fab3bd78	81	}
simonb	0:db49fab3bd78	82
simonb	0:db49fab3bd78	83
simonb	0:db49fab3bd78	84	//* Attach IRQ
simonb	0:db49fab3bd78	85	instance = this;
simonb	0:db49fab3bd78	86	NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
simonb	0:db49fab3bd78	87
simonb	0:db49fab3bd78	88	//Disable global interrupt
simonb	0:db49fab3bd78	89	LPC_ADC->ADINTEN &= ~0x100;
simonb	0:db49fab3bd78	90
simonb	0:db49fab3bd78	91	};
simonb	0:db49fab3bd78	92
simonb	0:db49fab3bd78	93	void ADC::_adcisr(void)
simonb	0:db49fab3bd78	94	{
simonb	0:db49fab3bd78	95	instance->adcisr();
simonb	0:db49fab3bd78	96	}
simonb	0:db49fab3bd78	97
simonb	0:db49fab3bd78	98
simonb	0:db49fab3bd78	99	void ADC::adcisr(void)
simonb	0:db49fab3bd78	100	{
simonb	0:db49fab3bd78	101	uint32_t stat;
simonb	0:db49fab3bd78	102	int chan;
simonb	0:db49fab3bd78	103
simonb	0:db49fab3bd78	104	// Read status
simonb	0:db49fab3bd78	105	stat = LPC_ADC->ADSTAT;
simonb	0:db49fab3bd78	106	//Scan channels for over-run or done and update array
simonb	0:db49fab3bd78	107	if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0;
simonb	0:db49fab3bd78	108	if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1;
simonb	0:db49fab3bd78	109	if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2;
simonb	0:db49fab3bd78	110	if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3;
simonb	0:db49fab3bd78	111	if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4;
simonb	0:db49fab3bd78	112	if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5;
simonb	0:db49fab3bd78	113	if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6;
simonb	0:db49fab3bd78	114	if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7;
simonb	0:db49fab3bd78	115
simonb	0:db49fab3bd78	116	// Channel that triggered interrupt
simonb	0:db49fab3bd78	117	chan = (LPC_ADC->ADGDR >> 24) & 0x07;
simonb	0:db49fab3bd78	118	//User defined interrupt handlers
simonb	0:db49fab3bd78	119	if (_adc_isr[chan] != NULL)
simonb	0:db49fab3bd78	120	_adc_isr[chan](_adc_data[chan]);
simonb	0:db49fab3bd78	121	if (_adc_g_isr != NULL)
simonb	0:db49fab3bd78	122	_adc_g_isr(chan, _adc_data[chan]);
simonb	0:db49fab3bd78	123	return;
simonb	0:db49fab3bd78	124	}
simonb	0:db49fab3bd78	125
simonb	0:db49fab3bd78	126	int ADC::_pin_to_channel(PinName pin) {
simonb	0:db49fab3bd78	127	int chan;
simonb	0:db49fab3bd78	128	switch (pin) {
simonb	0:db49fab3bd78	129	case p15://=p0.23 of LPC1768
simonb	0:db49fab3bd78	130	default:
simonb	0:db49fab3bd78	131	chan=0;
simonb	0:db49fab3bd78	132	break;
simonb	0:db49fab3bd78	133	case p16://=p0.24 of LPC1768
simonb	0:db49fab3bd78	134	chan=1;
simonb	0:db49fab3bd78	135	break;
simonb	0:db49fab3bd78	136	case p17://=p0.25 of LPC1768
simonb	0:db49fab3bd78	137	chan=2;
simonb	0:db49fab3bd78	138	break;
simonb	0:db49fab3bd78	139	case p18://=p0.26 of LPC1768
simonb	0:db49fab3bd78	140	chan=3;
simonb	0:db49fab3bd78	141	break;
simonb	0:db49fab3bd78	142	case p19://=p1.30 of LPC1768
simonb	0:db49fab3bd78	143	chan=4;
simonb	0:db49fab3bd78	144	break;
simonb	0:db49fab3bd78	145	case p20://=p1.31 of LPC1768
simonb	0:db49fab3bd78	146	chan=5;
simonb	0:db49fab3bd78	147	break;
simonb	0:db49fab3bd78	148	}
simonb	0:db49fab3bd78	149	return(chan);
simonb	0:db49fab3bd78	150	}
simonb	0:db49fab3bd78	151
simonb	0:db49fab3bd78	152	PinName ADC::channel_to_pin(int chan) {
simonb	0:db49fab3bd78	153	const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15};
simonb	0:db49fab3bd78	154
simonb	0:db49fab3bd78	155	if ((chan < 0) \|\| (chan > 5))
simonb	0:db49fab3bd78	156	fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
simonb	0:db49fab3bd78	157	return(pin[chan & 0x07]);
simonb	0:db49fab3bd78	158	}
simonb	0:db49fab3bd78	159
simonb	0:db49fab3bd78	160
simonb	0:db49fab3bd78	161	int ADC::channel_to_pin_number(int chan) {
simonb	0:db49fab3bd78	162	const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0};
simonb	0:db49fab3bd78	163
simonb	0:db49fab3bd78	164	if ((chan < 0) \|\| (chan > 5))
simonb	0:db49fab3bd78	165	fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
simonb	0:db49fab3bd78	166	return(pin[chan & 0x07]);
simonb	0:db49fab3bd78	167	}
simonb	0:db49fab3bd78	168
simonb	0:db49fab3bd78	169
simonb	0:db49fab3bd78	170	uint32_t ADC::_data_of_pin(PinName pin) {
simonb	0:db49fab3bd78	171	//If in burst mode and at least one interrupt enabled then
simonb	0:db49fab3bd78	172	//take all values from _adc_data
simonb	0:db49fab3bd78	173	if (burst() && (LPC_ADC->ADINTEN & 0x3F)) {
simonb	0:db49fab3bd78	174	return(_adc_data[_pin_to_channel(pin)]);
simonb	0:db49fab3bd78	175	} else {
simonb	0:db49fab3bd78	176	//Return current register value or last value from interrupt
simonb	0:db49fab3bd78	177	switch (pin) {
simonb	0:db49fab3bd78	178	case p15://=p0.23 of LPC1768
simonb	0:db49fab3bd78	179	default:
simonb	0:db49fab3bd78	180	return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0);
simonb	0:db49fab3bd78	181	case p16://=p0.24 of LPC1768
simonb	0:db49fab3bd78	182	return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1);
simonb	0:db49fab3bd78	183	case p17://=p0.25 of LPC1768
simonb	0:db49fab3bd78	184	return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2);
simonb	0:db49fab3bd78	185	case p18://=p0.26 of LPC1768:
simonb	0:db49fab3bd78	186	return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3);
simonb	0:db49fab3bd78	187	case p19://=p1.30 of LPC1768
simonb	0:db49fab3bd78	188	return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4);
simonb	0:db49fab3bd78	189	case p20://=p1.31 of LPC1768
simonb	0:db49fab3bd78	190	return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5);
simonb	0:db49fab3bd78	191	}
simonb	0:db49fab3bd78	192	}
simonb	0:db49fab3bd78	193	}
simonb	0:db49fab3bd78	194
simonb	0:db49fab3bd78	195	//Enable or disable an ADC pin
simonb	0:db49fab3bd78	196	void ADC::setup(PinName pin, int state) {
simonb	0:db49fab3bd78	197	int chan;
simonb	0:db49fab3bd78	198	chan=_pin_to_channel(pin);
simonb	0:db49fab3bd78	199	if ((state & 1) == 1) {
simonb	0:db49fab3bd78	200	switch(pin) {
simonb	0:db49fab3bd78	201	case p15://=p0.23 of LPC1768
simonb	0:db49fab3bd78	202	default:
simonb	0:db49fab3bd78	203	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
simonb	0:db49fab3bd78	204	LPC_PINCON->PINSEL1 \|= (unsigned int)0x1 << 14;
simonb	0:db49fab3bd78	205	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
simonb	0:db49fab3bd78	206	LPC_PINCON->PINMODE1 \|= (unsigned int)0x2 << 14;
simonb	0:db49fab3bd78	207	break;
simonb	0:db49fab3bd78	208	case p16://=p0.24 of LPC1768
simonb	0:db49fab3bd78	209	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
simonb	0:db49fab3bd78	210	LPC_PINCON->PINSEL1 \|= (unsigned int)0x1 << 16;
simonb	0:db49fab3bd78	211	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
simonb	0:db49fab3bd78	212	LPC_PINCON->PINMODE1 \|= (unsigned int)0x2 << 16;
simonb	0:db49fab3bd78	213	break;
simonb	0:db49fab3bd78	214	case p17://=p0.25 of LPC1768
simonb	0:db49fab3bd78	215	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
simonb	0:db49fab3bd78	216	LPC_PINCON->PINSEL1 \|= (unsigned int)0x1 << 18;
simonb	0:db49fab3bd78	217	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
simonb	0:db49fab3bd78	218	LPC_PINCON->PINMODE1 \|= (unsigned int)0x2 << 18;
simonb	0:db49fab3bd78	219	break;
simonb	0:db49fab3bd78	220	case p18://=p0.26 of LPC1768:
simonb	0:db49fab3bd78	221	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
simonb	0:db49fab3bd78	222	LPC_PINCON->PINSEL1 \|= (unsigned int)0x1 << 20;
simonb	0:db49fab3bd78	223	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
simonb	0:db49fab3bd78	224	LPC_PINCON->PINMODE1 \|= (unsigned int)0x2 << 20;
simonb	0:db49fab3bd78	225	break;
simonb	0:db49fab3bd78	226	case p19://=p1.30 of LPC1768
simonb	0:db49fab3bd78	227	LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
simonb	0:db49fab3bd78	228	LPC_PINCON->PINSEL3 \|= (unsigned int)0x3 << 28;
simonb	0:db49fab3bd78	229	LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
simonb	0:db49fab3bd78	230	LPC_PINCON->PINMODE3 \|= (unsigned int)0x2 << 28;
simonb	0:db49fab3bd78	231	break;
simonb	0:db49fab3bd78	232	case p20://=p1.31 of LPC1768
simonb	0:db49fab3bd78	233	LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
simonb	0:db49fab3bd78	234	LPC_PINCON->PINSEL3 \|= (unsigned int)0x3 << 30;
simonb	0:db49fab3bd78	235	LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
simonb	0:db49fab3bd78	236	LPC_PINCON->PINMODE3 \|= (unsigned int)0x2 << 30;
simonb	0:db49fab3bd78	237	break;
simonb	0:db49fab3bd78	238	}
simonb	0:db49fab3bd78	239	//Only one channel can be selected at a time if not in burst mode
simonb	0:db49fab3bd78	240	if (!burst()) LPC_ADC->ADCR &= ~0xFF;
simonb	0:db49fab3bd78	241	//Select channel
simonb	0:db49fab3bd78	242	LPC_ADC->ADCR \|= (1 << chan);
simonb	0:db49fab3bd78	243	}
simonb	0:db49fab3bd78	244	else {
simonb	0:db49fab3bd78	245	switch(pin) {
simonb	0:db49fab3bd78	246	case p15://=p0.23 of LPC1768
simonb	0:db49fab3bd78	247	default:
simonb	0:db49fab3bd78	248	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
simonb	0:db49fab3bd78	249	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
simonb	0:db49fab3bd78	250	break;
simonb	0:db49fab3bd78	251	case p16://=p0.24 of LPC1768
simonb	0:db49fab3bd78	252	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
simonb	0:db49fab3bd78	253	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
simonb	0:db49fab3bd78	254	break;
simonb	0:db49fab3bd78	255	case p17://=p0.25 of LPC1768
simonb	0:db49fab3bd78	256	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
simonb	0:db49fab3bd78	257	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
simonb	0:db49fab3bd78	258	break;
simonb	0:db49fab3bd78	259	case p18://=p0.26 of LPC1768:
simonb	0:db49fab3bd78	260	LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
simonb	0:db49fab3bd78	261	LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
simonb	0:db49fab3bd78	262	break;
simonb	0:db49fab3bd78	263	case p19://=p1.30 of LPC1768
simonb	0:db49fab3bd78	264	LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
simonb	0:db49fab3bd78	265	LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
simonb	0:db49fab3bd78	266	break;
simonb	0:db49fab3bd78	267	case p20://=p1.31 of LPC1768
simonb	0:db49fab3bd78	268	LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
simonb	0:db49fab3bd78	269	LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
simonb	0:db49fab3bd78	270	break;
simonb	0:db49fab3bd78	271	}
simonb	0:db49fab3bd78	272	LPC_ADC->ADCR &= ~(1 << chan);
simonb	0:db49fab3bd78	273	}
simonb	0:db49fab3bd78	274	}
simonb	0:db49fab3bd78	275	//Return channel enabled/disabled state
simonb	0:db49fab3bd78	276	int ADC::setup(PinName pin) {
simonb	0:db49fab3bd78	277	int chan;
simonb	0:db49fab3bd78	278
simonb	0:db49fab3bd78	279	chan = _pin_to_channel(pin);
simonb	0:db49fab3bd78	280	return((LPC_ADC->ADCR & (1 << chan)) >> chan);
simonb	0:db49fab3bd78	281	}
simonb	0:db49fab3bd78	282
simonb	0:db49fab3bd78	283	//Select channel already setup
simonb	0:db49fab3bd78	284	void ADC::select(PinName pin) {
simonb	0:db49fab3bd78	285	int chan;
simonb	0:db49fab3bd78	286
simonb	0:db49fab3bd78	287	//Only one channel can be selected at a time if not in burst mode
simonb	0:db49fab3bd78	288	if (!burst()) LPC_ADC->ADCR &= ~0xFF;
simonb	0:db49fab3bd78	289	//Select channel
simonb	0:db49fab3bd78	290	chan = _pin_to_channel(pin);
simonb	0:db49fab3bd78	291	LPC_ADC->ADCR \|= (1 << chan);
simonb	0:db49fab3bd78	292	}
simonb	0:db49fab3bd78	293
simonb	0:db49fab3bd78	294	//Enable or disable burst mode
simonb	0:db49fab3bd78	295	void ADC::burst(int state) {
simonb	0:db49fab3bd78	296	if ((state & 1) == 1) {
simonb	0:db49fab3bd78	297	if (startmode(0) != 0)
simonb	0:db49fab3bd78	298	fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0));
simonb	0:db49fab3bd78	299	LPC_ADC->ADCR \|= (1 << 16);
simonb	0:db49fab3bd78	300	}
simonb	0:db49fab3bd78	301	else
simonb	0:db49fab3bd78	302	LPC_ADC->ADCR &= ~(1 << 16);
simonb	0:db49fab3bd78	303	}
simonb	0:db49fab3bd78	304	//Return burst mode state
simonb	0:db49fab3bd78	305	int ADC::burst(void) {
simonb	0:db49fab3bd78	306	return((LPC_ADC->ADCR & (1 << 16)) >> 16);
simonb	0:db49fab3bd78	307	}
simonb	0:db49fab3bd78	308
simonb	0:db49fab3bd78	309	//Set startmode and edge
simonb	0:db49fab3bd78	310	void ADC::startmode(int mode, int edge) {
simonb	0:db49fab3bd78	311	int lpc_adc_temp;
simonb	0:db49fab3bd78	312
simonb	0:db49fab3bd78	313	//Reset start mode and edge bit,
simonb	0:db49fab3bd78	314	lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24);
simonb	0:db49fab3bd78	315	//Write with new values
simonb	0:db49fab3bd78	316	lpc_adc_temp \|= ((mode & 7) << 24) \| ((edge & 1) << 27);
simonb	0:db49fab3bd78	317	LPC_ADC->ADCR = lpc_adc_temp;
simonb	0:db49fab3bd78	318	}
simonb	0:db49fab3bd78	319
simonb	0:db49fab3bd78	320	//Return startmode state according to mode_edge=0: mode and mode_edge=1: edge
simonb	0:db49fab3bd78	321	int ADC::startmode(int mode_edge){
simonb	0:db49fab3bd78	322	switch (mode_edge) {
simonb	0:db49fab3bd78	323	case 0:
simonb	0:db49fab3bd78	324	default:
simonb	0:db49fab3bd78	325	return((LPC_ADC->ADCR >> 24) & 0x07);
simonb	0:db49fab3bd78	326	case 1:
simonb	0:db49fab3bd78	327	return((LPC_ADC->ADCR >> 27) & 0x01);
simonb	0:db49fab3bd78	328	}
simonb	0:db49fab3bd78	329	}
simonb	0:db49fab3bd78	330
simonb	0:db49fab3bd78	331	//Start ADC conversion
simonb	0:db49fab3bd78	332	void ADC::start(void) {
simonb	0:db49fab3bd78	333	startmode(1,0);
simonb	0:db49fab3bd78	334	}
simonb	0:db49fab3bd78	335
simonb	0:db49fab3bd78	336
simonb	0:db49fab3bd78	337	//Set interrupt enable/disable for pin to state
simonb	0:db49fab3bd78	338	void ADC::interrupt_state(PinName pin, int state) {
simonb	0:db49fab3bd78	339	int chan;
simonb	0:db49fab3bd78	340
simonb	0:db49fab3bd78	341	chan = _pin_to_channel(pin);
simonb	0:db49fab3bd78	342	if (state == 1) {
simonb	0:db49fab3bd78	343	LPC_ADC->ADINTEN &= ~0x100;
simonb	0:db49fab3bd78	344	LPC_ADC->ADINTEN \|= 1 << chan;
simonb	0:db49fab3bd78	345	/* Enable the ADC Interrupt */
simonb	0:db49fab3bd78	346	NVIC_EnableIRQ(ADC_IRQn);
simonb	0:db49fab3bd78	347	} else {
simonb	0:db49fab3bd78	348	LPC_ADC->ADINTEN &= ~( 1 << chan );
simonb	0:db49fab3bd78	349	//Disable interrrupt if no active pins left
simonb	0:db49fab3bd78	350	if ((LPC_ADC->ADINTEN & 0xFF) == 0)
simonb	0:db49fab3bd78	351	NVIC_DisableIRQ(ADC_IRQn);
simonb	0:db49fab3bd78	352	}
simonb	0:db49fab3bd78	353	}
simonb	0:db49fab3bd78	354
simonb	0:db49fab3bd78	355	//Return enable/disable state of interrupt for pin
simonb	0:db49fab3bd78	356	int ADC::interrupt_state(PinName pin) {
simonb	0:db49fab3bd78	357	int chan;
simonb	0:db49fab3bd78	358
simonb	0:db49fab3bd78	359	chan = _pin_to_channel(pin);
simonb	0:db49fab3bd78	360	return((LPC_ADC->ADINTEN >> chan) & 0x01);
simonb	0:db49fab3bd78	361	}
simonb	0:db49fab3bd78	362
simonb	0:db49fab3bd78	363
simonb	0:db49fab3bd78	364	//Attach custom interrupt handler replacing default
simonb	0:db49fab3bd78	365	void ADC::attach(void(*fptr)(void)) {
simonb	0:db49fab3bd78	366	//* Attach IRQ
simonb	0:db49fab3bd78	367	NVIC_SetVector(ADC_IRQn, (uint32_t)fptr);
simonb	0:db49fab3bd78	368	}
simonb	0:db49fab3bd78	369
simonb	0:db49fab3bd78	370	//Restore default interrupt handler
simonb	0:db49fab3bd78	371	void ADC::detach(void) {
simonb	0:db49fab3bd78	372	//* Attach IRQ
simonb	0:db49fab3bd78	373	instance = this;
simonb	0:db49fab3bd78	374	NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
simonb	0:db49fab3bd78	375	}
simonb	0:db49fab3bd78	376
simonb	0:db49fab3bd78	377
simonb	0:db49fab3bd78	378	//Append interrupt handler for pin to function isr
simonb	0:db49fab3bd78	379	void ADC::append(PinName pin, void(*fptr)(uint32_t value)) {
simonb	0:db49fab3bd78	380	int chan;
simonb	0:db49fab3bd78	381
simonb	0:db49fab3bd78	382	chan = _pin_to_channel(pin);
simonb	0:db49fab3bd78	383	_adc_isr[chan] = fptr;
simonb	0:db49fab3bd78	384	}
simonb	0:db49fab3bd78	385
simonb	0:db49fab3bd78	386	//Append interrupt handler for pin to function isr
simonb	0:db49fab3bd78	387	void ADC::unappend(PinName pin) {
simonb	0:db49fab3bd78	388	int chan;
simonb	0:db49fab3bd78	389
simonb	0:db49fab3bd78	390	chan = _pin_to_channel(pin);
simonb	0:db49fab3bd78	391	_adc_isr[chan] = NULL;
simonb	0:db49fab3bd78	392	}
simonb	0:db49fab3bd78	393
simonb	0:db49fab3bd78	394	//Unappend global interrupt handler to function isr
simonb	0:db49fab3bd78	395	void ADC::append(void(*fptr)(int chan, uint32_t value)) {
simonb	0:db49fab3bd78	396	_adc_g_isr = fptr;
simonb	0:db49fab3bd78	397	}
simonb	0:db49fab3bd78	398
simonb	0:db49fab3bd78	399	//Detach global interrupt handler to function isr
simonb	0:db49fab3bd78	400	void ADC::unappend() {
simonb	0:db49fab3bd78	401	_adc_g_isr = NULL;
simonb	0:db49fab3bd78	402	}
simonb	0:db49fab3bd78	403
simonb	0:db49fab3bd78	404	//Set ADC offset
simonb	0:db49fab3bd78	405	void offset(int offset) {
simonb	0:db49fab3bd78	406	LPC_ADC->ADTRM &= ~(0x07 << 4);
simonb	0:db49fab3bd78	407	LPC_ADC->ADTRM \|= (offset & 0x07) << 4;
simonb	0:db49fab3bd78	408	}
simonb	0:db49fab3bd78	409
simonb	0:db49fab3bd78	410	//Return current ADC offset
simonb	0:db49fab3bd78	411	int offset(void) {
simonb	0:db49fab3bd78	412	return((LPC_ADC->ADTRM >> 4) & 0x07);
simonb	0:db49fab3bd78	413	}
simonb	0:db49fab3bd78	414
simonb	0:db49fab3bd78	415	//Return value of ADC on pin
simonb	0:db49fab3bd78	416	int ADC::read(PinName pin) {
simonb	0:db49fab3bd78	417	//Reset DONE and OVERRUN flags of interrupt handled ADC data
simonb	0:db49fab3bd78	418	_adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) \| ((uint32_t)0x01 << 30));
simonb	0:db49fab3bd78	419	//Return value
simonb	0:db49fab3bd78	420	return((_data_of_pin(pin) >> 4) & 0xFFF);
simonb	0:db49fab3bd78	421	}
simonb	0:db49fab3bd78	422
simonb	0:db49fab3bd78	423	//Return DONE flag of ADC on pin
simonb	0:db49fab3bd78	424	int ADC::done(PinName pin) {
simonb	0:db49fab3bd78	425	return((_data_of_pin(pin) >> 31) & 0x01);
simonb	0:db49fab3bd78	426	}
simonb	0:db49fab3bd78	427
simonb	0:db49fab3bd78	428	//Return OVERRUN flag of ADC on pin
simonb	0:db49fab3bd78	429	int ADC::overrun(PinName pin) {
simonb	0:db49fab3bd78	430	return((_data_of_pin(pin) >> 30) & 0x01);
simonb	0:db49fab3bd78	431	}
simonb	0:db49fab3bd78	432
simonb	0:db49fab3bd78	433	int ADC::actual_adc_clock(void) {
simonb	0:db49fab3bd78	434	return(_adc_clk_freq);
simonb	0:db49fab3bd78	435	}
simonb	0:db49fab3bd78	436
simonb	0:db49fab3bd78	437	int ADC::actual_sample_rate(void) {
simonb	0:db49fab3bd78	438	return(_adc_clk_freq / CLKS_PER_SAMPLE);
simonb	0:db49fab3bd78	439	}

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	09 Mar 2010
Imports:	35
Forks:	0
Commits:	2
Dependents:	0
Dependencies:	1
Followers:	3

ADC_full/adc.cpp@1:0d866e3f26ab, 2010-03-09 (annotated)

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