Diff: unzen_hal.cpp

Revision:

15:0db847496bb9

Parent:

14:bdf11487a94b

--- a/unzen_hal.cpp	Sun May 15 07:00:34 2016 +0000
+++ b/unzen_hal.cpp	Fri Jun 10 23:45:20 2016 +0000
@@ -193,24 +193,24 @@
          // The returned value must be compatible with CMSIS NVIC_SetPriority() API. That mean, it is integer like 0, 1, 2...
     unsigned int hal_get_i2s_irq_priority_level(void)
     {
-           // LPC4300 has 3 bits priority field. So, heighest is 0, lowest is 7.
+           // LPC4300 has 3 bits priority field. So, heighest is 0, lowest is 31.
            // But CMSIS NVIC_SetPriority() inverse the priority of the interupt ( F**k! )
-           // So, 7 is heighest, 0 is lowerest in CMSIS.
-           // setting 6 as i2s irq priority allows, some other interrupts are higher 
+           // So, 31 is heighest, 0 is lowerest in CMSIS.
+           // setting 24 as i2s irq priority allows, some other interrupts are higher 
            // and some others are lower than i2s irq priority.
-        return 6;
+        return 24;
     }
 
 
         // The returned value must be compatible with CMSIS NVIC_SetPriority() API. That mean, it is integer like 0, 1, 2...
     unsigned int hal_get_process_irq_priority_level(void)
     {
-           // LPC4300 has 3 bits priority field. So, heighest is 0, lowest is 7.
+           // LPC4300 has 5 bits priority field. So, heighest is 0, lowest is 31.
            // But CMSIS NVIC_SetPriority() inverse the priority of the interupt ( S**t! )
-           // So, 7 is heighest, 0 is lowerest in CMSIS.
-           // setting 1 as process priority allows, some other interrupts are higher 
+           // So, 31 is heighest, 0 is lowerest in CMSIS.
+           // setting 8 as process priority allows, some other interrupts are higher 
            // and some other interrupts are lower then process priority.
-        return 1;   
+        return 8;   
     }
  
         // LPC4337 transferes 2 workd ( left and right ) for each interrupt.