seiichi horie / unzen_quickstart_lpc4088

First Publish. Works fine.

Dependents:   unzen_sample_LPC4088_quickstart

unzen_hal.cpp@1:9710fb328a08, 2016-04-12 (annotated)

Committer:
shorie
Date:
Tue Apr 12 05:51:45 2016 +0000
Revision:
1:9710fb328a08
Parent:
0:5ac19c994288
Child:
2:6613e62da521
added umb-adau1361 support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shorie 0:5ac19c994288 1 #include "unzen_hal.h"
shorie 0:5ac19c994288 2
shorie 0:5ac19c994288 3 namespace unzen
shorie 0:5ac19c994288 4 {
shorie 0:5ac19c994288 5 // Set up I2S peripheral to ready to start.
shorie 0:5ac19c994288 6 // By this HAL, the I2S have to become :
shorie 0:5ac19c994288 7 // - slave mode
shorie 0:5ac19c994288 8 // - clock must be ready
shorie 0:5ac19c994288 9 // - pins must be configured.
shorie 0:5ac19c994288 10 // - Interrupt enable.
shorie 0:5ac19c994288 11 void hal_i2s_setup()
shorie 0:5ac19c994288 12 {
shorie 0:5ac19c994288 13 // Assert DAI reset
shorie 0:5ac19c994288 14 LPC_I2S0->DAO |= 1 << 4; // I2S_DAI_RESET;
shorie 0:5ac19c994288 15 LPC_I2S0->DAI |= 1 << 4; // I2S_DAI_RESET;
shorie 0:5ac19c994288 16 // Deassert DAI reset
shorie 0:5ac19c994288 17 LPC_I2S0->DAO &= ~ ( 1<<4 ); // I2S_DAI_RESET;
shorie 0:5ac19c994288 18 LPC_I2S0->DAI &= ~ ( 1<<4 ); // I2S_DAI_RESET;
shorie 0:5ac19c994288 19 // Assert DAI stop
shorie 0:5ac19c994288 20 LPC_I2S0->DAO |= 1 << 3; // I2S_DAI_STOP;
shorie 0:5ac19c994288 21 LPC_I2S0->DAI |= 1 << 3; // I2S_DAI_STOP;
shorie 0:5ac19c994288 22
shorie 0:5ac19c994288 23 // Kill all DMA
shorie 0:5ac19c994288 24 LPC_I2S0->DMA2 = 0;
shorie 0:5ac19c994288 25 LPC_I2S0->DMA1 = 0;
shorie 0:5ac19c994288 26 // Kill all IRQ
shorie 0:5ac19c994288 27 LPC_I2S0->IRQ = 0;
shorie 0:5ac19c994288 28 // Kill all clocks
shorie 0:5ac19c994288 29 LPC_I2S0->RXRATE = 0;
shorie 0:5ac19c994288 30 LPC_I2S0->TXRATE = 0;
shorie 0:5ac19c994288 31 // Bit rate must be 0 for slave mode.
shorie 0:5ac19c994288 32 LPC_I2S0->RXBITRATE = 0;
shorie 0:5ac19c994288 33 LPC_I2S0->TXBITRATE = 0;
shorie 0:5ac19c994288 34 // Clear mode setting
shorie 0:5ac19c994288 35 LPC_I2S0->TXMODE = 0;
shorie 0:5ac19c994288 36 LPC_I2S0->RXMODE = 0;
shorie 0:5ac19c994288 37
shorie 0:5ac19c994288 38
shorie 0:5ac19c994288 39 // Configure DA0
shorie 0:5ac19c994288 40 LPC_I2S0->DAO =
shorie 0:5ac19c994288 41 3 << 0 | // word width, 3:32bit mode
shorie 0:5ac19c994288 42 0 << 2 | // Mono, 1:mono, 0:stereo
shorie 0:5ac19c994288 43 1 << 3 | // STOP, 1:stop
shorie 0:5ac19c994288 44 0 << 4 | // RESET, 1:reset
shorie 0:5ac19c994288 45 1 << 5 | // WSEL, 1:Slave, 0:Master
shorie 0:5ac19c994288 46 1 << 6 ; // MUTE, 1:mute, 0:normal
shorie 0:5ac19c994288 47
shorie 0:5ac19c994288 48 // Configure DAI
shorie 0:5ac19c994288 49 LPC_I2S0->DAI =
shorie 0:5ac19c994288 50 3 << 0 | // word width, 3:32bit mode
shorie 0:5ac19c994288 51 0 << 2 | // Mono, 1:mono, 0:stereo
shorie 0:5ac19c994288 52 1 << 3 | // STOP, 1:stop
shorie 0:5ac19c994288 53 0 << 4 | // RESET, 1:reset
shorie 0:5ac19c994288 54 1 << 5 | // WSEL, 1:Slave, 0:Master
shorie 0:5ac19c994288 55 31 << 6; // WS halfperiod. Not sure what I shoud do when the slave mode.
shorie 0:5ac19c994288 56
shorie 0:5ac19c994288 57 // Configure IRQ At this moment, IRQ is disabled.
shorie 0:5ac19c994288 58 LPC_I2S0->IRQ =
shorie 0:5ac19c994288 59 0 << 0 | // RX IRQ Enable, 1:Enable, 0:Disable
shorie 0:5ac19c994288 60 0 << 1 | // TX IRQ Enable, 1:Enable, 0:Disable
shorie 0:5ac19c994288 61 2 << 8 | // RX DEPTH IRQ length for triggering interrupt
shorie 0:5ac19c994288 62 0 << 16 ; // TX DEPTH IRQ length for triggering interrupt
shorie 0:5ac19c994288 63
shorie 0:5ac19c994288 64 // Set RX module as slave operation to the external signal
shorie 0:5ac19c994288 65 LPC_I2S0->RXMODE =
shorie 0:5ac19c994288 66 0 << 0 | // RXCLKSEL, 0:SCLK input. The reference manual says this is fractional devider, but in slave mode, it is SCLK.
shorie 0:5ac19c994288 67 0 << 2 | // RX4PIN, 1:4pin mode, 0:Clock by RX block itself
shorie 0:5ac19c994288 68 0 << 3 ; // RXMCENA, 1:Master clock output, 0:No output
shorie 0:5ac19c994288 69
shorie 0:5ac19c994288 70 // SEt TX module as slave operation to the RX module (4PIN mode )
shorie 0:5ac19c994288 71 LPC_I2S0->RXMODE =
shorie 0:5ac19c994288 72 0 << 0 | // TXCLKSEL, 0:SCLK input. Ignored by 4 pin mode.
shorie 0:5ac19c994288 73 1 << 2 | // TX4PIN, 1:4pin mode, 0:Clock by TX block itself
shorie 0:5ac19c994288 74 0 << 3 ; // TXMCENA, 1:Master clock output, 0:No output
shorie 0:5ac19c994288 75
shorie 0:5ac19c994288 76
shorie 0:5ac19c994288 77 // Fill up tx FIO by 3 samples.
shorie 0:5ac19c994288 78 hal_set_i2s_tx_data( 0 ); // left
shorie 0:5ac19c994288 79 hal_set_i2s_tx_data( 0 ); // right
shorie 0:5ac19c994288 80 hal_set_i2s_tx_data( 0 ); // left
shorie 0:5ac19c994288 81 hal_set_i2s_tx_data( 0 ); // right
shorie 0:5ac19c994288 82 hal_set_i2s_tx_data( 0 ); // left
shorie 0:5ac19c994288 83 hal_set_i2s_tx_data( 0 ); // right
shorie 0:5ac19c994288 84
shorie 0:5ac19c994288 85 }
shorie 0:5ac19c994288 86
shorie 1:9710fb328a08 87 void hal_i2s_pin_config_and_wait_ws()
shorie 1:9710fb328a08 88 {
shorie 1:9710fb328a08 89
shorie 1:9710fb328a08 90 }
shorie 1:9710fb328a08 91
shorie 1:9710fb328a08 92
shorie 0:5ac19c994288 93 // Start I2S transfer. Interrupt starts
shorie 0:5ac19c994288 94 void hal_i2s_start()
shorie 0:5ac19c994288 95 {
shorie 0:5ac19c994288 96 //Clear STOP,RESET and MUTE bit
shorie 0:5ac19c994288 97 LPC_I2S0->DAO &= ~(1 << 3); // release I2S_DAO_STOP;
shorie 0:5ac19c994288 98 LPC_I2S0->DAI &= ~(1 << 3); // release I2S_DAI_STOP;
shorie 0:5ac19c994288 99 LPC_I2S0->DAO &= ~(1 << 6); // release I2S_DAO_MUTE;
shorie 0:5ac19c994288 100 LPC_I2S0->IRQ |= 1 << 0; // set I2S RX IRQ enable
shorie 0:5ac19c994288 101 }
shorie 0:5ac19c994288 102
shorie 0:5ac19c994288 103 IRQn_Type hal_get_i2s_irq_id()
shorie 0:5ac19c994288 104 {
shorie 0:5ac19c994288 105 return I2S0_IRQn;
shorie 0:5ac19c994288 106 }
shorie 0:5ac19c994288 107
shorie 0:5ac19c994288 108
shorie 0:5ac19c994288 109 IRQn_Type hal_get_process_irq_id()
shorie 0:5ac19c994288 110 {
shorie 0:5ac19c994288 111 return ( IRQn_Type )30; // LPC4300's unsed interrupt
shorie 0:5ac19c994288 112 }
shorie 0:5ac19c994288 113
shorie 0:5ac19c994288 114 // The returned value must be compatible with CMSIS NVIC_SetPriority() API.
shorie 0:5ac19c994288 115 unsigned int hal_get_lowest_priority_level()
shorie 0:5ac19c994288 116 {
shorie 0:5ac19c994288 117 return ( 7 ); // LPC4300 has 3 bits priority field. So, lowest is 7.
shorie 0:5ac19c994288 118 }
shorie 0:5ac19c994288 119
shorie 0:5ac19c994288 120 // LPC4337 transferes 2 workd ( left and right ) for each interrupt.
shorie 0:5ac19c994288 121 unsigned int hal_data_per_sample()
shorie 0:5ac19c994288 122 {
shorie 0:5ac19c994288 123 return 2;
shorie 0:5ac19c994288 124 }
shorie 0:5ac19c994288 125
shorie 0:5ac19c994288 126 // return true when the sample parameter is ready to read.
shorie 0:5ac19c994288 127 // return false when the sample is not ready to read.
shorie 0:5ac19c994288 128 bool hal_get_i2s_rx_data( int & sample)
shorie 0:5ac19c994288 129 {
shorie 0:5ac19c994288 130 sample = LPC_I2S0->RXFIFO;
shorie 0:5ac19c994288 131 // always return true for LPC4337
shorie 0:5ac19c994288 132 return ( true );
shorie 0:5ac19c994288 133 }
shorie 0:5ac19c994288 134
shorie 0:5ac19c994288 135 // put a sample to I2S TX data regisger
shorie 0:5ac19c994288 136 // return true if the word is transmitted completely.
shorie 0:5ac19c994288 137 // return false if the word needs another call. In this case, next time same sample will be fed.
shorie 0:5ac19c994288 138 bool hal_set_i2s_tx_data( int sample )
shorie 0:5ac19c994288 139 {
shorie 0:5ac19c994288 140 LPC_I2S0->TXFIFO = sample;
shorie 0:5ac19c994288 141 // always return true for LPC4337
shorie 0:5ac19c994288 142 return true;
shorie 0:5ac19c994288 143 }
shorie 0:5ac19c994288 144 }
shorie 0:5ac19c994288 145
shorie 0:5ac19c994288 146