First Publish. Works fine.
Dependents: unzen_sample_nucleo_f746 unzen_delay_sample_nucleo_f746 skeleton_unzen_nucleo_f746 ifmag_noise_canceller ... more
Nucleo F746ZG用のオーディオ・フレームワークです。フレームワーク地震の詳細は『雲仙』オーディオ・フレームワークを参照してください。
参考リンク
- skeleton_unzen_nucleo_f746 Nucleo F746ZGおよびUI基板を使う場合のスケルトンプログラム。F746を使う方はここから読み始めると良いでしょう。
Diff: unzen.cpp
- Revision:
- 4:d89a1e2b4b03
- Parent:
- 3:707608830793
- Child:
- 5:1cbfb7a9cd0c
diff -r 707608830793 -r d89a1e2b4b03 unzen.cpp --- a/unzen.cpp Tue May 03 07:44:49 2016 +0000 +++ b/unzen.cpp Wed May 04 01:56:03 2016 +0000 @@ -268,8 +268,10 @@ { // tx_int_buffer[process_index][j++] = tx_left_buffer[i] * -(float)INT_MIN ; // tx_int_buffer[process_index][j++] = tx_right_buffer[i] * -(float)INT_MIN ; - tx_int_buffer[process_index][j++] = i << 26; - tx_int_buffer[process_index][j++] = i << 26 ; +// tx_int_buffer[process_index][j] = rx_int_buffer[process_index][i]; j++; +// tx_int_buffer[process_index][j] = rx_int_buffer[process_index][j]; j++; + tx_int_buffer[process_index][j++] = i << 27; + tx_int_buffer[process_index][j++] = i << 27 ; } } @@ -311,10 +313,6 @@ data[0] = 0x40; // Upper address of register - // mute all at first - // may not able to write after reset, but do it avoid noise on warm start - for ( int i=0x23; i>0x27; i++ ) - data[ADDL] = i; data[DATA] = 0x02; i2c->write( addr, data, 3 ); // R29:Play HP left vol ... R33: play mono vol // then, start of configuration as register address order data[ADDL] = 0x00; data[DATA] = 0x0F; i2c->write( addr, data, 3 ); // clock CTL. PLL input. Core clock enable. @@ -331,7 +329,7 @@ data[7] = 0x01; i2c->write( addr, data, 8 ); } - else if ( fs == Fs_48 || fs == Fs_96) + else if ( fs == Fs_48 || fs == Fs_96 || fs == Fs_32 ) { data[ADDL] = 0x02; data[2] = 0x00; @@ -343,19 +341,40 @@ i2c->write( addr, data, 8 ); } + // Additional clock setting for 96kHz + if ( fs == Fs_48 || fs == Fs_441) + { + data[ADDL] = 0x17; data[DATA] = 0x00; + i2c->write( addr, data, 3 ); // R17:Converter control, CONVSR = 0 + } + else if ( fs == Fs_96 ) + { + data[ADDL] = 0x17; data[DATA] = 0x06; + i2c->write( addr, data, 3 ); // R17:Converter control, CONVSR = 6 + } + else if ( fs == Fs_32 ) + { + data[ADDL] = 0x17; data[DATA] = 0x05; + i2c->write( addr, data, 3 ); // R17:Converter control, CONVSR = 5 + } + + // Initialize all register as reset. - for ( int i=0x08; i>0x19; i++ ) + for ( int i=0x08; i<0x17; i++ ) + data[ADDL] = i; data[DATA] = 0x00; i2c->write( addr, data, 3 ); // R2:Dig Mic ... R18:Converter 1 + + for ( int i=0x18; i<0x19; i++ ) data[ADDL] = i; data[DATA] = 0x00; i2c->write( addr, data, 3 ); // R2:Dig Mic ... R18:Converter 1 - data[ADDL] = 0x19; data[DATA] = 0x10; i2c->write( addr, data, 3 ); // R19:ADC Control + data[ADDL] = 0x19; data[DATA] = 0x20; i2c->write( addr, data, 3 ); // R19:ADC Control. HPF on - for ( int i=0x1A; i>0x22; i++ ) + for ( int i=0x1A; i<0x23; i++ ) data[ADDL] = i; data[DATA] = 0x00; i2c->write( addr, data, 3 ); // R20:Left digital vol ... R28: play mixer mono - for ( int i=0x23; i>0x27; i++ ) + for ( int i=0x23; i<0x28; i++ ) data[ADDL] = i; data[DATA] = 0x02; i2c->write( addr, data, 3 ); // R29:Play HP left vol ... R33: play mono vol - for ( int i=0x28; i>0x2c; i++ ) + for ( int i=0x28; i<0x2d; i++ ) data[ADDL] = i; data[DATA] = 0x00; i2c->write( addr, data, 3 ); // R34:play pop surpress ... R38: Dac ctl2 data[ADDL] = 0x2d; data[DATA] = 0xaa; i2c->write( addr, data, 3 ); // R39:serial control pad @@ -366,31 +385,17 @@ // **** Configuration for UMB-ADAU1361 **** - // Additional clock setting for 96kHz - if ( fs == Fs_48 ) - { - data[ADDL] = 0x17; data[DATA] = 0x00; - i2c->write( addr, data, 3 ); // R17:Converter control, CONVSR = 0 - } - if ( fs == Fs_96 ) - { - data[ADDL] = 0x17; data[DATA] = 0x06; - i2c->write( addr, data, 3 ); // R17:Converter control, CONVSR = 6 - } - if ( fs == Fs_32 ) - { - data[ADDL] = 0x17; data[DATA] = 0x05; - i2c->write( addr, data, 3 ); // R17:Converter control, CONVSR = 5 - } - // set Master ( set clock and WS as output ) data[ADDL] = 0x15; data[DATA] = 0x01; i2c->write( addr, data, 3 ); // R15:Serial Port control, MS = 6 // Enable ADC - // bot channel ADC ON, HPF on + // both channel ADC ON, HPF on data[ADDL] = 0x19; data[DATA] = 0x23; i2c->write( addr, data, 3 ); // R19:ADC Control + // Playback Power Management + data[ADDL] = 0x29; data[DATA] = 0x3; i2c->write( addr, data, 3 ); // R35:Left/Right Playback Enable + // Enable DAC // bot channel DAC ON data[ADDL] = 0x2a; data[DATA] = 0x03; i2c->write( addr, data, 3 ); // R36:DAC Control @@ -409,12 +414,14 @@ // Right out mixer // R out MIX6G4 and enable - data[ADDL] = 0x21; data[DATA] = 0x9; i2c->write( addr, data, 3 ); // R27:MIXER 6 + data[ADDL] = 0x21; data[DATA] = 0x09; i2c->write( addr, data, 3 ); // R27:MIXER 6 + + // set input gain set_line_input_gain( 0, 0 ); // unmute - set_line_output_gain( 0, 0, true ); // unmute - set_hp_output_gain( 0, 0, true ); // unmute + set_line_output_gain( 0, 0, true ); // mute + set_hp_output_gain( 0, 0, true ); // mute } #define SET_INPUT_GAIN( x ) ((x<<1)|1) @@ -422,12 +429,11 @@ void umb_adau1361::set_line_input_gain(float left_gain, float right_gain, bool mute) { char data[3]; + int left, right; - // **** Setup all ADAU-1361 register to reset state **** data[0] = 0x40; // Upper address of register - // mute all at first if ( mute ) { data[ADDL] = 0x0a; data[DATA] = 0x01; i2c->write( addr, data, 3 ); // R4: mixer 1 enable @@ -435,21 +441,20 @@ } else { - int level; // set left gain - level = (left_gain+15)/3 ; // See table 31 LINNG - level = max( level, 0 ); - level = min( level, 7 ); - data[DATA] = SET_INPUT_GAIN( level ); + left = (left_gain+15)/3 ; // See table 31 LINNG + left = max( left, 0 ); + left = min( left, 7 ); + data[DATA] = SET_INPUT_GAIN( left ); data[ADDL] = 0x0a; i2c->write( addr, data, 3 ); // R4: mixer 1 enable // set right gain - level = (right_gain+15)/3 ; // See table 31 LINNG - level = max( level, 0 ); - level = min( level, 7 ); - data[DATA] = SET_INPUT_GAIN( level ); + right = (right_gain+15)/3 ; // See table 31 LINNG + right = max( right, 0 ); + right = min( right, 7 ); + data[DATA] = SET_INPUT_GAIN( right ); data[ADDL] = 0x0c; i2c->write( addr, data, 3 ); // R4: mixer 1 enable @@ -507,8 +512,8 @@ right = max( right, 0 ); right = min( right, 63 ); - data[ADDL] = 0x23; data[DATA] = SET_HP_GAIN(left ); i2c->write( addr, data, 3 ); // R29: LHPVOL - data[ADDL] = 0x24; data[DATA] = SET_HP_GAIN(right); i2c->write( addr, data, 3 ); // R30: LHPVOL & HP MODE + data[ADDL] = 0x23; data[DATA] = SET_HP_GAIN(left ); i2c->write( addr, data, 3 ); // R29: LHPVOL + data[ADDL] = 0x24; data[DATA] = SET_HP_GAIN(right); i2c->write( addr, data, 3 ); // R30: LHPVOL } }