adi_bms_2950cmdlist.cpp

00001 /**
00002 ********************************************************************************
00003 *
00004 * @file:    adi_bms_2950cmdlist.c
00005 *
00006 * @brief:   This file contains ADBMS2950 command list implementation.
00007 *
00008 * @details:
00009 *
00010 *******************************************************************************
00011 Copyright(c) 2020 Analog Devices, Inc. All Rights Reserved. This software is
00012 proprietary & confidential to Analog Devices, Inc. and its licensors. By using
00013 this software you agree to the terms of the associated Analog Devices License
00014 Agreement.
00015 *******************************************************************************
00016 */
00017 /*! \addtogroup BMS_Driver
00018 *  @{
00019 */
00020 
00021 /*! \addtogroup Command_List
00022 *  @{
00023 */
00024 /*============= I N C L U D E S =============*/
00025 /*============== D E F I N E S ===============*/
00026 /*============= E X T E R N A L S ============*/
00027 /*============= E N U M E R A T O R S ============*/
00028 
00029 #include "adbms2950.h"
00030 
00031 /*!< configuration registers commands */
00032 uint8_t WRCFGA [2]        = { 0x00, 0x01 };
00033 uint8_t WRCFGB[2]        = { 0x00, 0x24 };
00034 uint8_t RDCFGA[2]        = { 0x00, 0x02 };
00035 uint8_t RDCFGB [2]        = { 0x00, 0x26 };
00036 
00037 /*!< Read cell voltage result registers commands */
00038 uint8_t RDI[2]         = { 0x00, 0x04 };
00039 uint8_t RDVBAT[2]      = { 0x00, 0x06 };
00040 uint8_t RDIVBAT[2]     = { 0x00, 0x08 };
00041 uint8_t RDVA[2]        = { 0x00, 0x0A };
00042 uint8_t RDVB[2]        = { 0x00, 0x09 };
00043 uint8_t RDOCR[2]       = { 0x00, 0x0B };
00044 uint8_t RDALLA [2]      = { 0x00, 0x0C };
00045 
00046 /*!< Read Result Registers Commands B */
00047 uint8_t RDIAV[2]       = { 0x00, 0x44 };
00048 uint8_t RDVBAV[2]      = { 0x00, 0x46 };
00049 uint8_t RDIVBAV[2]     = { 0x00, 0x48 };
00050 uint8_t RDALLB [2]      = { 0x00, 0x4C };
00051 
00052 /*!< Read Result Registers Commands C */
00053 uint8_t RDRVA[2]       = { 0x00, 0x07 };
00054 uint8_t RDRVB[2]       = { 0x00, 0x0D };
00055 uint8_t RDVC[2]        = { 0x00, 0x03 };
00056 uint8_t RDVD[2]        = { 0x00, 0x05 };
00057 uint8_t RDCALL [2]      = { 0x00, 0x10 };
00058 
00059 /*!< Read status registers */
00060 uint8_t RDSTATA[2]       = { 0x00, 0x30 };
00061 uint8_t RDSTATB[2]       = { 0x00, 0x31 };
00062 uint8_t RDSTATC[2]       = { 0x00, 0x32 };
00063 uint8_t RDSTATCERR [2]    = { 0x00, 0x72 };   /* ERR */
00064 uint8_t RDSTATD[2]       = { 0x00, 0x33 };
00065 uint8_t RDSTATE [2]       = { 0x00, 0x34 };
00066 
00067 /*!< Read all Status Registers */
00068 uint8_t RDASALL [2]       = { 0x00, 0x35 };
00069 
00070 /*!< Pwm registers commands */
00071 uint8_t WRPWMA[2]         = { 0x00, 0x20 };
00072 uint8_t RDPWMA[2]         = { 0x00, 0x22 };
00073 uint8_t WRPWMB[2]         = { 0x00, 0x21 };
00074 uint8_t RDPWMB [2]         = { 0x00, 0x23 };
00075 
00076 /*!< Clear commands */
00077 uint8_t CLRAB[2]         = { 0x07, 0x11 };
00078 uint8_t CLRC[2]          = { 0x07, 0x16 };
00079 uint8_t CLRSTAT [2]      = { 0x07, 0x13 };
00080 uint8_t CLRFLAG [2]       = { 0x07, 0x17 };
00081 
00082 /*!< Poll adc command */
00083 uint8_t PLADC[2]         = { 0x07, 0x18 };
00084 uint8_t PLI1ADC[2]       = { 0x07, 0x1C };
00085 uint8_t PLI2ADC[2]       = { 0x07, 0x1D };
00086 uint8_t PLVADC[2]        = { 0x07, 0x1E };
00087 uint8_t PLAUX [2]         = { 0x07, 0x1F };
00088 
00089 /*!< GPIOs Comm commands */
00090 uint8_t WRCOMM[2]        = { 0x07, 0x21 };
00091 uint8_t RDCOMM [2]        = { 0x07, 0x22 };
00092 /*!< command + dummy data for 72 clock cycles */
00093 uint8_t STCOMM [13]       = { 0x07, 0x23, 0xB9, 0xE4 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00};
00094 
00095 /*!< Control Commands */
00096 uint8_t RDSID[2]         = { 0x00, 0x2C };
00097 uint8_t RSTCC[2]         = { 0x00, 0x2E };
00098 uint8_t SNAP[2]          = { 0x00, 0x2D };
00099 uint8_t UNSNAP[2]        = { 0x00, 0x2F };
00100 uint8_t SRST [2]          = { 0x00, 0x27 };
00101 
00102 /*!< Reserved Read Commands */
00103 uint8_t RDAUXC[2]         = { 0x00, 0x1B };
00104 uint8_t RDRAXC[2]         = { 0x00, 0x1E };
00105 uint8_t RDAUXD[2]         = { 0x00, 0x1F };
00106 uint8_t RDRAXD[2]         = { 0x00, 0x25 };
00107 
00108 /** @}*/
00109 /** @}*/