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Dependencies:   mbed-rtos mbed

Fork of COM_MNG_TMTC_SIMPLE by Shreesha S

DefinitionsAndGlobals.h@0:f016e9e8d48b, 2015-12-01 (annotated)

Committer:
shreeshas95
Date:
Tue Dec 01 10:56:10 2015 +0000
Revision:
0:f016e9e8d48b
Child:
1:a0055b3280c8
Working without COM_SND_TM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
shreeshas95 0:f016e9e8d48b 2 // COM_RX
shreeshas95 0:f016e9e8d48b 3 #define RX_TIMEOUT_LIMIT 2.0
shreeshas95 0:f016e9e8d48b 4 #define COM_RX_UART_TX PTE22
shreeshas95 0:f016e9e8d48b 5 #define COM_RX_UART_RX PTE23
shreeshas95 0:f016e9e8d48b 6
shreeshas95 0:f016e9e8d48b 7 // COMMON SPI
shreeshas95 0:f016e9e8d48b 8 #define SPI_MOSI PTE1
shreeshas95 0:f016e9e8d48b 9 #define SPI_MISO PTE3
shreeshas95 0:f016e9e8d48b 10 #define SPI_CLK PTE2
shreeshas95 0:f016e9e8d48b 11
shreeshas95 0:f016e9e8d48b 12 // TC LIST
shreeshas95 0:f016e9e8d48b 13 #define TCL_STATE_IDLE 0x00
shreeshas95 0:f016e9e8d48b 14 #define TCL_STATE_EXECUTING 0x01
shreeshas95 0:f016e9e8d48b 15 #define TCL_STATE_COMPLETED 0x03
shreeshas95 0:f016e9e8d48b 16 #define TCL_STATE_ABORTED 0x02
shreeshas95 0:f016e9e8d48b 17 /*
shreeshas95 0:f016e9e8d48b 18 0: IDLE OR WAITING FOR TCL COMPLETION
shreeshas95 0:f016e9e8d48b 19 1: EXECUTING AFTER COMPLETION OF TCL
shreeshas95 0:f016e9e8d48b 20 2: COMPLETED EXECUTION OF TCL
shreeshas95 0:f016e9e8d48b 21 3: IDLE DUE TO ABORT ON NACK
shreeshas95 0:f016e9e8d48b 22 */
shreeshas95 0:f016e9e8d48b 23
shreeshas95 0:f016e9e8d48b 24 // LIST OF FLAGS
shreeshas95 0:f016e9e8d48b 25 #define UART_INT_FLAG 0x01
shreeshas95 0:f016e9e8d48b 26 #define NEW_TC_RECEIVED 0x02
shreeshas95 0:f016e9e8d48b 27 #define START_SESSION 0x03
shreeshas95 0:f016e9e8d48b 28 #define END_SESSION 0x04
shreeshas95 0:f016e9e8d48b 29 #define ALL_CRC_PASS_FLAG 0x05
shreeshas95 0:f016e9e8d48b 30 #define EXECUTE_OBOSC_FLAG 0x06
shreeshas95 0:f016e9e8d48b 31
shreeshas95 0:f016e9e8d48b 32 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 33 #define SESSION_TIME_LIMIT 1200
shreeshas95 0:f016e9e8d48b 34 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
shreeshas95 0:f016e9e8d48b 35 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
shreeshas95 0:f016e9e8d48b 36 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
shreeshas95 0:f016e9e8d48b 37
shreeshas95 0:f016e9e8d48b 38 // COM_MNG_TMTC
shreeshas95 0:f016e9e8d48b 39 // starting value of packet sequence count at each pass
shreeshas95 0:f016e9e8d48b 40 #define PSC_START_VALUE 1
shreeshas95 0:f016e9e8d48b 41
shreeshas95 0:f016e9e8d48b 42 // APID list
shreeshas95 0:f016e9e8d48b 43 #define APID_CALLSIGN 0
shreeshas95 0:f016e9e8d48b 44 #define APID_BAE 1
shreeshas95 0:f016e9e8d48b 45 #define APID_CDMS 2
shreeshas95 0:f016e9e8d48b 46 #define APID_SPEED 3
shreeshas95 0:f016e9e8d48b 47
shreeshas95 0:f016e9e8d48b 48 // HIGH PRIORITY TC - priority list
shreeshas95 0:f016e9e8d48b 49 // not correct values here
shreeshas95 0:f016e9e8d48b 50 #define HPTC1 5
shreeshas95 0:f016e9e8d48b 51 #define HPTC2 6
shreeshas95 0:f016e9e8d48b 52 // Add more entries above
shreeshas95 0:f016e9e8d48b 53
shreeshas95 0:f016e9e8d48b 54 // SIZE of tc in bytes
shreeshas95 0:f016e9e8d48b 55 #define TC_SHORT_SIZE 11
shreeshas95 0:f016e9e8d48b 56 #define TC_LONG_SIZE 135
shreeshas95 0:f016e9e8d48b 57
shreeshas95 0:f016e9e8d48b 58 // TMID list
shreeshas95 0:f016e9e8d48b 59 #define TMID_ACK_L1 0xA
shreeshas95 0:f016e9e8d48b 60
shreeshas95 0:f016e9e8d48b 61 // OBOSC SERVICE SUBTYPE
shreeshas95 0:f016e9e8d48b 62 #define OBOSC_SUB_DISABLE 0x01
shreeshas95 0:f016e9e8d48b 63 #define OBOSC_SUB_RETRY 0x05
shreeshas95 0:f016e9e8d48b 64 #define OBOSC_SUB_REP_TCL_D 0x06
shreeshas95 0:f016e9e8d48b 65 #define OBOSC_SUB_REP_TCL 0x08
shreeshas95 0:f016e9e8d48b 66 #define OBOSC_SUB_REP_LE 0x0F
shreeshas95 0:f016e9e8d48b 67 #define OBOSC_SUB_RESET 0x07
shreeshas95 0:f016e9e8d48b 68
shreeshas95 0:f016e9e8d48b 69
shreeshas95 0:f016e9e8d48b 70
shreeshas95 0:f016e9e8d48b 71 // ****************GLOBAL VARIABLES******************
shreeshas95 0:f016e9e8d48b 72 // DEBUG
shreeshas95 0:f016e9e8d48b 73 Serial gPC( USBTX, USBRX );
shreeshas95 0:f016e9e8d48b 74 DigitalOut gLEDR(LED_RED);
shreeshas95 0:f016e9e8d48b 75 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 76
shreeshas95 0:f016e9e8d48b 77 // COM_RX
shreeshas95 0:f016e9e8d48b 78 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 79 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 80 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 81 uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 82 uint32_t gRX_COUNT = 0;
shreeshas95 0:f016e9e8d48b 83 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 84 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 0:f016e9e8d48b 85
shreeshas95 0:f016e9e8d48b 86
shreeshas95 0:f016e9e8d48b 87 // COMMON SPI
shreeshas95 0:f016e9e8d48b 88 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 0:f016e9e8d48b 89 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 90
shreeshas95 0:f016e9e8d48b 91 // TC LIST
shreeshas95 0:f016e9e8d48b 92 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 93 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 94 uint8_t gMASTER_STATE = TCL_STATE_IDLE;
shreeshas95 0:f016e9e8d48b 95 uint8_t gFLAGS = 0x00;
shreeshas95 0:f016e9e8d48b 96
shreeshas95 0:f016e9e8d48b 97 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 98 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 99 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 100 Timeout gSESSION_TIMEOUT;
shreeshas95 0:f016e9e8d48b 101
shreeshas95 0:f016e9e8d48b 102 // COM_MNG_TMTC
shreeshas95 0:f016e9e8d48b 103 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 104 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 0:f016e9e8d48b 105 uint8_t gLAST_L1_ACK[TM_SHORT_SIZE];
shreeshas95 0:f016e9e8d48b 106 uint8_t gLAST_L1_ACK_BUFFER[TM_SHORT_SIZE];
shreeshas95 0:f016e9e8d48b 107 uint8_t gOBOSC_PSC = PSC_START_VALUE;
shreeshas95 0:f016e9e8d48b 108 Base_tc* gOBOSC_HEAD = NULL;