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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_adc.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
83:a036322b8637
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_adc.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.1
bogdanm 0:9b334a45a8ff 6 * @date 25-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 8 * functionalities of the Analog to Digital Convertor (ADC) peripheral:
bogdanm 0:9b334a45a8ff 9 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 10 * + IO operation functions
bogdanm 0:9b334a45a8ff 11 * + State and errors functions
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 ##### ADC Peripheral features #####
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 [..]
bogdanm 0:9b334a45a8ff 18 (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
bogdanm 0:9b334a45a8ff 19 (#) Interrupt generation at the end of conversion, end of injected conversion,
bogdanm 0:9b334a45a8ff 20 and in case of analog watchdog or overrun events
bogdanm 0:9b334a45a8ff 21 (#) Single and continuous conversion modes.
bogdanm 0:9b334a45a8ff 22 (#) Scan mode for automatic conversion of channel 0 to channel x.
bogdanm 0:9b334a45a8ff 23 (#) Data alignment with in-built data coherency.
bogdanm 0:9b334a45a8ff 24 (#) Channel-wise programmable sampling time.
bogdanm 0:9b334a45a8ff 25 (#) External trigger option with configurable polarity for both regular and
bogdanm 0:9b334a45a8ff 26 injected conversion.
bogdanm 0:9b334a45a8ff 27 (#) Dual/Triple mode (on devices with 2 ADCs or more).
bogdanm 0:9b334a45a8ff 28 (#) Configurable DMA data storage in Dual/Triple ADC mode.
bogdanm 0:9b334a45a8ff 29 (#) Configurable delay between conversions in Dual/Triple interleaved mode.
bogdanm 0:9b334a45a8ff 30 (#) ADC conversion type (refer to the datasheets).
bogdanm 0:9b334a45a8ff 31 (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
bogdanm 0:9b334a45a8ff 32 slower speed.
bogdanm 0:9b334a45a8ff 33 (#) ADC input range: VREF(minus) = VIN = VREF(plus).
bogdanm 0:9b334a45a8ff 34 (#) DMA request generation during regular channel conversion.
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 38 ==============================================================================
bogdanm 0:9b334a45a8ff 39 [..]
bogdanm 0:9b334a45a8ff 40 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
bogdanm 0:9b334a45a8ff 41 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 42 (##) ADC pins configuration
bogdanm 0:9b334a45a8ff 43 (+++) Enable the clock for the ADC GPIOs using the following function:
bogdanm 0:9b334a45a8ff 44 __HAL_RCC_GPIOx_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 45 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
bogdanm 0:9b334a45a8ff 46 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
bogdanm 0:9b334a45a8ff 47 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
bogdanm 0:9b334a45a8ff 48 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
bogdanm 0:9b334a45a8ff 49 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
bogdanm 0:9b334a45a8ff 50 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
bogdanm 0:9b334a45a8ff 51 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 52 (+++) Configure and enable two DMA streams stream for managing data
bogdanm 0:9b334a45a8ff 53 transfer from peripheral to memory (output stream)
bogdanm 0:9b334a45a8ff 54 (+++) Associate the initialized DMA handle to the CRYP DMA handle
bogdanm 0:9b334a45a8ff 55 using __HAL_LINKDMA()
bogdanm 0:9b334a45a8ff 56 (+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm 0:9b334a45a8ff 57 interrupt on the two DMA Streams. The output stream should have higher
bogdanm 0:9b334a45a8ff 58 priority than the input stream.
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 *** Configuration of ADC, groups regular/injected, channels parameters ***
bogdanm 0:9b334a45a8ff 61 ==============================================================================
bogdanm 0:9b334a45a8ff 62 [..]
bogdanm 0:9b334a45a8ff 63 (#) Configure the ADC parameters (resolution, data alignment, ...)
bogdanm 0:9b334a45a8ff 64 and regular group parameters (conversion trigger, sequencer, ...)
bogdanm 0:9b334a45a8ff 65 using function HAL_ADC_Init().
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 (#) Configure the channels for regular group parameters (channel number,
bogdanm 0:9b334a45a8ff 68 channel rank into sequencer, ..., into regular group)
bogdanm 0:9b334a45a8ff 69 using function HAL_ADC_ConfigChannel().
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 (#) Optionally, configure the injected group parameters (conversion trigger,
bogdanm 0:9b334a45a8ff 72 sequencer, ..., of injected group)
bogdanm 0:9b334a45a8ff 73 and the channels for injected group parameters (channel number,
bogdanm 0:9b334a45a8ff 74 channel rank into sequencer, ..., into injected group)
bogdanm 0:9b334a45a8ff 75 using function HAL_ADCEx_InjectedConfigChannel().
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 (#) Optionally, configure the analog watchdog parameters (channels
bogdanm 0:9b334a45a8ff 78 monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 (#) Optionally, for devices with several ADC instances: configure the
bogdanm 0:9b334a45a8ff 81 multimode parameters using function HAL_ADCEx_MultiModeConfigChannel().
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 *** Execution of ADC conversions ***
bogdanm 0:9b334a45a8ff 84 ==============================================================================
bogdanm 0:9b334a45a8ff 85 [..]
bogdanm 0:9b334a45a8ff 86 (#) ADC driver can be used among three modes: polling, interruption,
bogdanm 0:9b334a45a8ff 87 transfer by DMA.
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 90 =================================
bogdanm 0:9b334a45a8ff 91 [..]
bogdanm 0:9b334a45a8ff 92 (+) Start the ADC peripheral using HAL_ADC_Start()
bogdanm 0:9b334a45a8ff 93 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
bogdanm 0:9b334a45a8ff 94 user can specify the value of timeout according to his end application
bogdanm 0:9b334a45a8ff 95 (+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
bogdanm 0:9b334a45a8ff 96 (+) Stop the ADC peripheral using HAL_ADC_Stop()
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 99 ===================================
bogdanm 0:9b334a45a8ff 100 [..]
bogdanm 0:9b334a45a8ff 101 (+) Start the ADC peripheral using HAL_ADC_Start_IT()
bogdanm 0:9b334a45a8ff 102 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
bogdanm 0:9b334a45a8ff 103 (+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 104 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
bogdanm 0:9b334a45a8ff 105 (+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 106 add his own code by customization of function pointer HAL_ADC_ErrorCallback
bogdanm 0:9b334a45a8ff 107 (+) Stop the ADC peripheral using HAL_ADC_Stop_IT()
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 110 ==============================
bogdanm 0:9b334a45a8ff 111 [..]
bogdanm 0:9b334a45a8ff 112 (+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length
bogdanm 0:9b334a45a8ff 113 of data to be transferred at each end of conversion
bogdanm 0:9b334a45a8ff 114 (+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 115 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
bogdanm 0:9b334a45a8ff 116 (+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 117 add his own code by customization of function pointer HAL_ADC_ErrorCallback
bogdanm 0:9b334a45a8ff 118 (+) Stop the ADC peripheral using HAL_ADC_Stop_DMA()
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 *** ADC HAL driver macros list ***
bogdanm 0:9b334a45a8ff 121 =============================================
bogdanm 0:9b334a45a8ff 122 [..]
bogdanm 0:9b334a45a8ff 123 Below the list of most used macros in ADC HAL driver.
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 (+) __HAL_ADC_ENABLE : Enable the ADC peripheral
bogdanm 0:9b334a45a8ff 126 (+) __HAL_ADC_DISABLE : Disable the ADC peripheral
bogdanm 0:9b334a45a8ff 127 (+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt
bogdanm 0:9b334a45a8ff 128 (+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt
bogdanm 0:9b334a45a8ff 129 (+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled
bogdanm 0:9b334a45a8ff 130 (+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags
bogdanm 0:9b334a45a8ff 131 (+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status
bogdanm 0:9b334a45a8ff 132 (+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 [..]
bogdanm 0:9b334a45a8ff 135 (@) You can refer to the ADC HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 *** Deinitialization of ADC ***
bogdanm 0:9b334a45a8ff 138 ==============================================================================
bogdanm 0:9b334a45a8ff 139 [..]
bogdanm 0:9b334a45a8ff 140 (#) Disable the ADC interface
bogdanm 0:9b334a45a8ff 141 (++) ADC clock can be hard reset and disabled at RCC top level.
bogdanm 0:9b334a45a8ff 142 (++) Hard reset of ADC peripherals
bogdanm 0:9b334a45a8ff 143 using macro __HAL_RCC_ADC_FORCE_RESET(), __HAL_RCC_ADC_RELEASE_RESET().
bogdanm 0:9b334a45a8ff 144 (++) ADC clock disable using the equivalent macro/functions as configuration step.
bogdanm 0:9b334a45a8ff 145 (+++) Example:
bogdanm 0:9b334a45a8ff 146 Into HAL_ADC_MspDeInit() (recommended code location) or with
bogdanm 0:9b334a45a8ff 147 other device clock parameters configuration:
bogdanm 0:9b334a45a8ff 148 (+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
bogdanm 0:9b334a45a8ff 149 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
bogdanm 0:9b334a45a8ff 150 (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
bogdanm 0:9b334a45a8ff 151 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 (#) ADC pins configuration
bogdanm 0:9b334a45a8ff 154 (++) Disable the clock for the ADC GPIOs using macro __HAL_RCC_GPIOx_CLK_DISABLE()
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 (#) Optionally, in case of usage of ADC with interruptions:
bogdanm 0:9b334a45a8ff 157 (++) Disable the NVIC for ADC using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 (#) Optionally, in case of usage of DMA:
bogdanm 0:9b334a45a8ff 160 (++) Deinitialize the DMA using function HAL_DMA_DeInit().
bogdanm 0:9b334a45a8ff 161 (++) Disable the NVIC for DMA using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 @endverbatim
bogdanm 0:9b334a45a8ff 164 ******************************************************************************
bogdanm 0:9b334a45a8ff 165 * @attention
bogdanm 0:9b334a45a8ff 166 *
bogdanm 0:9b334a45a8ff 167 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 168 *
bogdanm 0:9b334a45a8ff 169 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 170 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 171 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 172 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 173 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 174 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 175 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 176 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 177 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 178 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 179 *
bogdanm 0:9b334a45a8ff 180 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 181 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 182 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 183 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 184 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 185 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 186 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 187 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 188 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 189 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 190 *
bogdanm 0:9b334a45a8ff 191 ******************************************************************************
bogdanm 0:9b334a45a8ff 192 */
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 195 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 198 * @{
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /** @defgroup ADC ADC
bogdanm 0:9b334a45a8ff 202 * @brief ADC driver modules
bogdanm 0:9b334a45a8ff 203 * @{
bogdanm 0:9b334a45a8ff 204 */
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 #ifdef HAL_ADC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 209 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 210 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 211 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 212 /** @addtogroup ADC_Private_Functions
bogdanm 0:9b334a45a8ff 213 * @{
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 216 static void ADC_Init(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 217 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 218 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 219 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 220 /**
bogdanm 0:9b334a45a8ff 221 * @}
bogdanm 0:9b334a45a8ff 222 */
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 225 /** @defgroup ADC_Exported_Functions ADC Exported Functions
bogdanm 0:9b334a45a8ff 226 * @{
bogdanm 0:9b334a45a8ff 227 */
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 230 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 231 *
bogdanm 0:9b334a45a8ff 232 @verbatim
bogdanm 0:9b334a45a8ff 233 ===============================================================================
bogdanm 0:9b334a45a8ff 234 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 235 ===============================================================================
bogdanm 0:9b334a45a8ff 236 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 237 (+) Initialize and configure the ADC.
bogdanm 0:9b334a45a8ff 238 (+) De-initialize the ADC.
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 @endverbatim
bogdanm 0:9b334a45a8ff 241 * @{
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /**
bogdanm 0:9b334a45a8ff 245 * @brief Initializes the ADCx peripheral according to the specified parameters
bogdanm 0:9b334a45a8ff 246 * in the ADC_InitStruct and initializes the ADC MSP.
bogdanm 0:9b334a45a8ff 247 *
bogdanm 0:9b334a45a8ff 248 * @note This function is used to configure the global features of the ADC (
bogdanm 0:9b334a45a8ff 249 * ClockPrescaler, Resolution, Data Alignment and number of conversion), however,
bogdanm 0:9b334a45a8ff 250 * the rest of the configuration parameters are specific to the regular
bogdanm 0:9b334a45a8ff 251 * channels group (scan mode activation, continuous mode activation,
bogdanm 0:9b334a45a8ff 252 * External trigger source and edge, DMA continuous request after the
bogdanm 0:9b334a45a8ff 253 * last transfer and End of conversion selection).
bogdanm 0:9b334a45a8ff 254 *
bogdanm 0:9b334a45a8ff 255 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 256 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 257 * @retval HAL status
bogdanm 0:9b334a45a8ff 258 */
bogdanm 0:9b334a45a8ff 259 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 260 {
bogdanm 0:9b334a45a8ff 261 /* Check ADC handle */
bogdanm 0:9b334a45a8ff 262 if(hadc == NULL)
bogdanm 0:9b334a45a8ff 263 {
bogdanm 0:9b334a45a8ff 264 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 265 }
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 /* Check the parameters */
bogdanm 0:9b334a45a8ff 268 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 269 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
bogdanm 0:9b334a45a8ff 270 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
bogdanm 0:9b334a45a8ff 271 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode));
bogdanm 0:9b334a45a8ff 272 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 273 assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv));
bogdanm 0:9b334a45a8ff 274 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
bogdanm 0:9b334a45a8ff 275 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
bogdanm 0:9b334a45a8ff 276 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
bogdanm 0:9b334a45a8ff 277 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
bogdanm 0:9b334a45a8ff 278 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
bogdanm 0:9b334a45a8ff 281 {
bogdanm 0:9b334a45a8ff 282 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 283 }
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 if(hadc->State == HAL_ADC_STATE_RESET)
bogdanm 0:9b334a45a8ff 286 {
bogdanm 0:9b334a45a8ff 287 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 288 hadc->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 289 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 290 HAL_ADC_MspInit(hadc);
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 /* Initialize the ADC state */
bogdanm 0:9b334a45a8ff 294 hadc->State = HAL_ADC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 /* Set ADC parameters */
bogdanm 0:9b334a45a8ff 297 ADC_Init(hadc);
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /* Set ADC error code to none */
bogdanm 0:9b334a45a8ff 300 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 /* Initialize the ADC state */
bogdanm 0:9b334a45a8ff 303 hadc->State = HAL_ADC_STATE_READY;
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /* Release Lock */
bogdanm 0:9b334a45a8ff 306 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 /* Return function status */
bogdanm 0:9b334a45a8ff 309 return HAL_OK;
bogdanm 0:9b334a45a8ff 310 }
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 /**
bogdanm 0:9b334a45a8ff 313 * @brief Deinitializes the ADCx peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 314 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 315 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 316 * @retval HAL status
bogdanm 0:9b334a45a8ff 317 */
bogdanm 0:9b334a45a8ff 318 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 319 {
bogdanm 0:9b334a45a8ff 320 /* Check ADC handle */
bogdanm 0:9b334a45a8ff 321 if(hadc == NULL)
bogdanm 0:9b334a45a8ff 322 {
bogdanm 0:9b334a45a8ff 323 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /* Check the parameters */
bogdanm 0:9b334a45a8ff 327 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 /* Change ADC state */
bogdanm 0:9b334a45a8ff 330 hadc->State = HAL_ADC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /* DeInit the low level hardware */
bogdanm 0:9b334a45a8ff 333 HAL_ADC_MspDeInit(hadc);
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /* Set ADC error code to none */
bogdanm 0:9b334a45a8ff 336 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /* Change ADC state */
bogdanm 0:9b334a45a8ff 339 hadc->State = HAL_ADC_STATE_RESET;
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /* Return function status */
bogdanm 0:9b334a45a8ff 342 return HAL_OK;
bogdanm 0:9b334a45a8ff 343 }
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /**
bogdanm 0:9b334a45a8ff 346 * @brief Initializes the ADC MSP.
bogdanm 0:9b334a45a8ff 347 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 348 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 349 * @retval None
bogdanm 0:9b334a45a8ff 350 */
bogdanm 0:9b334a45a8ff 351 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 352 {
bogdanm 0:9b334a45a8ff 353 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 354 the HAL_ADC_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356 }
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 /**
bogdanm 0:9b334a45a8ff 359 * @brief DeInitializes the ADC MSP.
bogdanm 0:9b334a45a8ff 360 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 361 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 362 * @retval None
bogdanm 0:9b334a45a8ff 363 */
bogdanm 0:9b334a45a8ff 364 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 365 {
bogdanm 0:9b334a45a8ff 366 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 367 the HAL_ADC_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 }
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 /**
bogdanm 0:9b334a45a8ff 372 * @}
bogdanm 0:9b334a45a8ff 373 */
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 376 * @brief IO operation functions
bogdanm 0:9b334a45a8ff 377 *
bogdanm 0:9b334a45a8ff 378 @verbatim
bogdanm 0:9b334a45a8ff 379 ===============================================================================
bogdanm 0:9b334a45a8ff 380 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 381 ===============================================================================
bogdanm 0:9b334a45a8ff 382 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 383 (+) Start conversion of regular channel.
bogdanm 0:9b334a45a8ff 384 (+) Stop conversion of regular channel.
bogdanm 0:9b334a45a8ff 385 (+) Start conversion of regular channel and enable interrupt.
bogdanm 0:9b334a45a8ff 386 (+) Stop conversion of regular channel and disable interrupt.
bogdanm 0:9b334a45a8ff 387 (+) Start conversion of regular channel and enable DMA transfer.
bogdanm 0:9b334a45a8ff 388 (+) Stop conversion of regular channel and disable DMA transfer.
bogdanm 0:9b334a45a8ff 389 (+) Handle ADC interrupt request.
bogdanm 0:9b334a45a8ff 390
bogdanm 0:9b334a45a8ff 391 @endverbatim
bogdanm 0:9b334a45a8ff 392 * @{
bogdanm 0:9b334a45a8ff 393 */
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /**
bogdanm 0:9b334a45a8ff 396 * @brief Enables ADC and starts conversion of the regular channels.
bogdanm 0:9b334a45a8ff 397 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 398 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 399 * @retval HAL status
bogdanm 0:9b334a45a8ff 400 */
bogdanm 0:9b334a45a8ff 401 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 402 {
bogdanm 0:9b334a45a8ff 403 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /* Check the parameters */
bogdanm 0:9b334a45a8ff 406 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 407 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 /* Process locked */
bogdanm 0:9b334a45a8ff 410 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 /* Check if an injected conversion is ongoing */
bogdanm 0:9b334a45a8ff 413 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
bogdanm 0:9b334a45a8ff 414 {
bogdanm 0:9b334a45a8ff 415 /* Change ADC state */
bogdanm 0:9b334a45a8ff 416 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
bogdanm 0:9b334a45a8ff 417 }
bogdanm 0:9b334a45a8ff 418 else
bogdanm 0:9b334a45a8ff 419 {
bogdanm 0:9b334a45a8ff 420 /* Change ADC state */
bogdanm 0:9b334a45a8ff 421 hadc->State = HAL_ADC_STATE_BUSY_REG;
bogdanm 0:9b334a45a8ff 422 }
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 425 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 426 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 427 {
bogdanm 0:9b334a45a8ff 428 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 429 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 432 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 433 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 434 while(counter != 0)
bogdanm 0:9b334a45a8ff 435 {
bogdanm 0:9b334a45a8ff 436 counter--;
bogdanm 0:9b334a45a8ff 437 }
bogdanm 0:9b334a45a8ff 438 }
bogdanm 0:9b334a45a8ff 439
bogdanm 0:9b334a45a8ff 440 /* Process unlocked */
bogdanm 0:9b334a45a8ff 441 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 /* Check if Multimode enabled */
bogdanm 0:9b334a45a8ff 444 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
bogdanm 0:9b334a45a8ff 445 {
bogdanm 0:9b334a45a8ff 446 /* if no external trigger present enable software conversion of regular channels */
bogdanm 0:9b334a45a8ff 447 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
bogdanm 0:9b334a45a8ff 448 {
bogdanm 0:9b334a45a8ff 449 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 450 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452 }
bogdanm 0:9b334a45a8ff 453 else
bogdanm 0:9b334a45a8ff 454 {
bogdanm 0:9b334a45a8ff 455 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
bogdanm 0:9b334a45a8ff 456 if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
bogdanm 0:9b334a45a8ff 457 {
bogdanm 0:9b334a45a8ff 458 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 459 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
bogdanm 0:9b334a45a8ff 460 }
bogdanm 0:9b334a45a8ff 461 }
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 /* Return function status */
bogdanm 0:9b334a45a8ff 464 return HAL_OK;
bogdanm 0:9b334a45a8ff 465 }
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 /**
bogdanm 0:9b334a45a8ff 468 * @brief Disables ADC and stop conversion of regular channels.
bogdanm 0:9b334a45a8ff 469 *
bogdanm 0:9b334a45a8ff 470 * @note Caution: This function will stop also injected channels.
bogdanm 0:9b334a45a8ff 471 *
bogdanm 0:9b334a45a8ff 472 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 473 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 474 *
bogdanm 0:9b334a45a8ff 475 * @retval HAL status.
bogdanm 0:9b334a45a8ff 476 */
bogdanm 0:9b334a45a8ff 477 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 478 {
bogdanm 0:9b334a45a8ff 479 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 480 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 /* Change ADC state */
bogdanm 0:9b334a45a8ff 483 hadc->State = HAL_ADC_STATE_READY;
bogdanm 0:9b334a45a8ff 484
bogdanm 0:9b334a45a8ff 485 /* Return function status */
bogdanm 0:9b334a45a8ff 486 return HAL_OK;
bogdanm 0:9b334a45a8ff 487 }
bogdanm 0:9b334a45a8ff 488
bogdanm 0:9b334a45a8ff 489 /**
bogdanm 0:9b334a45a8ff 490 * @brief Poll for regular conversion complete
bogdanm 0:9b334a45a8ff 491 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 492 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 493 * @param Timeout: Timeout value in millisecond.
bogdanm 0:9b334a45a8ff 494 * @retval HAL status
bogdanm 0:9b334a45a8ff 495 */
bogdanm 0:9b334a45a8ff 496 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 497 {
bogdanm 0:9b334a45a8ff 498 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 499
bogdanm 0:9b334a45a8ff 500 /* Verification that ADC configuration is compliant with polling for */
bogdanm 0:9b334a45a8ff 501 /* each conversion: */
bogdanm 0:9b334a45a8ff 502 /* Particular case is ADC configured in DMA mode and ADC sequencer with */
bogdanm 0:9b334a45a8ff 503 /* several ranks and polling for end of each conversion. */
bogdanm 0:9b334a45a8ff 504 /* For code simplicity sake, this particular case is generalized to */
bogdanm 0:9b334a45a8ff 505 /* ADC configured in DMA mode and polling for end of each conversion. */
bogdanm 0:9b334a45a8ff 506 if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
bogdanm 0:9b334a45a8ff 507 HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
bogdanm 0:9b334a45a8ff 508 {
bogdanm 0:9b334a45a8ff 509 /* Update ADC state machine to error */
bogdanm 0:9b334a45a8ff 510 hadc->State = HAL_ADC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 /* Process unlocked */
bogdanm 0:9b334a45a8ff 513 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 516 }
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518 /* Get tick */
bogdanm 0:9b334a45a8ff 519 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521 /* Check End of conversion flag */
bogdanm 0:9b334a45a8ff 522 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
bogdanm 0:9b334a45a8ff 523 {
bogdanm 0:9b334a45a8ff 524 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 525 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 526 {
bogdanm 0:9b334a45a8ff 527 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 528 {
bogdanm 0:9b334a45a8ff 529 hadc->State= HAL_ADC_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 530 /* Process unlocked */
bogdanm 0:9b334a45a8ff 531 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 532 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 533 }
bogdanm 0:9b334a45a8ff 534 }
bogdanm 0:9b334a45a8ff 535 }
bogdanm 0:9b334a45a8ff 536
bogdanm 0:9b334a45a8ff 537 /* Check if an injected conversion is ready */
bogdanm 0:9b334a45a8ff 538 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
bogdanm 0:9b334a45a8ff 539 {
bogdanm 0:9b334a45a8ff 540 /* Change ADC state */
bogdanm 0:9b334a45a8ff 541 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
bogdanm 0:9b334a45a8ff 542 }
bogdanm 0:9b334a45a8ff 543 else
bogdanm 0:9b334a45a8ff 544 {
bogdanm 0:9b334a45a8ff 545 /* Change ADC state */
bogdanm 0:9b334a45a8ff 546 hadc->State = HAL_ADC_STATE_EOC_REG;
bogdanm 0:9b334a45a8ff 547 }
bogdanm 0:9b334a45a8ff 548
bogdanm 0:9b334a45a8ff 549 /* Return ADC state */
bogdanm 0:9b334a45a8ff 550 return HAL_OK;
bogdanm 0:9b334a45a8ff 551 }
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553 /**
bogdanm 0:9b334a45a8ff 554 * @brief Poll for conversion event
bogdanm 0:9b334a45a8ff 555 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 556 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 557 * @param EventType: the ADC event type.
bogdanm 0:9b334a45a8ff 558 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 559 * @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
bogdanm 0:9b334a45a8ff 560 * @arg ADC_OVR_EVENT: ADC Overrun event.
bogdanm 0:9b334a45a8ff 561 * @param Timeout: Timeout value in millisecond.
bogdanm 0:9b334a45a8ff 562 * @retval HAL status
bogdanm 0:9b334a45a8ff 563 */
bogdanm 0:9b334a45a8ff 564 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 565 {
bogdanm 0:9b334a45a8ff 566 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 567
bogdanm 0:9b334a45a8ff 568 /* Check the parameters */
bogdanm 0:9b334a45a8ff 569 assert_param(IS_ADC_EVENT_TYPE(EventType));
bogdanm 0:9b334a45a8ff 570
bogdanm 0:9b334a45a8ff 571 /* Get tick */
bogdanm 0:9b334a45a8ff 572 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 573
bogdanm 0:9b334a45a8ff 574 /* Check selected event flag */
bogdanm 0:9b334a45a8ff 575 while(!(__HAL_ADC_GET_FLAG(hadc,EventType)))
bogdanm 0:9b334a45a8ff 576 {
bogdanm 0:9b334a45a8ff 577 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 578 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 579 {
bogdanm 0:9b334a45a8ff 580 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 581 {
bogdanm 0:9b334a45a8ff 582 hadc->State= HAL_ADC_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 583 /* Process unlocked */
bogdanm 0:9b334a45a8ff 584 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 585 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 586 }
bogdanm 0:9b334a45a8ff 587 }
bogdanm 0:9b334a45a8ff 588 }
bogdanm 0:9b334a45a8ff 589
bogdanm 0:9b334a45a8ff 590 /* Check analog watchdog flag */
bogdanm 0:9b334a45a8ff 591 if(EventType == ADC_AWD_EVENT)
bogdanm 0:9b334a45a8ff 592 {
bogdanm 0:9b334a45a8ff 593 /* Change ADC state */
bogdanm 0:9b334a45a8ff 594 hadc->State = HAL_ADC_STATE_AWD;
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /* Clear the ADCx's analog watchdog flag */
bogdanm 0:9b334a45a8ff 597 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
bogdanm 0:9b334a45a8ff 598 }
bogdanm 0:9b334a45a8ff 599 else
bogdanm 0:9b334a45a8ff 600 {
bogdanm 0:9b334a45a8ff 601 /* Change ADC state */
bogdanm 0:9b334a45a8ff 602 hadc->State = HAL_ADC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 603
bogdanm 0:9b334a45a8ff 604 /* Clear the ADCx's Overrun flag */
bogdanm 0:9b334a45a8ff 605 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 606 }
bogdanm 0:9b334a45a8ff 607
bogdanm 0:9b334a45a8ff 608 /* Return ADC state */
bogdanm 0:9b334a45a8ff 609 return HAL_OK;
bogdanm 0:9b334a45a8ff 610 }
bogdanm 0:9b334a45a8ff 611
bogdanm 0:9b334a45a8ff 612
bogdanm 0:9b334a45a8ff 613 /**
bogdanm 0:9b334a45a8ff 614 * @brief Enables the interrupt and starts ADC conversion of regular channels.
bogdanm 0:9b334a45a8ff 615 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 616 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 617 * @retval HAL status.
bogdanm 0:9b334a45a8ff 618 */
bogdanm 0:9b334a45a8ff 619 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 620 {
bogdanm 0:9b334a45a8ff 621 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 /* Check the parameters */
bogdanm 0:9b334a45a8ff 624 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 625 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 /* Process locked */
bogdanm 0:9b334a45a8ff 628 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 629
bogdanm 0:9b334a45a8ff 630 /* Check if an injected conversion is ongoing */
bogdanm 0:9b334a45a8ff 631 if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
bogdanm 0:9b334a45a8ff 632 {
bogdanm 0:9b334a45a8ff 633 /* Change ADC state */
bogdanm 0:9b334a45a8ff 634 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
bogdanm 0:9b334a45a8ff 635 }
bogdanm 0:9b334a45a8ff 636 else
bogdanm 0:9b334a45a8ff 637 {
bogdanm 0:9b334a45a8ff 638 /* Change ADC state */
bogdanm 0:9b334a45a8ff 639 hadc->State = HAL_ADC_STATE_BUSY_REG;
bogdanm 0:9b334a45a8ff 640 }
bogdanm 0:9b334a45a8ff 641
bogdanm 0:9b334a45a8ff 642 /* Set ADC error code to none */
bogdanm 0:9b334a45a8ff 643 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 644
bogdanm 0:9b334a45a8ff 645 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 646 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 647 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 648 {
bogdanm 0:9b334a45a8ff 649 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 650 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 651
bogdanm 0:9b334a45a8ff 652 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 653 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 654 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 655 while(counter != 0)
bogdanm 0:9b334a45a8ff 656 {
bogdanm 0:9b334a45a8ff 657 counter--;
bogdanm 0:9b334a45a8ff 658 }
bogdanm 0:9b334a45a8ff 659 }
bogdanm 0:9b334a45a8ff 660
bogdanm 0:9b334a45a8ff 661 /* Enable the ADC overrun interrupt */
bogdanm 0:9b334a45a8ff 662 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 663
bogdanm 0:9b334a45a8ff 664 /* Enable the ADC end of conversion interrupt for regular group */
bogdanm 0:9b334a45a8ff 665 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
bogdanm 0:9b334a45a8ff 666
bogdanm 0:9b334a45a8ff 667 /* Process unlocked */
bogdanm 0:9b334a45a8ff 668 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 669
bogdanm 0:9b334a45a8ff 670 /* Check if Multimode enabled */
bogdanm 0:9b334a45a8ff 671 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
bogdanm 0:9b334a45a8ff 672 {
bogdanm 0:9b334a45a8ff 673 /* if no external trigger present enable software conversion of regular channels */
bogdanm 0:9b334a45a8ff 674 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
bogdanm 0:9b334a45a8ff 675 {
bogdanm 0:9b334a45a8ff 676 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 677 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
bogdanm 0:9b334a45a8ff 678 }
bogdanm 0:9b334a45a8ff 679 }
bogdanm 0:9b334a45a8ff 680 else
bogdanm 0:9b334a45a8ff 681 {
bogdanm 0:9b334a45a8ff 682 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
bogdanm 0:9b334a45a8ff 683 if((hadc->Instance == (ADC_TypeDef*)0x40012000) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
bogdanm 0:9b334a45a8ff 684 {
bogdanm 0:9b334a45a8ff 685 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 686 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
bogdanm 0:9b334a45a8ff 687 }
bogdanm 0:9b334a45a8ff 688 }
bogdanm 0:9b334a45a8ff 689
bogdanm 0:9b334a45a8ff 690 /* Return function status */
bogdanm 0:9b334a45a8ff 691 return HAL_OK;
bogdanm 0:9b334a45a8ff 692 }
bogdanm 0:9b334a45a8ff 693
bogdanm 0:9b334a45a8ff 694 /**
bogdanm 0:9b334a45a8ff 695 * @brief Disables the interrupt and stop ADC conversion of regular channels.
bogdanm 0:9b334a45a8ff 696 *
bogdanm 0:9b334a45a8ff 697 * @note Caution: This function will stop also injected channels.
bogdanm 0:9b334a45a8ff 698 *
bogdanm 0:9b334a45a8ff 699 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 700 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 701 * @retval HAL status.
bogdanm 0:9b334a45a8ff 702 */
bogdanm 0:9b334a45a8ff 703 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 704 {
bogdanm 0:9b334a45a8ff 705 /* Disable the ADC end of conversion interrupt for regular group */
bogdanm 0:9b334a45a8ff 706 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708 /* Disable the ADC end of conversion interrupt for injected group */
bogdanm 0:9b334a45a8ff 709 __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE);
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 712 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 713
bogdanm 0:9b334a45a8ff 714 /* Change ADC state */
bogdanm 0:9b334a45a8ff 715 hadc->State = HAL_ADC_STATE_READY;
bogdanm 0:9b334a45a8ff 716
bogdanm 0:9b334a45a8ff 717 /* Return function status */
bogdanm 0:9b334a45a8ff 718 return HAL_OK;
bogdanm 0:9b334a45a8ff 719 }
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /**
bogdanm 0:9b334a45a8ff 722 * @brief Handles ADC interrupt request
bogdanm 0:9b334a45a8ff 723 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 724 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 725 * @retval None
bogdanm 0:9b334a45a8ff 726 */
bogdanm 0:9b334a45a8ff 727 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 728 {
bogdanm 0:9b334a45a8ff 729 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 730
bogdanm 0:9b334a45a8ff 731 /* Check the parameters */
bogdanm 0:9b334a45a8ff 732 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 733 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
bogdanm 0:9b334a45a8ff 734 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
bogdanm 0:9b334a45a8ff 735
bogdanm 0:9b334a45a8ff 736 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
bogdanm 0:9b334a45a8ff 737 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
bogdanm 0:9b334a45a8ff 738 /* Check End of conversion flag for regular channels */
bogdanm 0:9b334a45a8ff 739 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 740 {
bogdanm 0:9b334a45a8ff 741 /* Check if an injected conversion is ready */
bogdanm 0:9b334a45a8ff 742 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
bogdanm 0:9b334a45a8ff 743 {
bogdanm 0:9b334a45a8ff 744 /* Change ADC state */
bogdanm 0:9b334a45a8ff 745 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
bogdanm 0:9b334a45a8ff 746 }
bogdanm 0:9b334a45a8ff 747 else
bogdanm 0:9b334a45a8ff 748 {
bogdanm 0:9b334a45a8ff 749 /* Change ADC state */
bogdanm 0:9b334a45a8ff 750 hadc->State = HAL_ADC_STATE_EOC_REG;
bogdanm 0:9b334a45a8ff 751 }
bogdanm 0:9b334a45a8ff 752
bogdanm 0:9b334a45a8ff 753 if((hadc->Init.ContinuousConvMode == DISABLE) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
bogdanm 0:9b334a45a8ff 754 {
bogdanm 0:9b334a45a8ff 755 if(hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
bogdanm 0:9b334a45a8ff 756 {
bogdanm 0:9b334a45a8ff 757 /* DISABLE the ADC end of conversion interrupt for regular group */
bogdanm 0:9b334a45a8ff 758 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
bogdanm 0:9b334a45a8ff 759
bogdanm 0:9b334a45a8ff 760 /* DISABLE the ADC overrun interrupt */
bogdanm 0:9b334a45a8ff 761 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 762 }
bogdanm 0:9b334a45a8ff 763 else
bogdanm 0:9b334a45a8ff 764 {
bogdanm 0:9b334a45a8ff 765 if (hadc->NbrOfCurrentConversionRank == 0)
bogdanm 0:9b334a45a8ff 766 {
bogdanm 0:9b334a45a8ff 767 hadc->NbrOfCurrentConversionRank = hadc->Init.NbrOfConversion;
bogdanm 0:9b334a45a8ff 768 }
bogdanm 0:9b334a45a8ff 769
bogdanm 0:9b334a45a8ff 770 /* Decrement the number of conversion when an interrupt occurs */
bogdanm 0:9b334a45a8ff 771 hadc->NbrOfCurrentConversionRank--;
bogdanm 0:9b334a45a8ff 772
bogdanm 0:9b334a45a8ff 773 /* Check if all conversions are finished */
bogdanm 0:9b334a45a8ff 774 if(hadc->NbrOfCurrentConversionRank == 0)
bogdanm 0:9b334a45a8ff 775 {
bogdanm 0:9b334a45a8ff 776 /* DISABLE the ADC end of conversion interrupt for regular group */
bogdanm 0:9b334a45a8ff 777 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /* DISABLE the ADC overrun interrupt */
bogdanm 0:9b334a45a8ff 780 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 781 }
bogdanm 0:9b334a45a8ff 782 }
bogdanm 0:9b334a45a8ff 783 }
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 786 HAL_ADC_ConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 787
bogdanm 0:9b334a45a8ff 788 /* Clear the ADCx flag for regular end of conversion */
bogdanm 0:9b334a45a8ff 789 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_EOC);
bogdanm 0:9b334a45a8ff 790 }
bogdanm 0:9b334a45a8ff 791
bogdanm 0:9b334a45a8ff 792 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
bogdanm 0:9b334a45a8ff 793 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);
bogdanm 0:9b334a45a8ff 794 /* Check End of conversion flag for injected channels */
bogdanm 0:9b334a45a8ff 795 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 796 {
bogdanm 0:9b334a45a8ff 797 /* Check if a regular conversion is ready */
bogdanm 0:9b334a45a8ff 798 if(hadc->State == HAL_ADC_STATE_EOC_REG)
bogdanm 0:9b334a45a8ff 799 {
bogdanm 0:9b334a45a8ff 800 /* Change ADC state */
bogdanm 0:9b334a45a8ff 801 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
bogdanm 0:9b334a45a8ff 802 }
bogdanm 0:9b334a45a8ff 803 else
bogdanm 0:9b334a45a8ff 804 {
bogdanm 0:9b334a45a8ff 805 /* Change ADC state */
bogdanm 0:9b334a45a8ff 806 hadc->State = HAL_ADC_STATE_EOC_INJ;
bogdanm 0:9b334a45a8ff 807 }
bogdanm 0:9b334a45a8ff 808
bogdanm 0:9b334a45a8ff 809 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
bogdanm 0:9b334a45a8ff 810 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
bogdanm 0:9b334a45a8ff 811 if(((hadc->Init.ContinuousConvMode == DISABLE) || tmp1) && tmp2)
bogdanm 0:9b334a45a8ff 812 {
bogdanm 0:9b334a45a8ff 813 /* DISABLE the ADC end of conversion interrupt for injected group */
bogdanm 0:9b334a45a8ff 814 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
bogdanm 0:9b334a45a8ff 815 }
bogdanm 0:9b334a45a8ff 816
bogdanm 0:9b334a45a8ff 817 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 818 HAL_ADCEx_InjectedConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 819
bogdanm 0:9b334a45a8ff 820 /* Clear the ADCx flag for injected end of conversion */
bogdanm 0:9b334a45a8ff 821 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC);
bogdanm 0:9b334a45a8ff 822 }
bogdanm 0:9b334a45a8ff 823
bogdanm 0:9b334a45a8ff 824 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
bogdanm 0:9b334a45a8ff 825 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);
bogdanm 0:9b334a45a8ff 826 /* Check Analog watchdog flag */
bogdanm 0:9b334a45a8ff 827 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 828 {
bogdanm 0:9b334a45a8ff 829 /* Change ADC state */
bogdanm 0:9b334a45a8ff 830 hadc->State = HAL_ADC_STATE_AWD;
bogdanm 0:9b334a45a8ff 831
bogdanm 0:9b334a45a8ff 832 /* Clear the ADCx's Analog watchdog flag */
bogdanm 0:9b334a45a8ff 833 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD);
bogdanm 0:9b334a45a8ff 834
bogdanm 0:9b334a45a8ff 835 /* Level out of window callback */
bogdanm 0:9b334a45a8ff 836 HAL_ADC_LevelOutOfWindowCallback(hadc);
bogdanm 0:9b334a45a8ff 837 }
bogdanm 0:9b334a45a8ff 838
bogdanm 0:9b334a45a8ff 839 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 840 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 841 /* Check Overrun flag */
bogdanm 0:9b334a45a8ff 842 if(tmp1 && tmp2)
bogdanm 0:9b334a45a8ff 843 {
bogdanm 0:9b334a45a8ff 844 /* Change ADC state to overrun state */
bogdanm 0:9b334a45a8ff 845 hadc->State = HAL_ADC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 846
bogdanm 0:9b334a45a8ff 847 /* Set ADC error code to overrun */
bogdanm 0:9b334a45a8ff 848 hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
bogdanm 0:9b334a45a8ff 849
bogdanm 0:9b334a45a8ff 850 /* Clear the Overrun flag */
bogdanm 0:9b334a45a8ff 851 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_OVR);
bogdanm 0:9b334a45a8ff 852
bogdanm 0:9b334a45a8ff 853 /* Error callback */
bogdanm 0:9b334a45a8ff 854 HAL_ADC_ErrorCallback(hadc);
bogdanm 0:9b334a45a8ff 855 }
bogdanm 0:9b334a45a8ff 856 }
bogdanm 0:9b334a45a8ff 857
bogdanm 0:9b334a45a8ff 858 /**
bogdanm 0:9b334a45a8ff 859 * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
bogdanm 0:9b334a45a8ff 860 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 861 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 862 * @param pData: The destination Buffer address.
bogdanm 0:9b334a45a8ff 863 * @param Length: The length of data to be transferred from ADC peripheral to memory.
bogdanm 0:9b334a45a8ff 864 * @retval HAL status
bogdanm 0:9b334a45a8ff 865 */
bogdanm 0:9b334a45a8ff 866 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
bogdanm 0:9b334a45a8ff 867 {
bogdanm 0:9b334a45a8ff 868 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 869
bogdanm 0:9b334a45a8ff 870 /* Check the parameters */
bogdanm 0:9b334a45a8ff 871 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 872 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 873
bogdanm 0:9b334a45a8ff 874 /* Process locked */
bogdanm 0:9b334a45a8ff 875 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 876
bogdanm 0:9b334a45a8ff 877 /* Enable ADC overrun interrupt */
bogdanm 0:9b334a45a8ff 878 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 879
bogdanm 0:9b334a45a8ff 880 /* Enable ADC DMA mode */
bogdanm 0:9b334a45a8ff 881 hadc->Instance->CR2 |= ADC_CR2_DMA;
bogdanm 0:9b334a45a8ff 882
bogdanm 0:9b334a45a8ff 883 /* Set the DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 884 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
bogdanm 0:9b334a45a8ff 885
bogdanm 0:9b334a45a8ff 886 /* Set the DMA half transfer complete callback */
bogdanm 0:9b334a45a8ff 887 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
bogdanm 0:9b334a45a8ff 888
bogdanm 0:9b334a45a8ff 889 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 890 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
bogdanm 0:9b334a45a8ff 891
bogdanm 0:9b334a45a8ff 892 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 893 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
bogdanm 0:9b334a45a8ff 894
bogdanm 0:9b334a45a8ff 895 /* Change ADC state */
bogdanm 0:9b334a45a8ff 896 hadc->State = HAL_ADC_STATE_BUSY_REG;
bogdanm 0:9b334a45a8ff 897
bogdanm 0:9b334a45a8ff 898 /* Process unlocked */
bogdanm 0:9b334a45a8ff 899 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 900
bogdanm 0:9b334a45a8ff 901 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 902 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 903 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 904 {
bogdanm 0:9b334a45a8ff 905 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 906 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 907
bogdanm 0:9b334a45a8ff 908 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 909 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 910 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 911 while(counter != 0)
bogdanm 0:9b334a45a8ff 912 {
bogdanm 0:9b334a45a8ff 913 counter--;
bogdanm 0:9b334a45a8ff 914 }
bogdanm 0:9b334a45a8ff 915 }
bogdanm 0:9b334a45a8ff 916
bogdanm 0:9b334a45a8ff 917 /* if no external trigger present enable software conversion of regular channels */
bogdanm 0:9b334a45a8ff 918 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
bogdanm 0:9b334a45a8ff 919 {
bogdanm 0:9b334a45a8ff 920 /* Enable the selected ADC software conversion for regular group */
bogdanm 0:9b334a45a8ff 921 hadc->Instance->CR2 |= ADC_CR2_SWSTART;
bogdanm 0:9b334a45a8ff 922 }
bogdanm 0:9b334a45a8ff 923
bogdanm 0:9b334a45a8ff 924 /* Return function status */
bogdanm 0:9b334a45a8ff 925 return HAL_OK;
bogdanm 0:9b334a45a8ff 926 }
bogdanm 0:9b334a45a8ff 927
bogdanm 0:9b334a45a8ff 928 /**
bogdanm 0:9b334a45a8ff 929 * @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
bogdanm 0:9b334a45a8ff 930 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 931 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 932 * @retval HAL status
bogdanm 0:9b334a45a8ff 933 */
bogdanm 0:9b334a45a8ff 934 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 935 {
bogdanm 0:9b334a45a8ff 936 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 937 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 /* Disable ADC overrun interrupt */
bogdanm 0:9b334a45a8ff 940 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
bogdanm 0:9b334a45a8ff 941
bogdanm 0:9b334a45a8ff 942 /* Disable the selected ADC DMA mode */
bogdanm 0:9b334a45a8ff 943 hadc->Instance->CR2 &= ~ADC_CR2_DMA;
bogdanm 0:9b334a45a8ff 944
bogdanm 0:9b334a45a8ff 945 /* Disable the ADC DMA Stream */
bogdanm 0:9b334a45a8ff 946 HAL_DMA_Abort(hadc->DMA_Handle);
bogdanm 0:9b334a45a8ff 947
bogdanm 0:9b334a45a8ff 948 /* Change ADC state */
bogdanm 0:9b334a45a8ff 949 hadc->State = HAL_ADC_STATE_READY;
bogdanm 0:9b334a45a8ff 950
bogdanm 0:9b334a45a8ff 951 /* Return function status */
bogdanm 0:9b334a45a8ff 952 return HAL_OK;
bogdanm 0:9b334a45a8ff 953 }
bogdanm 0:9b334a45a8ff 954
bogdanm 0:9b334a45a8ff 955 /**
bogdanm 0:9b334a45a8ff 956 * @brief Gets the converted value from data register of regular channel.
bogdanm 0:9b334a45a8ff 957 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 958 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 959 * @retval Converted value
bogdanm 0:9b334a45a8ff 960 */
bogdanm 0:9b334a45a8ff 961 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 962 {
bogdanm 0:9b334a45a8ff 963 /* Return the selected ADC converted value */
bogdanm 0:9b334a45a8ff 964 return hadc->Instance->DR;
bogdanm 0:9b334a45a8ff 965 }
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /**
bogdanm 0:9b334a45a8ff 968 * @brief Regular conversion complete callback in non blocking mode
bogdanm 0:9b334a45a8ff 969 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 970 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 971 * @retval None
bogdanm 0:9b334a45a8ff 972 */
bogdanm 0:9b334a45a8ff 973 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 974 {
bogdanm 0:9b334a45a8ff 975 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 976 the HAL_ADC_ConvCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 977 */
bogdanm 0:9b334a45a8ff 978 }
bogdanm 0:9b334a45a8ff 979
bogdanm 0:9b334a45a8ff 980 /**
bogdanm 0:9b334a45a8ff 981 * @brief Regular conversion half DMA transfer callback in non blocking mode
bogdanm 0:9b334a45a8ff 982 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 983 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 984 * @retval None
bogdanm 0:9b334a45a8ff 985 */
bogdanm 0:9b334a45a8ff 986 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 987 {
bogdanm 0:9b334a45a8ff 988 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 989 the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 990 */
bogdanm 0:9b334a45a8ff 991 }
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 /**
bogdanm 0:9b334a45a8ff 994 * @brief Analog watchdog callback in non blocking mode
bogdanm 0:9b334a45a8ff 995 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 996 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 997 * @retval None
bogdanm 0:9b334a45a8ff 998 */
bogdanm 0:9b334a45a8ff 999 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1000 {
bogdanm 0:9b334a45a8ff 1001 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1002 the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1003 */
bogdanm 0:9b334a45a8ff 1004 }
bogdanm 0:9b334a45a8ff 1005
bogdanm 0:9b334a45a8ff 1006 /**
bogdanm 0:9b334a45a8ff 1007 * @brief Error ADC callback.
bogdanm 0:9b334a45a8ff 1008 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1009 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1010 * @retval None
bogdanm 0:9b334a45a8ff 1011 */
bogdanm 0:9b334a45a8ff 1012 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
bogdanm 0:9b334a45a8ff 1013 {
bogdanm 0:9b334a45a8ff 1014 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1015 the HAL_ADC_ErrorCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1016 */
bogdanm 0:9b334a45a8ff 1017 }
bogdanm 0:9b334a45a8ff 1018
bogdanm 0:9b334a45a8ff 1019 /**
bogdanm 0:9b334a45a8ff 1020 * @}
bogdanm 0:9b334a45a8ff 1021 */
bogdanm 0:9b334a45a8ff 1022
bogdanm 0:9b334a45a8ff 1023 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 1024 * @brief Peripheral Control functions
bogdanm 0:9b334a45a8ff 1025 *
bogdanm 0:9b334a45a8ff 1026 @verbatim
bogdanm 0:9b334a45a8ff 1027 ===============================================================================
bogdanm 0:9b334a45a8ff 1028 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 1029 ===============================================================================
bogdanm 0:9b334a45a8ff 1030 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 1031 (+) Configure regular channels.
bogdanm 0:9b334a45a8ff 1032 (+) Configure injected channels.
bogdanm 0:9b334a45a8ff 1033 (+) Configure multimode.
bogdanm 0:9b334a45a8ff 1034 (+) Configure the analog watch dog.
bogdanm 0:9b334a45a8ff 1035
bogdanm 0:9b334a45a8ff 1036 @endverbatim
bogdanm 0:9b334a45a8ff 1037 * @{
bogdanm 0:9b334a45a8ff 1038 */
bogdanm 0:9b334a45a8ff 1039
bogdanm 0:9b334a45a8ff 1040 /**
bogdanm 0:9b334a45a8ff 1041 * @brief Configures for the selected ADC regular channel its corresponding
bogdanm 0:9b334a45a8ff 1042 * rank in the sequencer and its sample time.
bogdanm 0:9b334a45a8ff 1043 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1044 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1045 * @param sConfig: ADC configuration structure.
bogdanm 0:9b334a45a8ff 1046 * @retval HAL status
bogdanm 0:9b334a45a8ff 1047 */
bogdanm 0:9b334a45a8ff 1048 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
bogdanm 0:9b334a45a8ff 1049 {
bogdanm 0:9b334a45a8ff 1050 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 1051
bogdanm 0:9b334a45a8ff 1052 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1053 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
bogdanm 0:9b334a45a8ff 1054 assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
bogdanm 0:9b334a45a8ff 1055 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
bogdanm 0:9b334a45a8ff 1056
bogdanm 0:9b334a45a8ff 1057 /* Process locked */
bogdanm 0:9b334a45a8ff 1058 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 1059
bogdanm 0:9b334a45a8ff 1060 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
bogdanm 0:9b334a45a8ff 1061 if (sConfig->Channel > ADC_CHANNEL_9)
bogdanm 0:9b334a45a8ff 1062 {
bogdanm 0:9b334a45a8ff 1063 /* Clear the old sample time */
bogdanm 0:9b334a45a8ff 1064 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
bogdanm 0:9b334a45a8ff 1065
bogdanm 0:9b334a45a8ff 1066 /* Set the new sample time */
bogdanm 0:9b334a45a8ff 1067 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
bogdanm 0:9b334a45a8ff 1068 }
bogdanm 0:9b334a45a8ff 1069 else /* ADC_Channel include in ADC_Channel_[0..9] */
bogdanm 0:9b334a45a8ff 1070 {
bogdanm 0:9b334a45a8ff 1071 /* Clear the old sample time */
bogdanm 0:9b334a45a8ff 1072 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
bogdanm 0:9b334a45a8ff 1073
bogdanm 0:9b334a45a8ff 1074 /* Set the new sample time */
bogdanm 0:9b334a45a8ff 1075 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
bogdanm 0:9b334a45a8ff 1076 }
bogdanm 0:9b334a45a8ff 1077
bogdanm 0:9b334a45a8ff 1078 /* For Rank 1 to 6 */
bogdanm 0:9b334a45a8ff 1079 if (sConfig->Rank < 7)
bogdanm 0:9b334a45a8ff 1080 {
bogdanm 0:9b334a45a8ff 1081 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1082 hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1083
bogdanm 0:9b334a45a8ff 1084 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1085 hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1086 }
bogdanm 0:9b334a45a8ff 1087 /* For Rank 7 to 12 */
bogdanm 0:9b334a45a8ff 1088 else if (sConfig->Rank < 13)
bogdanm 0:9b334a45a8ff 1089 {
bogdanm 0:9b334a45a8ff 1090 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1091 hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1092
bogdanm 0:9b334a45a8ff 1093 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1094 hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1095 }
bogdanm 0:9b334a45a8ff 1096 /* For Rank 13 to 16 */
bogdanm 0:9b334a45a8ff 1097 else
bogdanm 0:9b334a45a8ff 1098 {
bogdanm 0:9b334a45a8ff 1099 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1100 hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1103 hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
bogdanm 0:9b334a45a8ff 1104 }
bogdanm 0:9b334a45a8ff 1105
bogdanm 0:9b334a45a8ff 1106 /* if ADC1 Channel_18 is selected enable VBAT Channel */
bogdanm 0:9b334a45a8ff 1107 if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
bogdanm 0:9b334a45a8ff 1108 {
bogdanm 0:9b334a45a8ff 1109 /* Enable the VBAT channel*/
bogdanm 0:9b334a45a8ff 1110 ADC->CCR |= ADC_CCR_VBATE;
bogdanm 0:9b334a45a8ff 1111 }
bogdanm 0:9b334a45a8ff 1112
bogdanm 0:9b334a45a8ff 1113 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
bogdanm 0:9b334a45a8ff 1114 if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
bogdanm 0:9b334a45a8ff 1115 {
bogdanm 0:9b334a45a8ff 1116 /* Enable the TSVREFE channel*/
bogdanm 0:9b334a45a8ff 1117 ADC->CCR |= ADC_CCR_TSVREFE;
bogdanm 0:9b334a45a8ff 1118
bogdanm 0:9b334a45a8ff 1119 if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
bogdanm 0:9b334a45a8ff 1120 {
bogdanm 0:9b334a45a8ff 1121 /* Delay for temperature sensor stabilization time */
bogdanm 0:9b334a45a8ff 1122 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 1123 counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 1124 while(counter != 0)
bogdanm 0:9b334a45a8ff 1125 {
bogdanm 0:9b334a45a8ff 1126 counter--;
bogdanm 0:9b334a45a8ff 1127 }
bogdanm 0:9b334a45a8ff 1128 }
bogdanm 0:9b334a45a8ff 1129 }
bogdanm 0:9b334a45a8ff 1130
bogdanm 0:9b334a45a8ff 1131 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1132 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1133
bogdanm 0:9b334a45a8ff 1134 /* Return function status */
bogdanm 0:9b334a45a8ff 1135 return HAL_OK;
bogdanm 0:9b334a45a8ff 1136 }
bogdanm 0:9b334a45a8ff 1137
bogdanm 0:9b334a45a8ff 1138 /**
bogdanm 0:9b334a45a8ff 1139 * @brief Configures the analog watchdog.
bogdanm 0:9b334a45a8ff 1140 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1141 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1142 * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure
bogdanm 0:9b334a45a8ff 1143 * that contains the configuration information of ADC analog watchdog.
bogdanm 0:9b334a45a8ff 1144 * @retval HAL status
bogdanm 0:9b334a45a8ff 1145 */
bogdanm 0:9b334a45a8ff 1146 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
bogdanm 0:9b334a45a8ff 1147 {
bogdanm 0:9b334a45a8ff 1148 #ifdef USE_FULL_ASSERT
bogdanm 0:9b334a45a8ff 1149 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 1150 #endif /* USE_FULL_ASSERT */
bogdanm 0:9b334a45a8ff 1151
bogdanm 0:9b334a45a8ff 1152 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1153 assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode));
bogdanm 0:9b334a45a8ff 1154 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
bogdanm 0:9b334a45a8ff 1155 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
bogdanm 0:9b334a45a8ff 1156
bogdanm 0:9b334a45a8ff 1157 #ifdef USE_FULL_ASSERT
bogdanm 0:9b334a45a8ff 1158 tmp = ADC_GET_RESOLUTION(hadc);
bogdanm 0:9b334a45a8ff 1159 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold));
bogdanm 0:9b334a45a8ff 1160 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold));
bogdanm 0:9b334a45a8ff 1161 #endif /* USE_FULL_ASSERT */
bogdanm 0:9b334a45a8ff 1162
bogdanm 0:9b334a45a8ff 1163 /* Process locked */
bogdanm 0:9b334a45a8ff 1164 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 1165
bogdanm 0:9b334a45a8ff 1166 if(AnalogWDGConfig->ITMode == ENABLE)
bogdanm 0:9b334a45a8ff 1167 {
bogdanm 0:9b334a45a8ff 1168 /* Enable the ADC Analog watchdog interrupt */
bogdanm 0:9b334a45a8ff 1169 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
bogdanm 0:9b334a45a8ff 1170 }
bogdanm 0:9b334a45a8ff 1171 else
bogdanm 0:9b334a45a8ff 1172 {
bogdanm 0:9b334a45a8ff 1173 /* Disable the ADC Analog watchdog interrupt */
bogdanm 0:9b334a45a8ff 1174 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
bogdanm 0:9b334a45a8ff 1175 }
bogdanm 0:9b334a45a8ff 1176
bogdanm 0:9b334a45a8ff 1177 /* Clear AWDEN, JAWDEN and AWDSGL bits */
bogdanm 0:9b334a45a8ff 1178 hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN | ADC_CR1_AWDEN);
bogdanm 0:9b334a45a8ff 1179
bogdanm 0:9b334a45a8ff 1180 /* Set the analog watchdog enable mode */
bogdanm 0:9b334a45a8ff 1181 hadc->Instance->CR1 |= AnalogWDGConfig->WatchdogMode;
bogdanm 0:9b334a45a8ff 1182
bogdanm 0:9b334a45a8ff 1183 /* Set the high threshold */
bogdanm 0:9b334a45a8ff 1184 hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
bogdanm 0:9b334a45a8ff 1185
bogdanm 0:9b334a45a8ff 1186 /* Set the low threshold */
bogdanm 0:9b334a45a8ff 1187 hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
bogdanm 0:9b334a45a8ff 1188
bogdanm 0:9b334a45a8ff 1189 /* Clear the Analog watchdog channel select bits */
bogdanm 0:9b334a45a8ff 1190 hadc->Instance->CR1 &= ~ADC_CR1_AWDCH;
bogdanm 0:9b334a45a8ff 1191
bogdanm 0:9b334a45a8ff 1192 /* Set the Analog watchdog channel */
bogdanm 0:9b334a45a8ff 1193 hadc->Instance->CR1 |= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel));
bogdanm 0:9b334a45a8ff 1194
bogdanm 0:9b334a45a8ff 1195 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1196 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1197
bogdanm 0:9b334a45a8ff 1198 /* Return function status */
bogdanm 0:9b334a45a8ff 1199 return HAL_OK;
bogdanm 0:9b334a45a8ff 1200 }
bogdanm 0:9b334a45a8ff 1201
bogdanm 0:9b334a45a8ff 1202 /**
bogdanm 0:9b334a45a8ff 1203 * @}
bogdanm 0:9b334a45a8ff 1204 */
bogdanm 0:9b334a45a8ff 1205
bogdanm 0:9b334a45a8ff 1206 /** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions
bogdanm 0:9b334a45a8ff 1207 * @brief ADC Peripheral State functions
bogdanm 0:9b334a45a8ff 1208 *
bogdanm 0:9b334a45a8ff 1209 @verbatim
bogdanm 0:9b334a45a8ff 1210 ===============================================================================
bogdanm 0:9b334a45a8ff 1211 ##### Peripheral State and errors functions #####
bogdanm 0:9b334a45a8ff 1212 ===============================================================================
bogdanm 0:9b334a45a8ff 1213 [..]
bogdanm 0:9b334a45a8ff 1214 This subsection provides functions allowing to
bogdanm 0:9b334a45a8ff 1215 (+) Check the ADC state
bogdanm 0:9b334a45a8ff 1216 (+) Check the ADC Error
bogdanm 0:9b334a45a8ff 1217
bogdanm 0:9b334a45a8ff 1218 @endverbatim
bogdanm 0:9b334a45a8ff 1219 * @{
bogdanm 0:9b334a45a8ff 1220 */
bogdanm 0:9b334a45a8ff 1221
bogdanm 0:9b334a45a8ff 1222 /**
bogdanm 0:9b334a45a8ff 1223 * @brief return the ADC state
bogdanm 0:9b334a45a8ff 1224 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1225 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1226 * @retval HAL state
bogdanm 0:9b334a45a8ff 1227 */
bogdanm 0:9b334a45a8ff 1228 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1229 {
bogdanm 0:9b334a45a8ff 1230 /* Return ADC state */
bogdanm 0:9b334a45a8ff 1231 return hadc->State;
bogdanm 0:9b334a45a8ff 1232 }
bogdanm 0:9b334a45a8ff 1233
bogdanm 0:9b334a45a8ff 1234 /**
bogdanm 0:9b334a45a8ff 1235 * @brief Return the ADC error code
bogdanm 0:9b334a45a8ff 1236 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1237 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1238 * @retval ADC Error Code
bogdanm 0:9b334a45a8ff 1239 */
bogdanm 0:9b334a45a8ff 1240 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
bogdanm 0:9b334a45a8ff 1241 {
bogdanm 0:9b334a45a8ff 1242 return hadc->ErrorCode;
bogdanm 0:9b334a45a8ff 1243 }
bogdanm 0:9b334a45a8ff 1244
bogdanm 0:9b334a45a8ff 1245 /**
bogdanm 0:9b334a45a8ff 1246 * @}
bogdanm 0:9b334a45a8ff 1247 */
bogdanm 0:9b334a45a8ff 1248
bogdanm 0:9b334a45a8ff 1249 /**
bogdanm 0:9b334a45a8ff 1250 * @}
bogdanm 0:9b334a45a8ff 1251 */
bogdanm 0:9b334a45a8ff 1252
bogdanm 0:9b334a45a8ff 1253 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1254
bogdanm 0:9b334a45a8ff 1255 /** @defgroup ADC_Private_Functions ADC Private Functions
bogdanm 0:9b334a45a8ff 1256 * @{
bogdanm 0:9b334a45a8ff 1257 */
bogdanm 0:9b334a45a8ff 1258
bogdanm 0:9b334a45a8ff 1259 /**
bogdanm 0:9b334a45a8ff 1260 * @brief Initializes the ADCx peripheral according to the specified parameters
bogdanm 0:9b334a45a8ff 1261 * in the ADC_InitStruct without initializing the ADC MSP.
bogdanm 0:9b334a45a8ff 1262 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1263 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 1264 * @retval None
bogdanm 0:9b334a45a8ff 1265 */
bogdanm 0:9b334a45a8ff 1266 static void ADC_Init(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 1267 {
bogdanm 0:9b334a45a8ff 1268 /* Set ADC parameters */
bogdanm 0:9b334a45a8ff 1269 /* Set the ADC clock prescaler */
bogdanm 0:9b334a45a8ff 1270 ADC->CCR &= ~(ADC_CCR_ADCPRE);
bogdanm 0:9b334a45a8ff 1271 ADC->CCR |= hadc->Init.ClockPrescaler;
bogdanm 0:9b334a45a8ff 1272
bogdanm 0:9b334a45a8ff 1273 /* Set ADC scan mode */
bogdanm 0:9b334a45a8ff 1274 hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
bogdanm 0:9b334a45a8ff 1275 hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
bogdanm 0:9b334a45a8ff 1276
bogdanm 0:9b334a45a8ff 1277 /* Set ADC resolution */
bogdanm 0:9b334a45a8ff 1278 hadc->Instance->CR1 &= ~(ADC_CR1_RES);
bogdanm 0:9b334a45a8ff 1279 hadc->Instance->CR1 |= hadc->Init.Resolution;
bogdanm 0:9b334a45a8ff 1280
bogdanm 0:9b334a45a8ff 1281 /* Set ADC data alignment */
bogdanm 0:9b334a45a8ff 1282 hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
bogdanm 0:9b334a45a8ff 1283 hadc->Instance->CR2 |= hadc->Init.DataAlign;
bogdanm 0:9b334a45a8ff 1284
bogdanm 0:9b334a45a8ff 1285 /* Enable external trigger if trigger selection is different of software */
bogdanm 0:9b334a45a8ff 1286 /* start. */
bogdanm 0:9b334a45a8ff 1287 /* Note: This configuration keeps the hardware feature of parameter */
bogdanm 0:9b334a45a8ff 1288 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
bogdanm 0:9b334a45a8ff 1289 /* software start. */
bogdanm 0:9b334a45a8ff 1290 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
bogdanm 0:9b334a45a8ff 1291 {
bogdanm 0:9b334a45a8ff 1292 /* Select external trigger to start conversion */
bogdanm 0:9b334a45a8ff 1293 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
bogdanm 0:9b334a45a8ff 1294 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
bogdanm 0:9b334a45a8ff 1295
bogdanm 0:9b334a45a8ff 1296 /* Select external trigger polarity */
bogdanm 0:9b334a45a8ff 1297 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
bogdanm 0:9b334a45a8ff 1298 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
bogdanm 0:9b334a45a8ff 1299 }
bogdanm 0:9b334a45a8ff 1300 else
bogdanm 0:9b334a45a8ff 1301 {
bogdanm 0:9b334a45a8ff 1302 /* Reset the external trigger */
bogdanm 0:9b334a45a8ff 1303 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
bogdanm 0:9b334a45a8ff 1304 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
bogdanm 0:9b334a45a8ff 1305 }
bogdanm 0:9b334a45a8ff 1306
bogdanm 0:9b334a45a8ff 1307 /* Enable or disable ADC continuous conversion mode */
bogdanm 0:9b334a45a8ff 1308 hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
bogdanm 0:9b334a45a8ff 1309 hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode);
bogdanm 0:9b334a45a8ff 1310
bogdanm 0:9b334a45a8ff 1311 if(hadc->Init.DiscontinuousConvMode != DISABLE)
bogdanm 0:9b334a45a8ff 1312 {
bogdanm 0:9b334a45a8ff 1313 assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
bogdanm 0:9b334a45a8ff 1314
bogdanm 0:9b334a45a8ff 1315 /* Enable the selected ADC regular discontinuous mode */
bogdanm 0:9b334a45a8ff 1316 hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
bogdanm 0:9b334a45a8ff 1317
bogdanm 0:9b334a45a8ff 1318 /* Set the number of channels to be converted in discontinuous mode */
bogdanm 0:9b334a45a8ff 1319 hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
bogdanm 0:9b334a45a8ff 1320 hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
bogdanm 0:9b334a45a8ff 1321 }
bogdanm 0:9b334a45a8ff 1322 else
bogdanm 0:9b334a45a8ff 1323 {
bogdanm 0:9b334a45a8ff 1324 /* Disable the selected ADC regular discontinuous mode */
bogdanm 0:9b334a45a8ff 1325 hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
bogdanm 0:9b334a45a8ff 1326 }
bogdanm 0:9b334a45a8ff 1327
bogdanm 0:9b334a45a8ff 1328 /* Set ADC number of conversion */
bogdanm 0:9b334a45a8ff 1329 hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
bogdanm 0:9b334a45a8ff 1330 hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion);
bogdanm 0:9b334a45a8ff 1331
bogdanm 0:9b334a45a8ff 1332 /* Enable or disable ADC DMA continuous request */
bogdanm 0:9b334a45a8ff 1333 hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
bogdanm 0:9b334a45a8ff 1334 hadc->Instance->CR2 |= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests);
bogdanm 0:9b334a45a8ff 1335
bogdanm 0:9b334a45a8ff 1336 /* Enable or disable ADC end of conversion selection */
bogdanm 0:9b334a45a8ff 1337 hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
bogdanm 0:9b334a45a8ff 1338 hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
bogdanm 0:9b334a45a8ff 1339 }
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 /**
bogdanm 0:9b334a45a8ff 1342 * @brief DMA transfer complete callback.
bogdanm 0:9b334a45a8ff 1343 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1344 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1345 * @retval None
bogdanm 0:9b334a45a8ff 1346 */
bogdanm 0:9b334a45a8ff 1347 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1348 {
bogdanm 0:9b334a45a8ff 1349 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1350
bogdanm 0:9b334a45a8ff 1351 /* Check if an injected conversion is ready */
bogdanm 0:9b334a45a8ff 1352 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
bogdanm 0:9b334a45a8ff 1353 {
bogdanm 0:9b334a45a8ff 1354 /* Change ADC state */
bogdanm 0:9b334a45a8ff 1355 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
bogdanm 0:9b334a45a8ff 1356 }
bogdanm 0:9b334a45a8ff 1357 else
bogdanm 0:9b334a45a8ff 1358 {
bogdanm 0:9b334a45a8ff 1359 /* Change ADC state */
bogdanm 0:9b334a45a8ff 1360 hadc->State = HAL_ADC_STATE_EOC_REG;
bogdanm 0:9b334a45a8ff 1361 }
bogdanm 0:9b334a45a8ff 1362
bogdanm 0:9b334a45a8ff 1363 HAL_ADC_ConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 1364 }
bogdanm 0:9b334a45a8ff 1365
bogdanm 0:9b334a45a8ff 1366 /**
bogdanm 0:9b334a45a8ff 1367 * @brief DMA half transfer complete callback.
bogdanm 0:9b334a45a8ff 1368 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1369 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1370 * @retval None
bogdanm 0:9b334a45a8ff 1371 */
bogdanm 0:9b334a45a8ff 1372 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1373 {
bogdanm 0:9b334a45a8ff 1374 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1375 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 1376 HAL_ADC_ConvHalfCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 1377 }
bogdanm 0:9b334a45a8ff 1378
bogdanm 0:9b334a45a8ff 1379 /**
bogdanm 0:9b334a45a8ff 1380 * @brief DMA error callback
bogdanm 0:9b334a45a8ff 1381 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1382 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1383 * @retval None
bogdanm 0:9b334a45a8ff 1384 */
bogdanm 0:9b334a45a8ff 1385 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1386 {
bogdanm 0:9b334a45a8ff 1387 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1388 hadc->State= HAL_ADC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 1389 /* Set ADC error code to DMA error */
bogdanm 0:9b334a45a8ff 1390 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1391 HAL_ADC_ErrorCallback(hadc);
bogdanm 0:9b334a45a8ff 1392 }
bogdanm 0:9b334a45a8ff 1393
bogdanm 0:9b334a45a8ff 1394
bogdanm 0:9b334a45a8ff 1395 /**
bogdanm 0:9b334a45a8ff 1396 * @}
bogdanm 0:9b334a45a8ff 1397 */
bogdanm 0:9b334a45a8ff 1398
bogdanm 0:9b334a45a8ff 1399 #endif /* HAL_ADC_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1400 /**
bogdanm 0:9b334a45a8ff 1401 * @}
bogdanm 0:9b334a45a8ff 1402 */
bogdanm 0:9b334a45a8ff 1403
bogdanm 0:9b334a45a8ff 1404 /**
bogdanm 0:9b334a45a8ff 1405 * @}
bogdanm 0:9b334a45a8ff 1406 */
bogdanm 0:9b334a45a8ff 1407
bogdanm 0:9b334a45a8ff 1408 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/