Sergey Solodunov / mbed-dev

Fork of mbed-dev by mbed official

Committer:
mbed_official
Date:
Sat Jan 30 17:00:10 2016 +0000
Revision:
57:791e51e3acc9
Parent:
0:9b334a45a8ff
Child:
82:98895dd43cc3
Synchronized with git revision 01e730cfb2fe9d1404668ad1b4d9a2877b3abdda

Full URL: https://github.com/mbedmicro/mbed/commit/01e730cfb2fe9d1404668ad1b4d9a2877b3abdda/

[LPC11U68, LPC1549] Fixed PwmOut SCT Bugs

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16
bogdanm 0:9b334a45a8ff 17 #include "pwmout_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #if DEVICE_PWMOUT
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 #define SCT_CHANNELS 2
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 static const PinMap PinMap_PWM[] = {
bogdanm 0:9b334a45a8ff 27 {P1_19, SCT0_0, 2},
bogdanm 0:9b334a45a8ff 28 {P2_2 , SCT0_1, 3},
bogdanm 0:9b334a45a8ff 29 {P2_7 , SCT0_2, 2},
bogdanm 0:9b334a45a8ff 30 {P1_13, SCT0_3, 2},
bogdanm 0:9b334a45a8ff 31 {P2_16, SCT1_0, 1},
bogdanm 0:9b334a45a8ff 32 {P2_17, SCT1_1, 1},
bogdanm 0:9b334a45a8ff 33 {P2_18, SCT1_2, 1},
bogdanm 0:9b334a45a8ff 34 {P2_19, SCT1_3, 1},
bogdanm 0:9b334a45a8ff 35 {NC , NC ,0}
bogdanm 0:9b334a45a8ff 36 };
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 static LPC_SCT0_Type *SCTs[SCT_CHANNELS] = {
bogdanm 0:9b334a45a8ff 40 (LPC_SCT0_Type*)LPC_SCT0,
bogdanm 0:9b334a45a8ff 41 (LPC_SCT0_Type*)LPC_SCT1,
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 };
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 // bit flags for used SCTs
bogdanm 0:9b334a45a8ff 46 static unsigned char sct_used = 0;
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 static int get_available_sct(void) {
bogdanm 0:9b334a45a8ff 49 int i;
bogdanm 0:9b334a45a8ff 50 for (i=0; i<SCT_CHANNELS; i++) {
bogdanm 0:9b334a45a8ff 51 if ((sct_used & (1 << i)) == 0)
bogdanm 0:9b334a45a8ff 52 return i;
bogdanm 0:9b334a45a8ff 53 }
bogdanm 0:9b334a45a8ff 54 return -1;
bogdanm 0:9b334a45a8ff 55 }
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 void pwmout_init(pwmout_t* obj, PinName pin) {
bogdanm 0:9b334a45a8ff 58 // determine the SPI to use
bogdanm 0:9b334a45a8ff 59 PWMName pwm_mapped = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
bogdanm 0:9b334a45a8ff 60 if (pwm_mapped == (PWMName)NC) {
bogdanm 0:9b334a45a8ff 61 error("PwmOut pin mapping failed");
bogdanm 0:9b334a45a8ff 62 }
bogdanm 0:9b334a45a8ff 63 int sct_n = get_available_sct();
bogdanm 0:9b334a45a8ff 64 if (sct_n == -1) {
bogdanm 0:9b334a45a8ff 65 error("No available SCT");
bogdanm 0:9b334a45a8ff 66 }
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 sct_used |= (1 << sct_n);
bogdanm 0:9b334a45a8ff 69 obj->pwm = SCTs[sct_n];
bogdanm 0:9b334a45a8ff 70 obj->pwm_ch = sct_n;
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 // Enable the SCT clock
bogdanm 0:9b334a45a8ff 73 LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 31);
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 // Clear peripheral reset the SCT:
bogdanm 0:9b334a45a8ff 76 LPC_SYSCON->PRESETCTRL |= (1 << (obj->pwm_ch + 9));
bogdanm 0:9b334a45a8ff 77 pinmap_pinout(pin, PinMap_PWM);
bogdanm 0:9b334a45a8ff 78 LPC_SCT0_Type* pwm = obj->pwm;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 // Unified 32-bit counter, autolimit
bogdanm 0:9b334a45a8ff 81 pwm->CONFIG |= ((0x3 << 17) | 0x01);
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 // halt and clear the counter
bogdanm 0:9b334a45a8ff 84 pwm->CTRL |= (1 << 2) | (1 << 3);
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 switch(pwm_mapped) {
bogdanm 0:9b334a45a8ff 87 case SCT0_0:
bogdanm 0:9b334a45a8ff 88 case SCT1_0:
bogdanm 0:9b334a45a8ff 89 pwm->OUT0_SET = (1 << 0); // event 0
bogdanm 0:9b334a45a8ff 90 pwm->OUT0_CLR = (1 << 1); // event 1
bogdanm 0:9b334a45a8ff 91 break;
bogdanm 0:9b334a45a8ff 92 case SCT0_1:
bogdanm 0:9b334a45a8ff 93 case SCT1_1:
bogdanm 0:9b334a45a8ff 94 pwm->OUT1_SET = (1 << 0); // event 0
bogdanm 0:9b334a45a8ff 95 pwm->OUT1_CLR = (1 << 1); // event 1
bogdanm 0:9b334a45a8ff 96 break;
bogdanm 0:9b334a45a8ff 97 case SCT0_2:
bogdanm 0:9b334a45a8ff 98 case SCT1_2:
bogdanm 0:9b334a45a8ff 99 pwm->OUT2_SET = (1 << 0); // event 0
bogdanm 0:9b334a45a8ff 100 pwm->OUT2_CLR = (1 << 1); // event 1
bogdanm 0:9b334a45a8ff 101 break;
bogdanm 0:9b334a45a8ff 102 case SCT0_3:
bogdanm 0:9b334a45a8ff 103 case SCT1_3:
bogdanm 0:9b334a45a8ff 104 pwm->OUT3_SET = (1 << 0); // event 0
bogdanm 0:9b334a45a8ff 105 pwm->OUT3_CLR = (1 << 1); // event 1
bogdanm 0:9b334a45a8ff 106 break;
bogdanm 0:9b334a45a8ff 107 default:
bogdanm 0:9b334a45a8ff 108 break;
bogdanm 0:9b334a45a8ff 109 }
bogdanm 0:9b334a45a8ff 110 // Event 0 : MATCH and MATCHSEL=0
bogdanm 0:9b334a45a8ff 111 pwm->EV0_CTRL = (1 << 12);
bogdanm 0:9b334a45a8ff 112 pwm->EV0_STATE = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 113 // Event 1 : MATCH and MATCHSEL=1
bogdanm 0:9b334a45a8ff 114 pwm->EV1_CTRL = (1 << 12) | (1 << 0);
bogdanm 0:9b334a45a8ff 115 pwm->EV1_STATE = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 // default to 20ms: standard for servos, and fine for e.g. brightness control
bogdanm 0:9b334a45a8ff 118 pwmout_period_ms(obj, 20);
bogdanm 0:9b334a45a8ff 119 pwmout_write (obj, 0);
bogdanm 0:9b334a45a8ff 120 }
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 void pwmout_free(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 123 sct_used &= ~(1 << obj->pwm_ch);
bogdanm 0:9b334a45a8ff 124 if (sct_used == 0) {
bogdanm 0:9b334a45a8ff 125 // Disable the SCT clock
bogdanm 0:9b334a45a8ff 126 LPC_SYSCON->SYSAHBCLKCTRL &= ~(1UL << 31);
bogdanm 0:9b334a45a8ff 127 }
bogdanm 0:9b334a45a8ff 128 }
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 void pwmout_write(pwmout_t* obj, float value) {
mbed_official 57:791e51e3acc9 131 LPC_SCT0_Type* pwm = obj->pwm;
bogdanm 0:9b334a45a8ff 132 if (value < 0.0f) {
bogdanm 0:9b334a45a8ff 133 value = 0.0;
bogdanm 0:9b334a45a8ff 134 } else if (value > 1.0f) {
bogdanm 0:9b334a45a8ff 135 value = 1.0;
bogdanm 0:9b334a45a8ff 136 }
mbed_official 57:791e51e3acc9 137 uint32_t t_on = (uint32_t)((float)(pwm->MATCHREL0 + 1) * value);
mbed_official 57:791e51e3acc9 138 if (t_on > 0) {
mbed_official 57:791e51e3acc9 139 pwm->MATCHREL1 = t_on - 1;
mbed_official 57:791e51e3acc9 140 pwm->CTRL &= ~(1 << 2);
mbed_official 57:791e51e3acc9 141 } else {
mbed_official 57:791e51e3acc9 142 pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 57:791e51e3acc9 143 pwm->OUTPUT = 0x00000000;
mbed_official 57:791e51e3acc9 144 }
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 float pwmout_read(pwmout_t* obj) {
mbed_official 57:791e51e3acc9 148 uint32_t t_off = obj->pwm->MATCHREL0 + 1;
mbed_official 57:791e51e3acc9 149 uint32_t t_on = obj->pwm->MATCHREL1 + 1;
bogdanm 0:9b334a45a8ff 150 float v = (float)t_on/(float)t_off;
bogdanm 0:9b334a45a8ff 151 return (v > 1.0f) ? (1.0f) : (v);
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 void pwmout_period(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 155 pwmout_period_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 156 }
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 void pwmout_period_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 159 pwmout_period_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 // Set the PWM period, keeping the duty cycle the same.
bogdanm 0:9b334a45a8ff 163 void pwmout_period_us(pwmout_t* obj, int us) {
mbed_official 57:791e51e3acc9 164 LPC_SCT0_Type* pwm = obj->pwm;
mbed_official 57:791e51e3acc9 165 uint32_t t_off = pwm->MATCHREL0 + 1;
mbed_official 57:791e51e3acc9 166 uint32_t t_on = pwm->MATCHREL1 + 1;
bogdanm 0:9b334a45a8ff 167 float v = (float)t_on/(float)t_off;
mbed_official 57:791e51e3acc9 168 uint32_t period_ticks = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000);
mbed_official 57:791e51e3acc9 169 uint32_t pulsewidth_ticks = period_ticks * v;
mbed_official 57:791e51e3acc9 170 pwm->MATCHREL0 = period_ticks - 1;
mbed_official 57:791e51e3acc9 171 if (pulsewidth_ticks > 0) {
mbed_official 57:791e51e3acc9 172 pwm->MATCHREL1 = pulsewidth_ticks - 1;
mbed_official 57:791e51e3acc9 173 pwm->CTRL &= ~(1 << 2);
mbed_official 57:791e51e3acc9 174 } else {
mbed_official 57:791e51e3acc9 175 pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 57:791e51e3acc9 176 pwm->OUTPUT = 0x00000000;
mbed_official 57:791e51e3acc9 177 }
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 181 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 182 }
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 185 pwmout_pulsewidth_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
mbed_official 57:791e51e3acc9 189 LPC_SCT0_Type* pwm = obj->pwm;
mbed_official 57:791e51e3acc9 190 if (us > 0) {
mbed_official 57:791e51e3acc9 191 pwm->MATCHREL1 = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000) - 1;
mbed_official 57:791e51e3acc9 192 pwm->CTRL &= ~(1 << 2);
mbed_official 57:791e51e3acc9 193 } else {
mbed_official 57:791e51e3acc9 194 pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 57:791e51e3acc9 195 pwm->OUTPUT = 0x00000000;
mbed_official 57:791e51e3acc9 196 }
bogdanm 0:9b334a45a8ff 197 }
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 #endif