VL53L0X_Condensed2 - Greatly simplified Architecture, Identical Functi…

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Greatly simplified Architecture, Identical Functions Removed: Platform Interfaces, STP6001 interface

VL53L0X.cpp@7:3a1115c2556b, 2019-06-20 (annotated)

Committer:: sepp_nepp
Date:: Thu Jun 20 12:54:25 2019 +0000
Revision:: 7:3a1115c2556b
Parent:: 6:fb11b746ceb5
Child:: 8:2fd7cb217068

Removed all notions of device handle. The class is the device, and the device is the class. This is the base strategy of object oriented programming!; Then flattened the Device properties hierarchy. ; Removed Functions that are "not implemented".

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User	Revision	Line number	New contents of line
sepp_nepp	6:fb11b746ceb5	1	/**
sepp_nepp	6:fb11b746ceb5	2	******************************************************************************
sepp_nepp	6:fb11b746ceb5	3	* @file VL53L0X_class.cpp
sepp_nepp	6:fb11b746ceb5	4	* @author IMG
sepp_nepp	6:fb11b746ceb5	5	* @version V0.0.1
sepp_nepp	6:fb11b746ceb5	6	* @date 28-June-2016
sepp_nepp	6:fb11b746ceb5	7	* @brief Implementation file for the VL53L0X driver class
sepp_nepp	6:fb11b746ceb5	8	******************************************************************************
sepp_nepp	6:fb11b746ceb5	9	* @attention
sepp_nepp	6:fb11b746ceb5	10	*
sepp_nepp	6:fb11b746ceb5	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sepp_nepp	6:fb11b746ceb5	12	*
sepp_nepp	6:fb11b746ceb5	13	* Redistribution and use in source and binary forms, with or without modification,
sepp_nepp	6:fb11b746ceb5	14	* are permitted provided that the following conditions are met:
sepp_nepp	6:fb11b746ceb5	15	* 1. Redistributions of source code must retain the above copyright notice,
sepp_nepp	6:fb11b746ceb5	16	* this list of conditions and the following disclaimer.
sepp_nepp	6:fb11b746ceb5	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
sepp_nepp	6:fb11b746ceb5	18	* this list of conditions and the following disclaimer in the documentation
sepp_nepp	6:fb11b746ceb5	19	* and/or other materials provided with the distribution.
sepp_nepp	6:fb11b746ceb5	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sepp_nepp	6:fb11b746ceb5	21	* may be used to endorse or promote products derived from this software
sepp_nepp	6:fb11b746ceb5	22	* without specific prior written permission.
sepp_nepp	6:fb11b746ceb5	23	*
sepp_nepp	6:fb11b746ceb5	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sepp_nepp	6:fb11b746ceb5	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sepp_nepp	6:fb11b746ceb5	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sepp_nepp	6:fb11b746ceb5	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sepp_nepp	6:fb11b746ceb5	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sepp_nepp	6:fb11b746ceb5	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sepp_nepp	6:fb11b746ceb5	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sepp_nepp	6:fb11b746ceb5	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sepp_nepp	6:fb11b746ceb5	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sepp_nepp	6:fb11b746ceb5	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sepp_nepp	6:fb11b746ceb5	34	*
sepp_nepp	6:fb11b746ceb5	35	******************************************************************************
sepp_nepp	6:fb11b746ceb5	36	*/
sepp_nepp	6:fb11b746ceb5	37
sepp_nepp	6:fb11b746ceb5	38	/* Includes */
sepp_nepp	6:fb11b746ceb5	39	#include <stdlib.h>
sepp_nepp	6:fb11b746ceb5	40	#include "VL53L0X.h"
sepp_nepp	6:fb11b746ceb5	41
sepp_nepp	6:fb11b746ceb5	42
sepp_nepp	6:fb11b746ceb5	43	int VL53L0X::read_id(uint8_t *id)
sepp_nepp	6:fb11b746ceb5	44	{
sepp_nepp	6:fb11b746ceb5	45	int status = 0;
sepp_nepp	6:fb11b746ceb5	46	uint16_t rl_id = 0;
sepp_nepp	6:fb11b746ceb5	47
sepp_nepp	7:3a1115c2556b	48	status = VL53L0X_read_word(VL53L0X_REG_IDENTIFICATION_MODEL_ID, &rl_id);
sepp_nepp	6:fb11b746ceb5	49	if (rl_id == 0xEEAA) {
sepp_nepp	6:fb11b746ceb5	50	return status;
sepp_nepp	6:fb11b746ceb5	51	}
sepp_nepp	6:fb11b746ceb5	52	return -1;
sepp_nepp	6:fb11b746ceb5	53	}
sepp_nepp	6:fb11b746ceb5	54
sepp_nepp	6:fb11b746ceb5	55
sepp_nepp	6:fb11b746ceb5	56
sepp_nepp	6:fb11b746ceb5	57	int VL53L0X::init_sensor(uint8_t new_addr)
sepp_nepp	6:fb11b746ceb5	58	{ int status;
sepp_nepp	6:fb11b746ceb5	59
sepp_nepp	6:fb11b746ceb5	60	VL53L0X_off();
sepp_nepp	6:fb11b746ceb5	61	VL53L0X_on();
sepp_nepp	6:fb11b746ceb5	62
sepp_nepp	6:fb11b746ceb5	63	// status=VL53L0X_WaitDeviceBooted(Device);
sepp_nepp	6:fb11b746ceb5	64	// if(status)
sepp_nepp	6:fb11b746ceb5	65	// printf("WaitDeviceBooted fail\n\r");
sepp_nepp	6:fb11b746ceb5	66
sepp_nepp	6:fb11b746ceb5	67	// Verify if the device is actually present
sepp_nepp	6:fb11b746ceb5	68	uint8_t id = 0;
sepp_nepp	6:fb11b746ceb5	69	status = read_id(&id);
sepp_nepp	6:fb11b746ceb5	70	if (status != 0) {
sepp_nepp	6:fb11b746ceb5	71	printf("VL53L0X sensor is not present!\n\r");
sepp_nepp	6:fb11b746ceb5	72	return 99; } // device is not present
sepp_nepp	6:fb11b746ceb5	73
sepp_nepp	7:3a1115c2556b	74	status = VL53L0X_data_init();
sepp_nepp	6:fb11b746ceb5	75	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	76	printf("Failed to init VL53L0X sensor!\n\r");
sepp_nepp	6:fb11b746ceb5	77	return status;
sepp_nepp	6:fb11b746ceb5	78	}
sepp_nepp	6:fb11b746ceb5	79
sepp_nepp	6:fb11b746ceb5	80	// deduce silicon version
sepp_nepp	7:3a1115c2556b	81	status = VL53L0X_get_device_info(&_device_info);
sepp_nepp	6:fb11b746ceb5	82
sepp_nepp	6:fb11b746ceb5	83	status = prepare();
sepp_nepp	6:fb11b746ceb5	84	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	85	printf("Failed to prepare VL53L0X!\n\r");
sepp_nepp	6:fb11b746ceb5	86	return status;
sepp_nepp	6:fb11b746ceb5	87	}
sepp_nepp	6:fb11b746ceb5	88
sepp_nepp	6:fb11b746ceb5	89	if (new_addr != VL53L0X_DEFAULT_ADDRESS) {
sepp_nepp	6:fb11b746ceb5	90	status = set_device_address(new_addr);
sepp_nepp	6:fb11b746ceb5	91	if (status) {
sepp_nepp	6:fb11b746ceb5	92	printf("Failed to change I2C address!\n\r");
sepp_nepp	6:fb11b746ceb5	93	return status;
sepp_nepp	6:fb11b746ceb5	94	}
sepp_nepp	6:fb11b746ceb5	95	}
sepp_nepp	6:fb11b746ceb5	96
sepp_nepp	6:fb11b746ceb5	97	return status;
sepp_nepp	6:fb11b746ceb5	98	}
sepp_nepp	6:fb11b746ceb5	99
sepp_nepp	7:3a1115c2556b	100	VL53L0X_Error VL53L0X::VL53L0X_data_init(void)
sepp_nepp	6:fb11b746ceb5	101	{
sepp_nepp	6:fb11b746ceb5	102	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	103	VL53L0X_DeviceParameters_t CurrentParameters;
sepp_nepp	6:fb11b746ceb5	104	int i;
sepp_nepp	6:fb11b746ceb5	105	uint8_t StopVariable;
sepp_nepp	6:fb11b746ceb5	106
sepp_nepp	6:fb11b746ceb5	107	/* by default the I2C is running at 1V8 if you want to change it you
sepp_nepp	6:fb11b746ceb5	108	* need to include this define at compilation level. */
sepp_nepp	6:fb11b746ceb5	109	#ifdef USE_I2C_2V8
sepp_nepp	7:3a1115c2556b	110	Status = VL53L0X_UpdateByte(
sepp_nepp	6:fb11b746ceb5	111	VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV,
sepp_nepp	6:fb11b746ceb5	112	0xFE,0x01);
sepp_nepp	6:fb11b746ceb5	113	#endif
sepp_nepp	6:fb11b746ceb5	114
sepp_nepp	6:fb11b746ceb5	115	/* Set I2C standard mode */
sepp_nepp	6:fb11b746ceb5	116	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	117	status = VL53L0X_write_byte( 0x88, 0x00);
sepp_nepp	6:fb11b746ceb5	118	}
sepp_nepp	6:fb11b746ceb5	119
sepp_nepp	7:3a1115c2556b	120	VL53L0X_SETDEVICESPECIFICPARAMETER( ReadDataFromDeviceDone, 0);
sepp_nepp	6:fb11b746ceb5	121
sepp_nepp	6:fb11b746ceb5	122	#ifdef USE_IQC_STATION
sepp_nepp	6:fb11b746ceb5	123	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	124	Status = VL53L0X_apply_offset_adjustment();
sepp_nepp	6:fb11b746ceb5	125	}
sepp_nepp	6:fb11b746ceb5	126	#endif
sepp_nepp	6:fb11b746ceb5	127
sepp_nepp	6:fb11b746ceb5	128	/* Default value is 1000 for Linearity Corrective Gain */
sepp_nepp	7:3a1115c2556b	129	PALDevDataSet( LinearityCorrectiveGain, 1000);
sepp_nepp	6:fb11b746ceb5	130
sepp_nepp	6:fb11b746ceb5	131	/* Dmax default Parameter */
sepp_nepp	7:3a1115c2556b	132	PALDevDataSet( DmaxCalRangeMilliMeter, 400);
sepp_nepp	7:3a1115c2556b	133	PALDevDataSet( DmaxCalSignalRateRtnMegaCps,
sepp_nepp	6:fb11b746ceb5	134	(FixPoint1616_t)((0x00016B85))); /* 1.42 No Cover Glass*/
sepp_nepp	6:fb11b746ceb5	135
sepp_nepp	6:fb11b746ceb5	136	/* Set Default static parameters
sepp_nepp	6:fb11b746ceb5	137	set first temporary values 9.44MHz 65536 = 618660 */
sepp_nepp	7:3a1115c2556b	138	VL53L0X_SETDEVICESPECIFICPARAMETER( OscFrequencyMHz, 618660);
sepp_nepp	6:fb11b746ceb5	139
sepp_nepp	6:fb11b746ceb5	140	/* Set Default XTalkCompensationRateMegaCps to 0 */
sepp_nepp	7:3a1115c2556b	141	VL53L0X_SETPARAMETERFIELD( XTalkCompensationRateMegaCps, 0);
sepp_nepp	6:fb11b746ceb5	142
sepp_nepp	6:fb11b746ceb5	143	/* Get default parameters */
sepp_nepp	7:3a1115c2556b	144	status = VL53L0X_get_device_parameters( &CurrentParameters);
sepp_nepp	6:fb11b746ceb5	145	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	146	/* initialize PAL values */
sepp_nepp	6:fb11b746ceb5	147	CurrentParameters.DeviceMode = VL53L0X_DEVICEMODE_SINGLE_RANGING;
sepp_nepp	6:fb11b746ceb5	148	CurrentParameters.HistogramMode = VL53L0X_HISTOGRAMMODE_DISABLED;
sepp_nepp	7:3a1115c2556b	149	PALDevDataSet( CurrentParameters, CurrentParameters);
sepp_nepp	6:fb11b746ceb5	150	}
sepp_nepp	6:fb11b746ceb5	151
sepp_nepp	6:fb11b746ceb5	152	/* Sigma estimator variable */
sepp_nepp	7:3a1115c2556b	153	PALDevDataSet( SigmaEstRefArray, 100);
sepp_nepp	7:3a1115c2556b	154	PALDevDataSet( SigmaEstEffPulseWidth, 900);
sepp_nepp	7:3a1115c2556b	155	PALDevDataSet( SigmaEstEffAmbWidth, 500);
sepp_nepp	7:3a1115c2556b	156	PALDevDataSet( targetRefRate, 0x0A00); /* 20 MCPS in 9:7 format */
sepp_nepp	6:fb11b746ceb5	157
sepp_nepp	6:fb11b746ceb5	158	/* Use internal default settings */
sepp_nepp	7:3a1115c2556b	159	PALDevDataSet( UseInternalTuningSettings, 1);
sepp_nepp	7:3a1115c2556b	160
sepp_nepp	7:3a1115c2556b	161	status \|= VL53L0X_write_byte( 0x80, 0x01);
sepp_nepp	7:3a1115c2556b	162	status \|= VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	163	status \|= VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	164	status \|= VL53L0X_read_byte( 0x91, &StopVariable);
sepp_nepp	7:3a1115c2556b	165	PALDevDataSet( StopVariable, StopVariable);
sepp_nepp	7:3a1115c2556b	166	status \|= VL53L0X_write_byte( 0x00, 0x01);
sepp_nepp	7:3a1115c2556b	167	status \|= VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	7:3a1115c2556b	168	status \|= VL53L0X_write_byte( 0x80, 0x00);
sepp_nepp	6:fb11b746ceb5	169
sepp_nepp	6:fb11b746ceb5	170	/* Enable all check */
sepp_nepp	6:fb11b746ceb5	171	for (i = 0; i < VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS; i++) {
sepp_nepp	6:fb11b746ceb5	172	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	173	status \|= VL53L0X_set_limit_check_enable( i, 1);
sepp_nepp	6:fb11b746ceb5	174	} else {
sepp_nepp	6:fb11b746ceb5	175	break;
sepp_nepp	6:fb11b746ceb5	176	}
sepp_nepp	6:fb11b746ceb5	177
sepp_nepp	6:fb11b746ceb5	178	}
sepp_nepp	6:fb11b746ceb5	179
sepp_nepp	6:fb11b746ceb5	180	/* Disable the following checks */
sepp_nepp	6:fb11b746ceb5	181	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	182	status = VL53L0X_set_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	183	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, 0);
sepp_nepp	6:fb11b746ceb5	184
sepp_nepp	6:fb11b746ceb5	185	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	186	status = VL53L0X_set_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	187	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD, 0);
sepp_nepp	6:fb11b746ceb5	188
sepp_nepp	6:fb11b746ceb5	189	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	190	status = VL53L0X_set_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	191	VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC, 0);
sepp_nepp	6:fb11b746ceb5	192
sepp_nepp	6:fb11b746ceb5	193	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	194	status = VL53L0X_set_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	195	VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE, 0);
sepp_nepp	6:fb11b746ceb5	196
sepp_nepp	6:fb11b746ceb5	197	/* Limit default values */
sepp_nepp	6:fb11b746ceb5	198	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	199	status = VL53L0X_set_limit_check_value(
sepp_nepp	6:fb11b746ceb5	200	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	201	(FixPoint1616_t)(18 * 65536));
sepp_nepp	6:fb11b746ceb5	202	}
sepp_nepp	6:fb11b746ceb5	203	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	204	status = VL53L0X_set_limit_check_value(
sepp_nepp	6:fb11b746ceb5	205	VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	206	(FixPoint1616_t)(25 * 65536 / 100));
sepp_nepp	6:fb11b746ceb5	207	/* 0.25 * 65536 */
sepp_nepp	6:fb11b746ceb5	208	}
sepp_nepp	6:fb11b746ceb5	209
sepp_nepp	6:fb11b746ceb5	210	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	211	status = VL53L0X_set_limit_check_value(
sepp_nepp	6:fb11b746ceb5	212	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP,
sepp_nepp	6:fb11b746ceb5	213	(FixPoint1616_t)(35 * 65536));
sepp_nepp	6:fb11b746ceb5	214	}
sepp_nepp	6:fb11b746ceb5	215
sepp_nepp	6:fb11b746ceb5	216	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	217	status = VL53L0X_set_limit_check_value(
sepp_nepp	6:fb11b746ceb5	218	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD,
sepp_nepp	6:fb11b746ceb5	219	(FixPoint1616_t)(0 * 65536));
sepp_nepp	6:fb11b746ceb5	220	}
sepp_nepp	6:fb11b746ceb5	221
sepp_nepp	6:fb11b746ceb5	222	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	223
sepp_nepp	7:3a1115c2556b	224	PALDevDataSet( SequenceConfig, 0xFF);
sepp_nepp	7:3a1115c2556b	225	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,0xFF);
sepp_nepp	6:fb11b746ceb5	226
sepp_nepp	6:fb11b746ceb5	227	/* Set PAL state to tell that we are waiting for call to VL53L0X_StaticInit */
sepp_nepp	7:3a1115c2556b	228	PALDevDataSet( PalState, VL53L0X_STATE_WAIT_STATICINIT);
sepp_nepp	6:fb11b746ceb5	229	}
sepp_nepp	6:fb11b746ceb5	230
sepp_nepp	6:fb11b746ceb5	231	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	232	VL53L0X_SETDEVICESPECIFICPARAMETER( RefSpadsInitialised, 0);
sepp_nepp	6:fb11b746ceb5	233	}
sepp_nepp	6:fb11b746ceb5	234
sepp_nepp	6:fb11b746ceb5	235	return status;
sepp_nepp	6:fb11b746ceb5	236	}
sepp_nepp	6:fb11b746ceb5	237
sepp_nepp	6:fb11b746ceb5	238
sepp_nepp	6:fb11b746ceb5	239	int VL53L0X::prepare()
sepp_nepp	6:fb11b746ceb5	240	{
sepp_nepp	6:fb11b746ceb5	241	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	242	uint32_t ref_spad_count;
sepp_nepp	6:fb11b746ceb5	243	uint8_t is_aperture_spads;
sepp_nepp	6:fb11b746ceb5	244	uint8_t vhv_settings;
sepp_nepp	6:fb11b746ceb5	245	uint8_t phase_cal;
sepp_nepp	6:fb11b746ceb5	246
sepp_nepp	6:fb11b746ceb5	247	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	248	//printf("Call of VL53L0X_StaticInit\r\n");
sepp_nepp	7:3a1115c2556b	249	status = VL53L0X_static_init(); // Device Initialization
sepp_nepp	6:fb11b746ceb5	250	}
sepp_nepp	6:fb11b746ceb5	251
sepp_nepp	6:fb11b746ceb5	252	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	253	//printf("Call of VL53L0X_PerformRefCalibration\r\n");
sepp_nepp	7:3a1115c2556b	254	status = VL53L0X_perform_ref_calibration(&vhv_settings, &phase_cal); // Device Initialization
sepp_nepp	6:fb11b746ceb5	255	}
sepp_nepp	6:fb11b746ceb5	256
sepp_nepp	6:fb11b746ceb5	257	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	258	//printf("Call of VL53L0X_PerformRefSpadManagement\r\n");
sepp_nepp	7:3a1115c2556b	259	status = VL53L0X_perform_ref_spad_management(&ref_spad_count, &is_aperture_spads); // Device Initialization
sepp_nepp	6:fb11b746ceb5	260	// printf ("refSpadCount = %d, isApertureSpads = %d\r\n", refSpadCount, isApertureSpads);
sepp_nepp	6:fb11b746ceb5	261	}
sepp_nepp	6:fb11b746ceb5	262
sepp_nepp	6:fb11b746ceb5	263	return status;
sepp_nepp	6:fb11b746ceb5	264	}
sepp_nepp	6:fb11b746ceb5	265
sepp_nepp	6:fb11b746ceb5	266
sepp_nepp	6:fb11b746ceb5	267	int VL53L0X::start_measurement(OperatingMode operating_mode, void (*fptr)(void),
sepp_nepp	6:fb11b746ceb5	268	VL53L0X_RangingConfig rangingConfig)
sepp_nepp	6:fb11b746ceb5	269	{ int Status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	270	int ClrStatus;
sepp_nepp	6:fb11b746ceb5	271
sepp_nepp	6:fb11b746ceb5	272	uint8_t VhvSettings;
sepp_nepp	6:fb11b746ceb5	273	uint8_t PhaseCal;
sepp_nepp	6:fb11b746ceb5	274	// default settings, for normal range.
sepp_nepp	6:fb11b746ceb5	275	FixPoint1616_t signalLimit = (FixPoint1616_t)(0.25 * 65536);
sepp_nepp	6:fb11b746ceb5	276	FixPoint1616_t sigmaLimit = (FixPoint1616_t)(18 * 65536);
sepp_nepp	6:fb11b746ceb5	277	uint32_t timingBudget = 33000;
sepp_nepp	6:fb11b746ceb5	278	uint8_t preRangeVcselPeriod = 14;
sepp_nepp	6:fb11b746ceb5	279	uint8_t finalRangeVcselPeriod = 10;
sepp_nepp	6:fb11b746ceb5	280
sepp_nepp	6:fb11b746ceb5	281	if (operating_mode == range_continuous_interrupt) {
sepp_nepp	6:fb11b746ceb5	282	if (_gpio1Int == NULL) {
sepp_nepp	6:fb11b746ceb5	283	printf("GPIO1 Error\r\n");
sepp_nepp	6:fb11b746ceb5	284	return 1;
sepp_nepp	6:fb11b746ceb5	285	}
sepp_nepp	6:fb11b746ceb5	286
sepp_nepp	7:3a1115c2556b	287	Status = VL53L0X_stop_measurement(); // it is safer to do this while sensor is stopped
sepp_nepp	6:fb11b746ceb5	288
sepp_nepp	6:fb11b746ceb5	289	// Status = VL53L0X_SetInterruptThresholds(Device, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, 0, 300);
sepp_nepp	6:fb11b746ceb5	290
sepp_nepp	7:3a1115c2556b	291	Status = VL53L0X_set_gpio_config(0, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING,
sepp_nepp	6:fb11b746ceb5	292	VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY,
sepp_nepp	6:fb11b746ceb5	293	VL53L0X_INTERRUPTPOLARITY_HIGH);
sepp_nepp	6:fb11b746ceb5	294
sepp_nepp	6:fb11b746ceb5	295	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	296	attach_interrupt_measure_detection_irq(fptr);
sepp_nepp	6:fb11b746ceb5	297	enable_interrupt_measure_detection_irq();
sepp_nepp	6:fb11b746ceb5	298	}
sepp_nepp	6:fb11b746ceb5	299
sepp_nepp	6:fb11b746ceb5	300	ClrStatus = clear_interrupt(VL53L0X_REG_RESULT_INTERRUPT_STATUS \| VL53L0X_REG_RESULT_RANGE_STATUS);
sepp_nepp	6:fb11b746ceb5	301	if (ClrStatus) { Status = 97; } // VL53L0X_ClearErrorInterrupt fail
sepp_nepp	6:fb11b746ceb5	302
sepp_nepp	6:fb11b746ceb5	303	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	304	Status = VL53L0X_set_device_mode(VL53L0X_DEVICEMODE_CONTINUOUS_RANGING); // Setup in continuous ranging mode
sepp_nepp	6:fb11b746ceb5	305	}
sepp_nepp	6:fb11b746ceb5	306
sepp_nepp	6:fb11b746ceb5	307	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	308	Status = VL53L0X_start_measurement();
sepp_nepp	6:fb11b746ceb5	309	}
sepp_nepp	6:fb11b746ceb5	310	}
sepp_nepp	6:fb11b746ceb5	311
sepp_nepp	6:fb11b746ceb5	312	if (operating_mode == range_single_shot_polling) {
sepp_nepp	6:fb11b746ceb5	313	// singelshot, polled ranging
sepp_nepp	6:fb11b746ceb5	314	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	315	// no need to do this when we use VL53L0X_PerformSingleRangingMeasurement
sepp_nepp	7:3a1115c2556b	316	Status = VL53L0X_set_device_mode( VL53L0X_DEVICEMODE_SINGLE_RANGING); // Setup in single ranging mode
sepp_nepp	6:fb11b746ceb5	317	}
sepp_nepp	6:fb11b746ceb5	318
sepp_nepp	6:fb11b746ceb5	319	// Enable/Disable Sigma and Signal check
sepp_nepp	6:fb11b746ceb5	320	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	321	Status = VL53L0X_set_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	322	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, 1);
sepp_nepp	6:fb11b746ceb5	323	}
sepp_nepp	6:fb11b746ceb5	324	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	325	Status = VL53L0X_set_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	326	VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE, 1);
sepp_nepp	6:fb11b746ceb5	327	}
sepp_nepp	6:fb11b746ceb5	328
sepp_nepp	6:fb11b746ceb5	329	/* Preselected Ranging configurations */
sepp_nepp	6:fb11b746ceb5	330	switch(rangingConfig) {
sepp_nepp	6:fb11b746ceb5	331	case Range_Config_DEFAULT:
sepp_nepp	6:fb11b746ceb5	332	// default settings, for normal range.
sepp_nepp	6:fb11b746ceb5	333	signalLimit = (FixPoint1616_t)(0.25 * 65536);
sepp_nepp	6:fb11b746ceb5	334	sigmaLimit = (FixPoint1616_t)(18 * 65536);
sepp_nepp	6:fb11b746ceb5	335	timingBudget = 33000;
sepp_nepp	6:fb11b746ceb5	336	preRangeVcselPeriod = 14;
sepp_nepp	6:fb11b746ceb5	337	finalRangeVcselPeriod = 10;
sepp_nepp	6:fb11b746ceb5	338	break;
sepp_nepp	6:fb11b746ceb5	339	case Range_Config_LONG_RANGE: // *** from mass market cube expansion v1.1, ranging with satellites.
sepp_nepp	6:fb11b746ceb5	340	signalLimit = (FixPoint1616_t)(0.1 * 65536);
sepp_nepp	6:fb11b746ceb5	341	sigmaLimit = (FixPoint1616_t)(60 * 65536);
sepp_nepp	6:fb11b746ceb5	342	timingBudget = 33000;
sepp_nepp	6:fb11b746ceb5	343	preRangeVcselPeriod = 18;
sepp_nepp	6:fb11b746ceb5	344	finalRangeVcselPeriod = 14;
sepp_nepp	6:fb11b746ceb5	345	break;
sepp_nepp	6:fb11b746ceb5	346	case Range_Config_HIGH_ACCURACY:
sepp_nepp	6:fb11b746ceb5	347	signalLimit = (FixPoint1616_t)(0.25*65536);
sepp_nepp	6:fb11b746ceb5	348	sigmaLimit = (FixPoint1616_t)(18*65536);
sepp_nepp	6:fb11b746ceb5	349	timingBudget = 200000;
sepp_nepp	6:fb11b746ceb5	350	preRangeVcselPeriod = 14;
sepp_nepp	6:fb11b746ceb5	351	finalRangeVcselPeriod = 10;
sepp_nepp	6:fb11b746ceb5	352	break;
sepp_nepp	6:fb11b746ceb5	353	case Range_Config_HIGH_SPEED:
sepp_nepp	6:fb11b746ceb5	354	signalLimit = (FixPoint1616_t)(0.25*65536);
sepp_nepp	6:fb11b746ceb5	355	sigmaLimit = (FixPoint1616_t)(32*65536);
sepp_nepp	6:fb11b746ceb5	356	timingBudget = 20000;
sepp_nepp	6:fb11b746ceb5	357	preRangeVcselPeriod = 14;
sepp_nepp	6:fb11b746ceb5	358	finalRangeVcselPeriod = 10;
sepp_nepp	6:fb11b746ceb5	359	break;
sepp_nepp	6:fb11b746ceb5	360	default:
sepp_nepp	6:fb11b746ceb5	361	Status = 96; // Config Not Supported
sepp_nepp	6:fb11b746ceb5	362	}
sepp_nepp	6:fb11b746ceb5	363
sepp_nepp	6:fb11b746ceb5	364	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	365	Status = VL53L0X_set_limit_check_value(
sepp_nepp	6:fb11b746ceb5	366	VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE, signalLimit);}
sepp_nepp	6:fb11b746ceb5	367
sepp_nepp	6:fb11b746ceb5	368	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	369	Status = VL53L0X_set_limit_check_value(
sepp_nepp	6:fb11b746ceb5	370	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, sigmaLimit);}
sepp_nepp	6:fb11b746ceb5	371
sepp_nepp	6:fb11b746ceb5	372	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	373	Status = VL53L0X_set_measurement_timing_budget_micro_seconds( timingBudget);}
sepp_nepp	6:fb11b746ceb5	374
sepp_nepp	6:fb11b746ceb5	375	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	376	Status = VL53L0X_set_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	377	VL53L0X_VCSEL_PERIOD_PRE_RANGE, preRangeVcselPeriod);}
sepp_nepp	6:fb11b746ceb5	378
sepp_nepp	6:fb11b746ceb5	379	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	380	Status = VL53L0X_set_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	381	VL53L0X_VCSEL_PERIOD_FINAL_RANGE, finalRangeVcselPeriod);}
sepp_nepp	6:fb11b746ceb5	382
sepp_nepp	6:fb11b746ceb5	383	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	384	Status = VL53L0X_perform_ref_calibration( &VhvSettings, &PhaseCal);}
sepp_nepp	6:fb11b746ceb5	385
sepp_nepp	6:fb11b746ceb5	386	}
sepp_nepp	6:fb11b746ceb5	387
sepp_nepp	6:fb11b746ceb5	388	if (operating_mode == range_continuous_polling) {
sepp_nepp	6:fb11b746ceb5	389	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	390	//printf("Call of VL53L0X_SetDeviceMode\n");
sepp_nepp	7:3a1115c2556b	391	Status = VL53L0X_set_device_mode( VL53L0X_DEVICEMODE_CONTINUOUS_RANGING); // Setup in continuous ranging mode
sepp_nepp	6:fb11b746ceb5	392	}
sepp_nepp	6:fb11b746ceb5	393
sepp_nepp	6:fb11b746ceb5	394	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	395	//printf("Call of VL53L0X_StartMeasurement\n");
sepp_nepp	7:3a1115c2556b	396	Status = VL53L0X_start_measurement();
sepp_nepp	6:fb11b746ceb5	397	}
sepp_nepp	6:fb11b746ceb5	398	}
sepp_nepp	6:fb11b746ceb5	399
sepp_nepp	6:fb11b746ceb5	400	return Status;
sepp_nepp	6:fb11b746ceb5	401	}
sepp_nepp	6:fb11b746ceb5	402
sepp_nepp	6:fb11b746ceb5	403	int VL53L0X::range_meas_int_continuous_mode(void (*fptr)(void))
sepp_nepp	6:fb11b746ceb5	404	{
sepp_nepp	6:fb11b746ceb5	405	int status, clr_status;
sepp_nepp	6:fb11b746ceb5	406
sepp_nepp	7:3a1115c2556b	407	status = VL53L0X_stop_measurement(); // it is safer to do this while sensor is stopped
sepp_nepp	6:fb11b746ceb5	408
sepp_nepp	6:fb11b746ceb5	409	// status = VL53L0X_SetInterruptThresholds(Device, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING, 0, 300);
sepp_nepp	6:fb11b746ceb5	410
sepp_nepp	7:3a1115c2556b	411	status = VL53L0X_set_gpio_config( 0, VL53L0X_DEVICEMODE_CONTINUOUS_RANGING,
sepp_nepp	6:fb11b746ceb5	412	VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY,
sepp_nepp	6:fb11b746ceb5	413	VL53L0X_INTERRUPTPOLARITY_HIGH);
sepp_nepp	6:fb11b746ceb5	414
sepp_nepp	6:fb11b746ceb5	415	if (!status) {
sepp_nepp	6:fb11b746ceb5	416	attach_interrupt_measure_detection_irq(fptr);
sepp_nepp	6:fb11b746ceb5	417	enable_interrupt_measure_detection_irq();
sepp_nepp	6:fb11b746ceb5	418	}
sepp_nepp	6:fb11b746ceb5	419
sepp_nepp	6:fb11b746ceb5	420	clr_status = clear_interrupt(VL53L0X_REG_RESULT_INTERRUPT_STATUS \| VL53L0X_REG_RESULT_RANGE_STATUS);
sepp_nepp	6:fb11b746ceb5	421	if (clr_status!=0) { status = 98; } // VL53L0X_ClearErrorInterrupt_fail;
sepp_nepp	6:fb11b746ceb5	422
sepp_nepp	6:fb11b746ceb5	423	if (!status) {
sepp_nepp	6:fb11b746ceb5	424	status = range_start_continuous_mode();
sepp_nepp	6:fb11b746ceb5	425	}
sepp_nepp	6:fb11b746ceb5	426	return status;
sepp_nepp	6:fb11b746ceb5	427	}
sepp_nepp	6:fb11b746ceb5	428
sepp_nepp	6:fb11b746ceb5	429
sepp_nepp	7:3a1115c2556b	430	VL53L0X_Error VL53L0X::wait_measurement_data_ready(void)
sepp_nepp	6:fb11b746ceb5	431	{
sepp_nepp	6:fb11b746ceb5	432	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	433	uint8_t new_dat_ready = 0;
sepp_nepp	6:fb11b746ceb5	434	uint32_t loop_nb;
sepp_nepp	6:fb11b746ceb5	435
sepp_nepp	6:fb11b746ceb5	436	// Wait until it finished
sepp_nepp	6:fb11b746ceb5	437	// use timeout to avoid deadlock
sepp_nepp	6:fb11b746ceb5	438	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	439	loop_nb = 0;
sepp_nepp	6:fb11b746ceb5	440	do {
sepp_nepp	7:3a1115c2556b	441	status = VL53L0X_get_measurement_data_ready( &new_dat_ready);
sepp_nepp	6:fb11b746ceb5	442	if ((new_dat_ready == 0x01) \|\| status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	443	break;
sepp_nepp	6:fb11b746ceb5	444	}
sepp_nepp	6:fb11b746ceb5	445	loop_nb = loop_nb + 1;
sepp_nepp	7:3a1115c2556b	446	VL53L0X_polling_delay();
sepp_nepp	6:fb11b746ceb5	447	} while (loop_nb < VL53L0X_DEFAULT_MAX_LOOP);
sepp_nepp	6:fb11b746ceb5	448
sepp_nepp	6:fb11b746ceb5	449	if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) {
sepp_nepp	6:fb11b746ceb5	450	status = VL53L0X_ERROR_TIME_OUT;
sepp_nepp	6:fb11b746ceb5	451	}
sepp_nepp	6:fb11b746ceb5	452	}
sepp_nepp	6:fb11b746ceb5	453
sepp_nepp	6:fb11b746ceb5	454	return status;
sepp_nepp	6:fb11b746ceb5	455	}
sepp_nepp	6:fb11b746ceb5	456
sepp_nepp	7:3a1115c2556b	457	VL53L0X_Error VL53L0X::wait_stop_completed(void)
sepp_nepp	6:fb11b746ceb5	458	{
sepp_nepp	6:fb11b746ceb5	459	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	460	uint32_t stop_completed = 0;
sepp_nepp	6:fb11b746ceb5	461	uint32_t loop_nb;
sepp_nepp	6:fb11b746ceb5	462
sepp_nepp	6:fb11b746ceb5	463	// Wait until it finished
sepp_nepp	6:fb11b746ceb5	464	// use timeout to avoid deadlock
sepp_nepp	6:fb11b746ceb5	465	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	466	loop_nb = 0;
sepp_nepp	6:fb11b746ceb5	467	do {
sepp_nepp	7:3a1115c2556b	468	status = VL53L0X_get_stop_completed_status( &stop_completed);
sepp_nepp	6:fb11b746ceb5	469	if ((stop_completed == 0x00) \|\| status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	470	break;
sepp_nepp	6:fb11b746ceb5	471	}
sepp_nepp	6:fb11b746ceb5	472	loop_nb = loop_nb + 1;
sepp_nepp	7:3a1115c2556b	473	VL53L0X_polling_delay();
sepp_nepp	6:fb11b746ceb5	474	} while (loop_nb < VL53L0X_DEFAULT_MAX_LOOP);
sepp_nepp	6:fb11b746ceb5	475
sepp_nepp	6:fb11b746ceb5	476	if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) {
sepp_nepp	6:fb11b746ceb5	477	status = VL53L0X_ERROR_TIME_OUT;
sepp_nepp	6:fb11b746ceb5	478	}
sepp_nepp	6:fb11b746ceb5	479
sepp_nepp	6:fb11b746ceb5	480	}
sepp_nepp	6:fb11b746ceb5	481
sepp_nepp	6:fb11b746ceb5	482	return status;
sepp_nepp	6:fb11b746ceb5	483	}
sepp_nepp	6:fb11b746ceb5	484
sepp_nepp	6:fb11b746ceb5	485	int VL53L0X::get_measurement(OperatingMode operating_mode, VL53L0X_RangingMeasurementData_t *p_data)
sepp_nepp	6:fb11b746ceb5	486	{
sepp_nepp	6:fb11b746ceb5	487	int Status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	488
sepp_nepp	6:fb11b746ceb5	489	if (operating_mode == range_single_shot_polling) {
sepp_nepp	7:3a1115c2556b	490	Status = VL53L0X_perform_single_ranging_measurement( p_data);
sepp_nepp	6:fb11b746ceb5	491	}
sepp_nepp	6:fb11b746ceb5	492
sepp_nepp	6:fb11b746ceb5	493	if (operating_mode == range_continuous_polling) {
sepp_nepp	6:fb11b746ceb5	494	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	495	Status = VL53L0X_measurement_poll_for_completion();
sepp_nepp	6:fb11b746ceb5	496	}
sepp_nepp	6:fb11b746ceb5	497
sepp_nepp	6:fb11b746ceb5	498	if (Status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	499	Status = VL53L0X_get_ranging_measurement_data( p_data);
sepp_nepp	6:fb11b746ceb5	500
sepp_nepp	6:fb11b746ceb5	501	// Clear the interrupt
sepp_nepp	7:3a1115c2556b	502	VL53L0X_clear_interrupt_mask( VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY);
sepp_nepp	7:3a1115c2556b	503	VL53L0X_polling_delay();
sepp_nepp	6:fb11b746ceb5	504	}
sepp_nepp	6:fb11b746ceb5	505	}
sepp_nepp	6:fb11b746ceb5	506
sepp_nepp	6:fb11b746ceb5	507	if (operating_mode == range_continuous_interrupt) {
sepp_nepp	7:3a1115c2556b	508	Status = VL53L0X_get_ranging_measurement_data( p_data);
sepp_nepp	7:3a1115c2556b	509	VL53L0X_clear_interrupt_mask( VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR \| VL53L0X_REG_RESULT_INTERRUPT_STATUS);
sepp_nepp	6:fb11b746ceb5	510	}
sepp_nepp	6:fb11b746ceb5	511
sepp_nepp	6:fb11b746ceb5	512	return Status;
sepp_nepp	6:fb11b746ceb5	513	}
sepp_nepp	6:fb11b746ceb5	514
sepp_nepp	6:fb11b746ceb5	515
sepp_nepp	6:fb11b746ceb5	516	int VL53L0X::stop_measurement(OperatingMode operating_mode)
sepp_nepp	6:fb11b746ceb5	517	{
sepp_nepp	6:fb11b746ceb5	518	int status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	519
sepp_nepp	6:fb11b746ceb5	520
sepp_nepp	6:fb11b746ceb5	521	// don't need to stop for a singleshot range!
sepp_nepp	6:fb11b746ceb5	522	if (operating_mode == range_single_shot_polling) {
sepp_nepp	6:fb11b746ceb5	523	}
sepp_nepp	6:fb11b746ceb5	524
sepp_nepp	6:fb11b746ceb5	525	if (operating_mode == range_continuous_interrupt \|\| operating_mode == range_continuous_polling) {
sepp_nepp	6:fb11b746ceb5	526	// continuous mode
sepp_nepp	6:fb11b746ceb5	527	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	528	//printf("Call of VL53L0X_StopMeasurement\n");
sepp_nepp	7:3a1115c2556b	529	status = VL53L0X_stop_measurement();
sepp_nepp	6:fb11b746ceb5	530	}
sepp_nepp	6:fb11b746ceb5	531
sepp_nepp	6:fb11b746ceb5	532	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	533	//printf("Wait Stop to be competed\n");
sepp_nepp	7:3a1115c2556b	534	status = wait_stop_completed();
sepp_nepp	6:fb11b746ceb5	535	}
sepp_nepp	6:fb11b746ceb5	536
sepp_nepp	6:fb11b746ceb5	537	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	538	status = VL53L0X_clear_interrupt_mask(
sepp_nepp	6:fb11b746ceb5	539	VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY);
sepp_nepp	6:fb11b746ceb5	540	}
sepp_nepp	6:fb11b746ceb5	541
sepp_nepp	6:fb11b746ceb5	542	return status;
sepp_nepp	6:fb11b746ceb5	543	}
sepp_nepp	6:fb11b746ceb5	544
sepp_nepp	6:fb11b746ceb5	545	int VL53L0X::handle_irq(OperatingMode operating_mode, VL53L0X_RangingMeasurementData_t *data)
sepp_nepp	6:fb11b746ceb5	546	{
sepp_nepp	6:fb11b746ceb5	547	int status;
sepp_nepp	6:fb11b746ceb5	548	status = get_measurement(operating_mode, data);
sepp_nepp	6:fb11b746ceb5	549	enable_interrupt_measure_detection_irq();
sepp_nepp	6:fb11b746ceb5	550	return status;
sepp_nepp	6:fb11b746ceb5	551	}
sepp_nepp	6:fb11b746ceb5	552
sepp_nepp	6:fb11b746ceb5	553	int VL53L0X::range_start_continuous_mode()
sepp_nepp	6:fb11b746ceb5	554	{ int status;
sepp_nepp	7:3a1115c2556b	555	status = VL53L0X_set_device_mode( VL53L0X_DEVICEMODE_CONTINUOUS_RANGING);
sepp_nepp	6:fb11b746ceb5	556
sepp_nepp	6:fb11b746ceb5	557	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	558	{ status = VL53L0X_start_measurement(); }
sepp_nepp	6:fb11b746ceb5	559
sepp_nepp	6:fb11b746ceb5	560	return status;
sepp_nepp	6:fb11b746ceb5	561	}
sepp_nepp	6:fb11b746ceb5	562
sepp_nepp	6:fb11b746ceb5	563
sepp_nepp	7:3a1115c2556b	564	VL53L0X_Error VL53L0X::VL53L0X_device_read_strobe(void)
sepp_nepp	6:fb11b746ceb5	565	{
sepp_nepp	6:fb11b746ceb5	566	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	567	uint8_t strobe;
sepp_nepp	6:fb11b746ceb5	568	uint32_t loop_nb;
sepp_nepp	6:fb11b746ceb5	569
sepp_nepp	6:fb11b746ceb5	570
sepp_nepp	7:3a1115c2556b	571	status \|= VL53L0X_write_byte( 0x83, 0x00);
sepp_nepp	6:fb11b746ceb5	572
sepp_nepp	6:fb11b746ceb5	573	/* polling
sepp_nepp	6:fb11b746ceb5	574	* use timeout to avoid deadlock*/
sepp_nepp	6:fb11b746ceb5	575	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	576	loop_nb = 0;
sepp_nepp	6:fb11b746ceb5	577	do {
sepp_nepp	7:3a1115c2556b	578	status = VL53L0X_read_byte( 0x83, &strobe);
sepp_nepp	6:fb11b746ceb5	579	if ((strobe != 0x00) \|\| status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	580	break;
sepp_nepp	6:fb11b746ceb5	581	}
sepp_nepp	6:fb11b746ceb5	582
sepp_nepp	6:fb11b746ceb5	583	loop_nb = loop_nb + 1;
sepp_nepp	6:fb11b746ceb5	584	} while (loop_nb < VL53L0X_DEFAULT_MAX_LOOP);
sepp_nepp	6:fb11b746ceb5	585
sepp_nepp	6:fb11b746ceb5	586	if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) {
sepp_nepp	6:fb11b746ceb5	587	status = VL53L0X_ERROR_TIME_OUT;
sepp_nepp	6:fb11b746ceb5	588	}
sepp_nepp	6:fb11b746ceb5	589	}
sepp_nepp	6:fb11b746ceb5	590
sepp_nepp	7:3a1115c2556b	591	status \|= VL53L0X_write_byte( 0x83, 0x01);
sepp_nepp	6:fb11b746ceb5	592
sepp_nepp	6:fb11b746ceb5	593
sepp_nepp	6:fb11b746ceb5	594	return status;
sepp_nepp	6:fb11b746ceb5	595	}
sepp_nepp	6:fb11b746ceb5	596
sepp_nepp	7:3a1115c2556b	597	VL53L0X_Error VL53L0X::VL53L0X_get_info_from_device( uint8_t option)
sepp_nepp	6:fb11b746ceb5	598	{
sepp_nepp	6:fb11b746ceb5	599	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	600	uint8_t byte;
sepp_nepp	6:fb11b746ceb5	601	uint32_t tmp_dword;
sepp_nepp	6:fb11b746ceb5	602	uint8_t module_id;
sepp_nepp	6:fb11b746ceb5	603	uint8_t revision;
sepp_nepp	6:fb11b746ceb5	604	uint8_t reference_spad_count = 0;
sepp_nepp	6:fb11b746ceb5	605	uint8_t reference_spad_type = 0;
sepp_nepp	6:fb11b746ceb5	606	uint32_t part_uid_upper = 0;
sepp_nepp	6:fb11b746ceb5	607	uint32_t part_uid_lower = 0;
sepp_nepp	6:fb11b746ceb5	608	uint32_t offset_fixed1104_mm = 0;
sepp_nepp	6:fb11b746ceb5	609	int16_t offset_micro_meters = 0;
sepp_nepp	6:fb11b746ceb5	610	uint32_t dist_meas_tgt_fixed1104_mm = 400 << 4;
sepp_nepp	6:fb11b746ceb5	611	uint32_t dist_meas_fixed1104_400_mm = 0;
sepp_nepp	6:fb11b746ceb5	612	uint32_t signal_rate_meas_fixed1104_400_mm = 0;
sepp_nepp	6:fb11b746ceb5	613	char product_id[19];
sepp_nepp	6:fb11b746ceb5	614	char *product_id_tmp;
sepp_nepp	6:fb11b746ceb5	615	uint8_t read_data_from_device_done;
sepp_nepp	6:fb11b746ceb5	616	FixPoint1616_t signal_rate_meas_fixed400_mm_fix = 0;
sepp_nepp	6:fb11b746ceb5	617	uint8_t nvm_ref_good_spad_map[VL53L0X_REF_SPAD_BUFFER_SIZE];
sepp_nepp	6:fb11b746ceb5	618	int i;
sepp_nepp	6:fb11b746ceb5	619
sepp_nepp	7:3a1115c2556b	620	read_data_from_device_done = VL53L0X_GETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	621	ReadDataFromDeviceDone);
sepp_nepp	6:fb11b746ceb5	622
sepp_nepp	6:fb11b746ceb5	623	/* This access is done only once after that a GetDeviceInfo or
sepp_nepp	6:fb11b746ceb5	624	* datainit is done*/
sepp_nepp	6:fb11b746ceb5	625	if (read_data_from_device_done != 7) {
sepp_nepp	6:fb11b746ceb5	626
sepp_nepp	7:3a1115c2556b	627	status \|= VL53L0X_write_byte( 0x80, 0x01);
sepp_nepp	7:3a1115c2556b	628	status \|= VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	629	status \|= VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	630
sepp_nepp	7:3a1115c2556b	631	status \|= VL53L0X_write_byte( 0xFF, 0x06);
sepp_nepp	7:3a1115c2556b	632	status \|= VL53L0X_read_byte( 0x83, &byte);
sepp_nepp	7:3a1115c2556b	633	status \|= VL53L0X_write_byte( 0x83, byte \| 4);
sepp_nepp	7:3a1115c2556b	634	status \|= VL53L0X_write_byte( 0xFF, 0x07);
sepp_nepp	7:3a1115c2556b	635	status \|= VL53L0X_write_byte( 0x81, 0x01);
sepp_nepp	7:3a1115c2556b	636
sepp_nepp	7:3a1115c2556b	637	status \|= VL53L0X_polling_delay();
sepp_nepp	7:3a1115c2556b	638
sepp_nepp	7:3a1115c2556b	639	status \|= VL53L0X_write_byte( 0x80, 0x01);
sepp_nepp	6:fb11b746ceb5	640
sepp_nepp	6:fb11b746ceb5	641	if (((option & 1) == 1) &&
sepp_nepp	6:fb11b746ceb5	642	((read_data_from_device_done & 1) == 0)) {
sepp_nepp	7:3a1115c2556b	643	status \|= VL53L0X_write_byte( 0x94, 0x6b);
sepp_nepp	7:3a1115c2556b	644	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	645	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	646
sepp_nepp	6:fb11b746ceb5	647	reference_spad_count = (uint8_t)((tmp_dword >> 8) & 0x07f);
sepp_nepp	6:fb11b746ceb5	648	reference_spad_type = (uint8_t)((tmp_dword >> 15) & 0x01);
sepp_nepp	6:fb11b746ceb5	649
sepp_nepp	7:3a1115c2556b	650	status \|= VL53L0X_write_byte( 0x94, 0x24);
sepp_nepp	7:3a1115c2556b	651	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	652	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	653
sepp_nepp	6:fb11b746ceb5	654
sepp_nepp	6:fb11b746ceb5	655	nvm_ref_good_spad_map[0] = (uint8_t)((tmp_dword >> 24)
sepp_nepp	6:fb11b746ceb5	656	& 0xff);
sepp_nepp	6:fb11b746ceb5	657	nvm_ref_good_spad_map[1] = (uint8_t)((tmp_dword >> 16)
sepp_nepp	6:fb11b746ceb5	658	& 0xff);
sepp_nepp	6:fb11b746ceb5	659	nvm_ref_good_spad_map[2] = (uint8_t)((tmp_dword >> 8)
sepp_nepp	6:fb11b746ceb5	660	& 0xff);
sepp_nepp	6:fb11b746ceb5	661	nvm_ref_good_spad_map[3] = (uint8_t)(tmp_dword & 0xff);
sepp_nepp	6:fb11b746ceb5	662
sepp_nepp	7:3a1115c2556b	663	status \|= VL53L0X_write_byte( 0x94, 0x25);
sepp_nepp	7:3a1115c2556b	664	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	665	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	666
sepp_nepp	6:fb11b746ceb5	667	nvm_ref_good_spad_map[4] = (uint8_t)((tmp_dword >> 24)
sepp_nepp	6:fb11b746ceb5	668	& 0xff);
sepp_nepp	6:fb11b746ceb5	669	nvm_ref_good_spad_map[5] = (uint8_t)((tmp_dword >> 16)
sepp_nepp	6:fb11b746ceb5	670	& 0xff);
sepp_nepp	6:fb11b746ceb5	671	}
sepp_nepp	6:fb11b746ceb5	672
sepp_nepp	6:fb11b746ceb5	673	if (((option & 2) == 2) &&
sepp_nepp	6:fb11b746ceb5	674	((read_data_from_device_done & 2) == 0)) {
sepp_nepp	6:fb11b746ceb5	675
sepp_nepp	7:3a1115c2556b	676	status \|= VL53L0X_write_byte( 0x94, 0x02);
sepp_nepp	7:3a1115c2556b	677	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	678	status \|= VL53L0X_read_byte( 0x90, &module_id);
sepp_nepp	7:3a1115c2556b	679
sepp_nepp	7:3a1115c2556b	680	status \|= VL53L0X_write_byte( 0x94, 0x7B);
sepp_nepp	7:3a1115c2556b	681	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	682	status \|= VL53L0X_read_byte( 0x90, &revision);
sepp_nepp	7:3a1115c2556b	683
sepp_nepp	7:3a1115c2556b	684	status \|= VL53L0X_write_byte( 0x94, 0x77);
sepp_nepp	7:3a1115c2556b	685	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	686	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	687
sepp_nepp	6:fb11b746ceb5	688	product_id[0] = (char)((tmp_dword >> 25) & 0x07f);
sepp_nepp	6:fb11b746ceb5	689	product_id[1] = (char)((tmp_dword >> 18) & 0x07f);
sepp_nepp	6:fb11b746ceb5	690	product_id[2] = (char)((tmp_dword >> 11) & 0x07f);
sepp_nepp	6:fb11b746ceb5	691	product_id[3] = (char)((tmp_dword >> 4) & 0x07f);
sepp_nepp	6:fb11b746ceb5	692
sepp_nepp	6:fb11b746ceb5	693	byte = (uint8_t)((tmp_dword & 0x00f) << 3);
sepp_nepp	6:fb11b746ceb5	694
sepp_nepp	7:3a1115c2556b	695	status \|= VL53L0X_write_byte( 0x94, 0x78);
sepp_nepp	7:3a1115c2556b	696	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	697	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	698
sepp_nepp	6:fb11b746ceb5	699	product_id[4] = (char)(byte +
sepp_nepp	6:fb11b746ceb5	700	((tmp_dword >> 29) & 0x07f));
sepp_nepp	6:fb11b746ceb5	701	product_id[5] = (char)((tmp_dword >> 22) & 0x07f);
sepp_nepp	6:fb11b746ceb5	702	product_id[6] = (char)((tmp_dword >> 15) & 0x07f);
sepp_nepp	6:fb11b746ceb5	703	product_id[7] = (char)((tmp_dword >> 8) & 0x07f);
sepp_nepp	6:fb11b746ceb5	704	product_id[8] = (char)((tmp_dword >> 1) & 0x07f);
sepp_nepp	6:fb11b746ceb5	705
sepp_nepp	6:fb11b746ceb5	706	byte = (uint8_t)((tmp_dword & 0x001) << 6);
sepp_nepp	6:fb11b746ceb5	707
sepp_nepp	7:3a1115c2556b	708	status \|= VL53L0X_write_byte( 0x94, 0x79);
sepp_nepp	7:3a1115c2556b	709
sepp_nepp	7:3a1115c2556b	710	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	711
sepp_nepp	7:3a1115c2556b	712	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	713
sepp_nepp	6:fb11b746ceb5	714	product_id[9] = (char)(byte +
sepp_nepp	6:fb11b746ceb5	715	((tmp_dword >> 26) & 0x07f));
sepp_nepp	6:fb11b746ceb5	716	product_id[10] = (char)((tmp_dword >> 19) & 0x07f);
sepp_nepp	6:fb11b746ceb5	717	product_id[11] = (char)((tmp_dword >> 12) & 0x07f);
sepp_nepp	6:fb11b746ceb5	718	product_id[12] = (char)((tmp_dword >> 5) & 0x07f);
sepp_nepp	6:fb11b746ceb5	719
sepp_nepp	6:fb11b746ceb5	720	byte = (uint8_t)((tmp_dword & 0x01f) << 2);
sepp_nepp	6:fb11b746ceb5	721
sepp_nepp	7:3a1115c2556b	722	status \|= VL53L0X_write_byte( 0x94, 0x7A);
sepp_nepp	7:3a1115c2556b	723
sepp_nepp	7:3a1115c2556b	724	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	725
sepp_nepp	7:3a1115c2556b	726	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	727
sepp_nepp	6:fb11b746ceb5	728	product_id[13] = (char)(byte +
sepp_nepp	6:fb11b746ceb5	729	((tmp_dword >> 30) & 0x07f));
sepp_nepp	6:fb11b746ceb5	730	product_id[14] = (char)((tmp_dword >> 23) & 0x07f);
sepp_nepp	6:fb11b746ceb5	731	product_id[15] = (char)((tmp_dword >> 16) & 0x07f);
sepp_nepp	6:fb11b746ceb5	732	product_id[16] = (char)((tmp_dword >> 9) & 0x07f);
sepp_nepp	6:fb11b746ceb5	733	product_id[17] = (char)((tmp_dword >> 2) & 0x07f);
sepp_nepp	6:fb11b746ceb5	734	product_id[18] = '\0';
sepp_nepp	6:fb11b746ceb5	735
sepp_nepp	6:fb11b746ceb5	736	}
sepp_nepp	6:fb11b746ceb5	737
sepp_nepp	6:fb11b746ceb5	738	if (((option & 4) == 4) &&
sepp_nepp	6:fb11b746ceb5	739	((read_data_from_device_done & 4) == 0)) {
sepp_nepp	6:fb11b746ceb5	740
sepp_nepp	7:3a1115c2556b	741	status \|= VL53L0X_write_byte( 0x94, 0x7B);
sepp_nepp	7:3a1115c2556b	742	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	743	status \|= VL53L0X_read_dword( 0x90, &part_uid_upper);
sepp_nepp	7:3a1115c2556b	744
sepp_nepp	7:3a1115c2556b	745	status \|= VL53L0X_write_byte( 0x94, 0x7C);
sepp_nepp	7:3a1115c2556b	746	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	747	status \|= VL53L0X_read_dword( 0x90, &part_uid_lower);
sepp_nepp	7:3a1115c2556b	748
sepp_nepp	7:3a1115c2556b	749	status \|= VL53L0X_write_byte( 0x94, 0x73);
sepp_nepp	7:3a1115c2556b	750	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	751	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	752
sepp_nepp	6:fb11b746ceb5	753	signal_rate_meas_fixed1104_400_mm = (tmp_dword &
sepp_nepp	6:fb11b746ceb5	754	0x0000000ff) << 8;
sepp_nepp	6:fb11b746ceb5	755
sepp_nepp	7:3a1115c2556b	756	status \|= VL53L0X_write_byte( 0x94, 0x74);
sepp_nepp	7:3a1115c2556b	757	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	758	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	759
sepp_nepp	6:fb11b746ceb5	760	signal_rate_meas_fixed1104_400_mm \|= ((tmp_dword &
sepp_nepp	6:fb11b746ceb5	761	0xff000000) >> 24);
sepp_nepp	6:fb11b746ceb5	762
sepp_nepp	7:3a1115c2556b	763	status \|= VL53L0X_write_byte( 0x94, 0x75);
sepp_nepp	7:3a1115c2556b	764	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	765	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	766
sepp_nepp	6:fb11b746ceb5	767	dist_meas_fixed1104_400_mm = (tmp_dword & 0x0000000ff)
sepp_nepp	6:fb11b746ceb5	768	<< 8;
sepp_nepp	6:fb11b746ceb5	769
sepp_nepp	7:3a1115c2556b	770	status \|= VL53L0X_write_byte( 0x94, 0x76);
sepp_nepp	7:3a1115c2556b	771	status \|= VL53L0X_device_read_strobe();
sepp_nepp	7:3a1115c2556b	772	status \|= VL53L0X_read_dword( 0x90, &tmp_dword);
sepp_nepp	6:fb11b746ceb5	773
sepp_nepp	6:fb11b746ceb5	774	dist_meas_fixed1104_400_mm \|= ((tmp_dword & 0xff000000)
sepp_nepp	6:fb11b746ceb5	775	>> 24);
sepp_nepp	6:fb11b746ceb5	776	}
sepp_nepp	6:fb11b746ceb5	777
sepp_nepp	7:3a1115c2556b	778	status \|= VL53L0X_write_byte( 0x81, 0x00);
sepp_nepp	7:3a1115c2556b	779	status \|= VL53L0X_write_byte( 0xFF, 0x06);
sepp_nepp	7:3a1115c2556b	780	status \|= VL53L0X_read_byte( 0x83, &byte);
sepp_nepp	7:3a1115c2556b	781	status \|= VL53L0X_write_byte( 0x83, byte & 0xfb);
sepp_nepp	7:3a1115c2556b	782	status \|= VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	783	status \|= VL53L0X_write_byte( 0x00, 0x01);
sepp_nepp	7:3a1115c2556b	784
sepp_nepp	7:3a1115c2556b	785	status \|= VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	7:3a1115c2556b	786	status \|= VL53L0X_write_byte( 0x80, 0x00);
sepp_nepp	6:fb11b746ceb5	787	}
sepp_nepp	6:fb11b746ceb5	788
sepp_nepp	6:fb11b746ceb5	789	if ((status == VL53L0X_ERROR_NONE) &&
sepp_nepp	6:fb11b746ceb5	790	(read_data_from_device_done != 7)) {
sepp_nepp	6:fb11b746ceb5	791	/* Assign to variable if status is ok */
sepp_nepp	6:fb11b746ceb5	792	if (((option & 1) == 1) &&
sepp_nepp	6:fb11b746ceb5	793	((read_data_from_device_done & 1) == 0)) {
sepp_nepp	7:3a1115c2556b	794	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	795	ReferenceSpadCount, reference_spad_count);
sepp_nepp	6:fb11b746ceb5	796
sepp_nepp	7:3a1115c2556b	797	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	798	ReferenceSpadType, reference_spad_type);
sepp_nepp	6:fb11b746ceb5	799
sepp_nepp	6:fb11b746ceb5	800	for (i = 0; i < VL53L0X_REF_SPAD_BUFFER_SIZE; i++) {
sepp_nepp	7:3a1115c2556b	801	Data.SpadData.RefGoodSpadMap[i] =
sepp_nepp	6:fb11b746ceb5	802	nvm_ref_good_spad_map[i];
sepp_nepp	6:fb11b746ceb5	803	}
sepp_nepp	6:fb11b746ceb5	804	}
sepp_nepp	6:fb11b746ceb5	805
sepp_nepp	6:fb11b746ceb5	806	if (((option & 2) == 2) &&
sepp_nepp	6:fb11b746ceb5	807	((read_data_from_device_done & 2) == 0)) {
sepp_nepp	7:3a1115c2556b	808	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	809	ModuleId, module_id);
sepp_nepp	6:fb11b746ceb5	810
sepp_nepp	7:3a1115c2556b	811	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	812	Revision, revision);
sepp_nepp	6:fb11b746ceb5	813
sepp_nepp	7:3a1115c2556b	814	product_id_tmp = VL53L0X_GETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	815	ProductId);
sepp_nepp	6:fb11b746ceb5	816	VL53L0X_COPYSTRING(product_id_tmp, product_id);
sepp_nepp	6:fb11b746ceb5	817
sepp_nepp	6:fb11b746ceb5	818	}
sepp_nepp	6:fb11b746ceb5	819
sepp_nepp	6:fb11b746ceb5	820	if (((option & 4) == 4) &&
sepp_nepp	6:fb11b746ceb5	821	((read_data_from_device_done & 4) == 0)) {
sepp_nepp	7:3a1115c2556b	822	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	823	PartUIDUpper, part_uid_upper);
sepp_nepp	6:fb11b746ceb5	824
sepp_nepp	7:3a1115c2556b	825	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	826	PartUIDLower, part_uid_lower);
sepp_nepp	6:fb11b746ceb5	827
sepp_nepp	6:fb11b746ceb5	828	signal_rate_meas_fixed400_mm_fix =
sepp_nepp	6:fb11b746ceb5	829	VL53L0X_FIXPOINT97TOFIXPOINT1616(
sepp_nepp	6:fb11b746ceb5	830	signal_rate_meas_fixed1104_400_mm);
sepp_nepp	6:fb11b746ceb5	831
sepp_nepp	7:3a1115c2556b	832	VL53L0X_SETDEVICESPECIFICPARAMETER(
sepp_nepp	6:fb11b746ceb5	833	SignalRateMeasFixed400mm,
sepp_nepp	6:fb11b746ceb5	834	signal_rate_meas_fixed400_mm_fix);
sepp_nepp	6:fb11b746ceb5	835
sepp_nepp	6:fb11b746ceb5	836	offset_micro_meters = 0;
sepp_nepp	6:fb11b746ceb5	837	if (dist_meas_fixed1104_400_mm != 0) {
sepp_nepp	6:fb11b746ceb5	838	offset_fixed1104_mm =
sepp_nepp	6:fb11b746ceb5	839	dist_meas_fixed1104_400_mm -
sepp_nepp	6:fb11b746ceb5	840	dist_meas_tgt_fixed1104_mm;
sepp_nepp	6:fb11b746ceb5	841	offset_micro_meters = (offset_fixed1104_mm
sepp_nepp	6:fb11b746ceb5	842	* 1000) >> 4;
sepp_nepp	6:fb11b746ceb5	843	offset_micro_meters *= -1;
sepp_nepp	6:fb11b746ceb5	844	}
sepp_nepp	6:fb11b746ceb5	845
sepp_nepp	7:3a1115c2556b	846	PALDevDataSet(
sepp_nepp	6:fb11b746ceb5	847	Part2PartOffsetAdjustmentNVMMicroMeter,
sepp_nepp	6:fb11b746ceb5	848	offset_micro_meters);
sepp_nepp	6:fb11b746ceb5	849	}
sepp_nepp	6:fb11b746ceb5	850	byte = (uint8_t)(read_data_from_device_done \| option);
sepp_nepp	7:3a1115c2556b	851	VL53L0X_SETDEVICESPECIFICPARAMETER( ReadDataFromDeviceDone,
sepp_nepp	6:fb11b746ceb5	852	byte);
sepp_nepp	6:fb11b746ceb5	853	}
sepp_nepp	6:fb11b746ceb5	854	return status;
sepp_nepp	6:fb11b746ceb5	855	}
sepp_nepp	6:fb11b746ceb5	856
sepp_nepp	7:3a1115c2556b	857	VL53L0X_Error VL53L0X::wrapped_VL53L0X_get_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	858	int32_t *p_offset_calibration_data_micro_meter)
sepp_nepp	6:fb11b746ceb5	859	{
sepp_nepp	6:fb11b746ceb5	860	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	861	uint16_t range_offset_register;
sepp_nepp	6:fb11b746ceb5	862	int16_t c_max_offset = 2047;
sepp_nepp	6:fb11b746ceb5	863	int16_t c_offset_range = 4096;
sepp_nepp	6:fb11b746ceb5	864
sepp_nepp	6:fb11b746ceb5	865	/* Note that offset has 10.2 format */
sepp_nepp	6:fb11b746ceb5	866
sepp_nepp	7:3a1115c2556b	867	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	868	VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM,
sepp_nepp	6:fb11b746ceb5	869	&range_offset_register);
sepp_nepp	6:fb11b746ceb5	870
sepp_nepp	6:fb11b746ceb5	871	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	872	range_offset_register = (range_offset_register & 0x0fff);
sepp_nepp	6:fb11b746ceb5	873
sepp_nepp	6:fb11b746ceb5	874	/* Apply 12 bit 2's compliment conversion */
sepp_nepp	6:fb11b746ceb5	875	if (range_offset_register > c_max_offset) {
sepp_nepp	6:fb11b746ceb5	876	*p_offset_calibration_data_micro_meter =
sepp_nepp	6:fb11b746ceb5	877	(int16_t)(range_offset_register - c_offset_range)
sepp_nepp	6:fb11b746ceb5	878	* 250;
sepp_nepp	6:fb11b746ceb5	879	} else {
sepp_nepp	6:fb11b746ceb5	880	*p_offset_calibration_data_micro_meter =
sepp_nepp	6:fb11b746ceb5	881	(int16_t)range_offset_register * 250;
sepp_nepp	6:fb11b746ceb5	882	}
sepp_nepp	6:fb11b746ceb5	883
sepp_nepp	6:fb11b746ceb5	884	}
sepp_nepp	6:fb11b746ceb5	885
sepp_nepp	6:fb11b746ceb5	886	return status;
sepp_nepp	6:fb11b746ceb5	887	}
sepp_nepp	6:fb11b746ceb5	888
sepp_nepp	7:3a1115c2556b	889	VL53L0X_Error VL53L0X::VL53L0X_get_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	890	int32_t *p_offset_calibration_data_micro_meter)
sepp_nepp	6:fb11b746ceb5	891	{
sepp_nepp	6:fb11b746ceb5	892	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	893
sepp_nepp	6:fb11b746ceb5	894
sepp_nepp	7:3a1115c2556b	895	status = wrapped_VL53L0X_get_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	896	p_offset_calibration_data_micro_meter);
sepp_nepp	6:fb11b746ceb5	897
sepp_nepp	6:fb11b746ceb5	898
sepp_nepp	6:fb11b746ceb5	899	return status;
sepp_nepp	6:fb11b746ceb5	900	}
sepp_nepp	6:fb11b746ceb5	901
sepp_nepp	7:3a1115c2556b	902	VL53L0X_Error VL53L0X::wrapped_VL53L0X_set_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	903	int32_t offset_calibration_data_micro_meter)
sepp_nepp	6:fb11b746ceb5	904	{
sepp_nepp	6:fb11b746ceb5	905	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	906	int32_t c_max_offset_micro_meter = 511000;
sepp_nepp	6:fb11b746ceb5	907	int32_t c_min_offset_micro_meter = -512000;
sepp_nepp	6:fb11b746ceb5	908	int16_t c_offset_range = 4096;
sepp_nepp	6:fb11b746ceb5	909	uint32_t encoded_offset_val;
sepp_nepp	6:fb11b746ceb5	910
sepp_nepp	6:fb11b746ceb5	911
sepp_nepp	6:fb11b746ceb5	912
sepp_nepp	6:fb11b746ceb5	913	if (offset_calibration_data_micro_meter > c_max_offset_micro_meter) {
sepp_nepp	6:fb11b746ceb5	914	offset_calibration_data_micro_meter = c_max_offset_micro_meter;
sepp_nepp	6:fb11b746ceb5	915	} else {
sepp_nepp	6:fb11b746ceb5	916	if (offset_calibration_data_micro_meter < c_min_offset_micro_meter) {
sepp_nepp	6:fb11b746ceb5	917	offset_calibration_data_micro_meter = c_min_offset_micro_meter;
sepp_nepp	6:fb11b746ceb5	918	}
sepp_nepp	6:fb11b746ceb5	919	}
sepp_nepp	6:fb11b746ceb5	920
sepp_nepp	6:fb11b746ceb5	921	/* The offset register is 10.2 format and units are mm
sepp_nepp	6:fb11b746ceb5	922	* therefore conversion is applied by a division of
sepp_nepp	6:fb11b746ceb5	923	* 250.
sepp_nepp	6:fb11b746ceb5	924	*/
sepp_nepp	6:fb11b746ceb5	925	if (offset_calibration_data_micro_meter >= 0) {
sepp_nepp	6:fb11b746ceb5	926	encoded_offset_val =
sepp_nepp	6:fb11b746ceb5	927	offset_calibration_data_micro_meter / 250;
sepp_nepp	6:fb11b746ceb5	928	} else {
sepp_nepp	6:fb11b746ceb5	929	encoded_offset_val =
sepp_nepp	6:fb11b746ceb5	930	c_offset_range +
sepp_nepp	6:fb11b746ceb5	931	offset_calibration_data_micro_meter / 250;
sepp_nepp	6:fb11b746ceb5	932	}
sepp_nepp	6:fb11b746ceb5	933
sepp_nepp	7:3a1115c2556b	934	status = VL53L0X_write_word(
sepp_nepp	6:fb11b746ceb5	935	VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM,
sepp_nepp	6:fb11b746ceb5	936	encoded_offset_val);
sepp_nepp	6:fb11b746ceb5	937
sepp_nepp	6:fb11b746ceb5	938
sepp_nepp	6:fb11b746ceb5	939	return status;
sepp_nepp	6:fb11b746ceb5	940	}
sepp_nepp	6:fb11b746ceb5	941
sepp_nepp	7:3a1115c2556b	942	VL53L0X_Error VL53L0X::VL53L0X_set_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	943	int32_t offset_calibration_data_micro_meter)
sepp_nepp	6:fb11b746ceb5	944	{
sepp_nepp	6:fb11b746ceb5	945	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	946
sepp_nepp	6:fb11b746ceb5	947
sepp_nepp	7:3a1115c2556b	948	status = wrapped_VL53L0X_set_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	949	offset_calibration_data_micro_meter);
sepp_nepp	6:fb11b746ceb5	950
sepp_nepp	6:fb11b746ceb5	951
sepp_nepp	6:fb11b746ceb5	952	return status;
sepp_nepp	6:fb11b746ceb5	953	}
sepp_nepp	6:fb11b746ceb5	954
sepp_nepp	7:3a1115c2556b	955	VL53L0X_Error VL53L0X::VL53L0X_apply_offset_adjustment(void)
sepp_nepp	6:fb11b746ceb5	956	{
sepp_nepp	6:fb11b746ceb5	957	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	958	int32_t corrected_offset_micro_meters;
sepp_nepp	6:fb11b746ceb5	959	int32_t current_offset_micro_meters;
sepp_nepp	6:fb11b746ceb5	960
sepp_nepp	6:fb11b746ceb5	961	/* if we run on this function we can read all the NVM info
sepp_nepp	6:fb11b746ceb5	962	* used by the API */
sepp_nepp	7:3a1115c2556b	963	status = VL53L0X_get_info_from_device( 7);
sepp_nepp	6:fb11b746ceb5	964
sepp_nepp	6:fb11b746ceb5	965	/* Read back current device offset */
sepp_nepp	6:fb11b746ceb5	966	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	967	status = VL53L0X_get_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	968	&current_offset_micro_meters);
sepp_nepp	6:fb11b746ceb5	969	}
sepp_nepp	6:fb11b746ceb5	970
sepp_nepp	6:fb11b746ceb5	971	/* Apply Offset Adjustment derived from 400mm measurements */
sepp_nepp	6:fb11b746ceb5	972	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	973
sepp_nepp	6:fb11b746ceb5	974	/* Store initial device offset */
sepp_nepp	7:3a1115c2556b	975	PALDevDataSet( Part2PartOffsetNVMMicroMeter,
sepp_nepp	6:fb11b746ceb5	976	current_offset_micro_meters);
sepp_nepp	6:fb11b746ceb5	977
sepp_nepp	6:fb11b746ceb5	978	corrected_offset_micro_meters = current_offset_micro_meters +
sepp_nepp	7:3a1115c2556b	979	(int32_t)PALDevDataGet(
sepp_nepp	6:fb11b746ceb5	980	Part2PartOffsetAdjustmentNVMMicroMeter);
sepp_nepp	6:fb11b746ceb5	981
sepp_nepp	7:3a1115c2556b	982	status = VL53L0X_set_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	983	corrected_offset_micro_meters);
sepp_nepp	6:fb11b746ceb5	984
sepp_nepp	6:fb11b746ceb5	985	/* store current, adjusted offset */
sepp_nepp	6:fb11b746ceb5	986	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	987	VL53L0X_SETPARAMETERFIELD( RangeOffsetMicroMeters,
sepp_nepp	6:fb11b746ceb5	988	corrected_offset_micro_meters);
sepp_nepp	6:fb11b746ceb5	989	}
sepp_nepp	6:fb11b746ceb5	990	}
sepp_nepp	6:fb11b746ceb5	991
sepp_nepp	6:fb11b746ceb5	992	return status;
sepp_nepp	6:fb11b746ceb5	993	}
sepp_nepp	6:fb11b746ceb5	994
sepp_nepp	7:3a1115c2556b	995	VL53L0X_Error VL53L0X::VL53L0X_get_device_mode(
sepp_nepp	6:fb11b746ceb5	996	VL53L0X_DeviceModes *p_device_mode)
sepp_nepp	6:fb11b746ceb5	997	{
sepp_nepp	6:fb11b746ceb5	998	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	999
sepp_nepp	6:fb11b746ceb5	1000
sepp_nepp	7:3a1115c2556b	1001	VL53L0X_GETPARAMETERFIELD( DeviceMode, *p_device_mode);
sepp_nepp	6:fb11b746ceb5	1002
sepp_nepp	6:fb11b746ceb5	1003
sepp_nepp	6:fb11b746ceb5	1004	return status;
sepp_nepp	6:fb11b746ceb5	1005	}
sepp_nepp	6:fb11b746ceb5	1006
sepp_nepp	7:3a1115c2556b	1007	VL53L0X_Error VL53L0X::VL53L0X_get_inter_measurement_period_milli_seconds(
sepp_nepp	6:fb11b746ceb5	1008	uint32_t *p_inter_measurement_period_milli_seconds)
sepp_nepp	6:fb11b746ceb5	1009	{
sepp_nepp	6:fb11b746ceb5	1010	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1011	uint16_t osc_calibrate_val;
sepp_nepp	6:fb11b746ceb5	1012	uint32_t im_period_milli_seconds;
sepp_nepp	6:fb11b746ceb5	1013
sepp_nepp	6:fb11b746ceb5	1014
sepp_nepp	6:fb11b746ceb5	1015
sepp_nepp	7:3a1115c2556b	1016	status = VL53L0X_read_word( VL53L0X_REG_OSC_CALIBRATE_VAL,
sepp_nepp	6:fb11b746ceb5	1017	&osc_calibrate_val);
sepp_nepp	6:fb11b746ceb5	1018
sepp_nepp	6:fb11b746ceb5	1019	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1020	status = VL53L0X_read_dword(
sepp_nepp	6:fb11b746ceb5	1021	VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD,
sepp_nepp	6:fb11b746ceb5	1022	&im_period_milli_seconds);
sepp_nepp	6:fb11b746ceb5	1023	}
sepp_nepp	6:fb11b746ceb5	1024
sepp_nepp	6:fb11b746ceb5	1025	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1026	if (osc_calibrate_val != 0) {
sepp_nepp	6:fb11b746ceb5	1027	*p_inter_measurement_period_milli_seconds =
sepp_nepp	6:fb11b746ceb5	1028	im_period_milli_seconds / osc_calibrate_val;
sepp_nepp	6:fb11b746ceb5	1029	}
sepp_nepp	7:3a1115c2556b	1030	VL53L0X_SETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1031	InterMeasurementPeriodMilliSeconds,
sepp_nepp	6:fb11b746ceb5	1032	*p_inter_measurement_period_milli_seconds);
sepp_nepp	6:fb11b746ceb5	1033	}
sepp_nepp	6:fb11b746ceb5	1034
sepp_nepp	6:fb11b746ceb5	1035
sepp_nepp	6:fb11b746ceb5	1036	return status;
sepp_nepp	6:fb11b746ceb5	1037	}
sepp_nepp	6:fb11b746ceb5	1038
sepp_nepp	7:3a1115c2556b	1039	VL53L0X_Error VL53L0X::VL53L0X_get_x_talk_compensation_rate_mega_cps(
sepp_nepp	6:fb11b746ceb5	1040	FixPoint1616_t *p_xtalk_compensation_rate_mega_cps)
sepp_nepp	6:fb11b746ceb5	1041	{
sepp_nepp	6:fb11b746ceb5	1042	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1043	uint16_t value;
sepp_nepp	6:fb11b746ceb5	1044	FixPoint1616_t temp_fix1616;
sepp_nepp	6:fb11b746ceb5	1045
sepp_nepp	6:fb11b746ceb5	1046
sepp_nepp	6:fb11b746ceb5	1047
sepp_nepp	7:3a1115c2556b	1048	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	1049	VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS, (uint16_t *)&value);
sepp_nepp	6:fb11b746ceb5	1050	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1051	if (value == 0) {
sepp_nepp	6:fb11b746ceb5	1052	/* the Xtalk is disabled return value from memory */
sepp_nepp	7:3a1115c2556b	1053	VL53L0X_GETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1054	XTalkCompensationRateMegaCps, temp_fix1616);
sepp_nepp	6:fb11b746ceb5	1055	*p_xtalk_compensation_rate_mega_cps = temp_fix1616;
sepp_nepp	7:3a1115c2556b	1056	VL53L0X_SETPARAMETERFIELD( XTalkCompensationEnable,
sepp_nepp	6:fb11b746ceb5	1057	0);
sepp_nepp	6:fb11b746ceb5	1058	} else {
sepp_nepp	6:fb11b746ceb5	1059	temp_fix1616 = VL53L0X_FIXPOINT313TOFIXPOINT1616(value);
sepp_nepp	6:fb11b746ceb5	1060	*p_xtalk_compensation_rate_mega_cps = temp_fix1616;
sepp_nepp	7:3a1115c2556b	1061	VL53L0X_SETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1062	XTalkCompensationRateMegaCps, temp_fix1616);
sepp_nepp	7:3a1115c2556b	1063	VL53L0X_SETPARAMETERFIELD( XTalkCompensationEnable,
sepp_nepp	6:fb11b746ceb5	1064	1);
sepp_nepp	6:fb11b746ceb5	1065	}
sepp_nepp	6:fb11b746ceb5	1066	}
sepp_nepp	6:fb11b746ceb5	1067
sepp_nepp	6:fb11b746ceb5	1068
sepp_nepp	6:fb11b746ceb5	1069	return status;
sepp_nepp	6:fb11b746ceb5	1070	}
sepp_nepp	6:fb11b746ceb5	1071
sepp_nepp	7:3a1115c2556b	1072	VL53L0X_Error VL53L0X::VL53L0X_get_limit_check_value( uint16_t limit_check_id,
sepp_nepp	6:fb11b746ceb5	1073	FixPoint1616_t *p_limit_check_value)
sepp_nepp	6:fb11b746ceb5	1074	{
sepp_nepp	6:fb11b746ceb5	1075	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1076	uint8_t enable_zero_value = 0;
sepp_nepp	6:fb11b746ceb5	1077	uint16_t temp16;
sepp_nepp	6:fb11b746ceb5	1078	FixPoint1616_t temp_fix1616;
sepp_nepp	6:fb11b746ceb5	1079
sepp_nepp	6:fb11b746ceb5	1080
sepp_nepp	6:fb11b746ceb5	1081
sepp_nepp	6:fb11b746ceb5	1082	switch (limit_check_id) {
sepp_nepp	6:fb11b746ceb5	1083
sepp_nepp	6:fb11b746ceb5	1084	case VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	1085	/* internal computation: */
sepp_nepp	7:3a1115c2556b	1086	VL53L0X_GETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1087	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, temp_fix1616);
sepp_nepp	6:fb11b746ceb5	1088	enable_zero_value = 0;
sepp_nepp	6:fb11b746ceb5	1089	break;
sepp_nepp	6:fb11b746ceb5	1090
sepp_nepp	6:fb11b746ceb5	1091	case VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE:
sepp_nepp	7:3a1115c2556b	1092	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	1093	VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT,
sepp_nepp	6:fb11b746ceb5	1094	&temp16);
sepp_nepp	6:fb11b746ceb5	1095	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1096	temp_fix1616 = VL53L0X_FIXPOINT97TOFIXPOINT1616(temp16);
sepp_nepp	6:fb11b746ceb5	1097	}
sepp_nepp	6:fb11b746ceb5	1098
sepp_nepp	6:fb11b746ceb5	1099
sepp_nepp	6:fb11b746ceb5	1100	enable_zero_value = 1;
sepp_nepp	6:fb11b746ceb5	1101	break;
sepp_nepp	6:fb11b746ceb5	1102
sepp_nepp	6:fb11b746ceb5	1103	case VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP:
sepp_nepp	6:fb11b746ceb5	1104	/* internal computation: */
sepp_nepp	7:3a1115c2556b	1105	VL53L0X_GETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1106	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, temp_fix1616);
sepp_nepp	6:fb11b746ceb5	1107	enable_zero_value = 0;
sepp_nepp	6:fb11b746ceb5	1108	break;
sepp_nepp	6:fb11b746ceb5	1109
sepp_nepp	6:fb11b746ceb5	1110	case VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD:
sepp_nepp	6:fb11b746ceb5	1111	/* internal computation: */
sepp_nepp	7:3a1115c2556b	1112	VL53L0X_GETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1113	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD, temp_fix1616);
sepp_nepp	6:fb11b746ceb5	1114	enable_zero_value = 0;
sepp_nepp	6:fb11b746ceb5	1115	break;
sepp_nepp	6:fb11b746ceb5	1116
sepp_nepp	6:fb11b746ceb5	1117	case VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC:
sepp_nepp	6:fb11b746ceb5	1118	case VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE:
sepp_nepp	7:3a1115c2556b	1119	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	1120	VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT,
sepp_nepp	6:fb11b746ceb5	1121	&temp16);
sepp_nepp	6:fb11b746ceb5	1122	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1123	temp_fix1616 = VL53L0X_FIXPOINT97TOFIXPOINT1616(temp16);
sepp_nepp	6:fb11b746ceb5	1124	}
sepp_nepp	6:fb11b746ceb5	1125
sepp_nepp	6:fb11b746ceb5	1126
sepp_nepp	6:fb11b746ceb5	1127	enable_zero_value = 0;
sepp_nepp	6:fb11b746ceb5	1128	break;
sepp_nepp	6:fb11b746ceb5	1129
sepp_nepp	6:fb11b746ceb5	1130	default:
sepp_nepp	6:fb11b746ceb5	1131	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1132
sepp_nepp	6:fb11b746ceb5	1133	}
sepp_nepp	6:fb11b746ceb5	1134
sepp_nepp	6:fb11b746ceb5	1135	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1136
sepp_nepp	6:fb11b746ceb5	1137	if (enable_zero_value == 1) {
sepp_nepp	6:fb11b746ceb5	1138
sepp_nepp	6:fb11b746ceb5	1139	if (temp_fix1616 == 0) {
sepp_nepp	6:fb11b746ceb5	1140	/* disabled: return value from memory */
sepp_nepp	7:3a1115c2556b	1141	VL53L0X_GETARRAYPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1142	LimitChecksValue, limit_check_id,
sepp_nepp	6:fb11b746ceb5	1143	temp_fix1616);
sepp_nepp	6:fb11b746ceb5	1144	*p_limit_check_value = temp_fix1616;
sepp_nepp	7:3a1115c2556b	1145	VL53L0X_SETARRAYPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1146	LimitChecksEnable, limit_check_id, 0);
sepp_nepp	6:fb11b746ceb5	1147	} else {
sepp_nepp	6:fb11b746ceb5	1148	*p_limit_check_value = temp_fix1616;
sepp_nepp	7:3a1115c2556b	1149	VL53L0X_SETARRAYPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1150	LimitChecksValue, limit_check_id,
sepp_nepp	6:fb11b746ceb5	1151	temp_fix1616);
sepp_nepp	7:3a1115c2556b	1152	VL53L0X_SETARRAYPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1153	LimitChecksEnable, limit_check_id, 1);
sepp_nepp	6:fb11b746ceb5	1154	}
sepp_nepp	6:fb11b746ceb5	1155	} else {
sepp_nepp	6:fb11b746ceb5	1156	*p_limit_check_value = temp_fix1616;
sepp_nepp	6:fb11b746ceb5	1157	}
sepp_nepp	6:fb11b746ceb5	1158	}
sepp_nepp	6:fb11b746ceb5	1159
sepp_nepp	6:fb11b746ceb5	1160
sepp_nepp	6:fb11b746ceb5	1161	return status;
sepp_nepp	6:fb11b746ceb5	1162
sepp_nepp	6:fb11b746ceb5	1163	}
sepp_nepp	6:fb11b746ceb5	1164
sepp_nepp	7:3a1115c2556b	1165	VL53L0X_Error VL53L0X::VL53L0X_get_limit_check_enable( uint16_t limit_check_id,
sepp_nepp	6:fb11b746ceb5	1166	uint8_t *p_limit_check_enable)
sepp_nepp	6:fb11b746ceb5	1167	{
sepp_nepp	6:fb11b746ceb5	1168	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1169	uint8_t temp8;
sepp_nepp	6:fb11b746ceb5	1170
sepp_nepp	6:fb11b746ceb5	1171
sepp_nepp	6:fb11b746ceb5	1172
sepp_nepp	6:fb11b746ceb5	1173	if (limit_check_id >= VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS) {
sepp_nepp	6:fb11b746ceb5	1174	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1175	*p_limit_check_enable = 0;
sepp_nepp	6:fb11b746ceb5	1176	} else {
sepp_nepp	7:3a1115c2556b	1177	VL53L0X_GETARRAYPARAMETERFIELD( LimitChecksEnable,
sepp_nepp	6:fb11b746ceb5	1178	limit_check_id, temp8);
sepp_nepp	6:fb11b746ceb5	1179	*p_limit_check_enable = temp8;
sepp_nepp	6:fb11b746ceb5	1180	}
sepp_nepp	6:fb11b746ceb5	1181
sepp_nepp	6:fb11b746ceb5	1182
sepp_nepp	6:fb11b746ceb5	1183	return status;
sepp_nepp	6:fb11b746ceb5	1184	}
sepp_nepp	6:fb11b746ceb5	1185
sepp_nepp	7:3a1115c2556b	1186	VL53L0X_Error VL53L0X::VL53L0X_get_wrap_around_check_enable(
sepp_nepp	6:fb11b746ceb5	1187	uint8_t *p_wrap_around_check_enable)
sepp_nepp	6:fb11b746ceb5	1188	{
sepp_nepp	6:fb11b746ceb5	1189	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1190	uint8_t data;
sepp_nepp	6:fb11b746ceb5	1191
sepp_nepp	6:fb11b746ceb5	1192
sepp_nepp	6:fb11b746ceb5	1193
sepp_nepp	7:3a1115c2556b	1194	status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, &data);
sepp_nepp	6:fb11b746ceb5	1195	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1196	PALDevDataSet( SequenceConfig, data);
sepp_nepp	6:fb11b746ceb5	1197	if (data & (0x01 << 7)) {
sepp_nepp	6:fb11b746ceb5	1198	*p_wrap_around_check_enable = 0x01;
sepp_nepp	6:fb11b746ceb5	1199	} else {
sepp_nepp	6:fb11b746ceb5	1200	*p_wrap_around_check_enable = 0x00;
sepp_nepp	6:fb11b746ceb5	1201	}
sepp_nepp	6:fb11b746ceb5	1202	}
sepp_nepp	6:fb11b746ceb5	1203	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1204	VL53L0X_SETPARAMETERFIELD( WrapAroundCheckEnable,
sepp_nepp	6:fb11b746ceb5	1205	*p_wrap_around_check_enable);
sepp_nepp	6:fb11b746ceb5	1206	}
sepp_nepp	6:fb11b746ceb5	1207
sepp_nepp	6:fb11b746ceb5	1208
sepp_nepp	6:fb11b746ceb5	1209	return status;
sepp_nepp	6:fb11b746ceb5	1210	}
sepp_nepp	6:fb11b746ceb5	1211
sepp_nepp	7:3a1115c2556b	1212	VL53L0X_Error VL53L0X::sequence_step_enabled(
sepp_nepp	6:fb11b746ceb5	1213	VL53L0X_SequenceStepId sequence_step_id, uint8_t sequence_config,
sepp_nepp	6:fb11b746ceb5	1214	uint8_t *p_sequence_step_enabled)
sepp_nepp	6:fb11b746ceb5	1215	{
sepp_nepp	6:fb11b746ceb5	1216	VL53L0X_Error Status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1217	*p_sequence_step_enabled = 0;
sepp_nepp	6:fb11b746ceb5	1218
sepp_nepp	6:fb11b746ceb5	1219
sepp_nepp	6:fb11b746ceb5	1220	switch (sequence_step_id) {
sepp_nepp	6:fb11b746ceb5	1221	case VL53L0X_SEQUENCESTEP_TCC:
sepp_nepp	6:fb11b746ceb5	1222	*p_sequence_step_enabled = (sequence_config & 0x10) >> 4;
sepp_nepp	6:fb11b746ceb5	1223	break;
sepp_nepp	6:fb11b746ceb5	1224	case VL53L0X_SEQUENCESTEP_DSS:
sepp_nepp	6:fb11b746ceb5	1225	*p_sequence_step_enabled = (sequence_config & 0x08) >> 3;
sepp_nepp	6:fb11b746ceb5	1226	break;
sepp_nepp	6:fb11b746ceb5	1227	case VL53L0X_SEQUENCESTEP_MSRC:
sepp_nepp	6:fb11b746ceb5	1228	*p_sequence_step_enabled = (sequence_config & 0x04) >> 2;
sepp_nepp	6:fb11b746ceb5	1229	break;
sepp_nepp	6:fb11b746ceb5	1230	case VL53L0X_SEQUENCESTEP_PRE_RANGE:
sepp_nepp	6:fb11b746ceb5	1231	*p_sequence_step_enabled = (sequence_config & 0x40) >> 6;
sepp_nepp	6:fb11b746ceb5	1232	break;
sepp_nepp	6:fb11b746ceb5	1233	case VL53L0X_SEQUENCESTEP_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	1234	*p_sequence_step_enabled = (sequence_config & 0x80) >> 7;
sepp_nepp	6:fb11b746ceb5	1235	break;
sepp_nepp	6:fb11b746ceb5	1236	default:
sepp_nepp	6:fb11b746ceb5	1237	Status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1238	}
sepp_nepp	6:fb11b746ceb5	1239
sepp_nepp	6:fb11b746ceb5	1240
sepp_nepp	6:fb11b746ceb5	1241	return Status;
sepp_nepp	6:fb11b746ceb5	1242	}
sepp_nepp	6:fb11b746ceb5	1243
sepp_nepp	7:3a1115c2556b	1244	VL53L0X_Error VL53L0X::VL53L0X_get_sequence_step_enables(
sepp_nepp	6:fb11b746ceb5	1245	VL53L0X_SchedulerSequenceSteps_t *p_scheduler_sequence_steps)
sepp_nepp	6:fb11b746ceb5	1246	{
sepp_nepp	6:fb11b746ceb5	1247	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1248	uint8_t sequence_config = 0;
sepp_nepp	6:fb11b746ceb5	1249
sepp_nepp	6:fb11b746ceb5	1250
sepp_nepp	7:3a1115c2556b	1251	status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,
sepp_nepp	6:fb11b746ceb5	1252	&sequence_config);
sepp_nepp	6:fb11b746ceb5	1253
sepp_nepp	6:fb11b746ceb5	1254	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1255	status = sequence_step_enabled(
sepp_nepp	6:fb11b746ceb5	1256	VL53L0X_SEQUENCESTEP_TCC, sequence_config,
sepp_nepp	6:fb11b746ceb5	1257	&p_scheduler_sequence_steps->TccOn);
sepp_nepp	6:fb11b746ceb5	1258	}
sepp_nepp	6:fb11b746ceb5	1259	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1260	status = sequence_step_enabled(
sepp_nepp	6:fb11b746ceb5	1261	VL53L0X_SEQUENCESTEP_DSS, sequence_config,
sepp_nepp	6:fb11b746ceb5	1262	&p_scheduler_sequence_steps->DssOn);
sepp_nepp	6:fb11b746ceb5	1263	}
sepp_nepp	6:fb11b746ceb5	1264	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1265	status = sequence_step_enabled(
sepp_nepp	6:fb11b746ceb5	1266	VL53L0X_SEQUENCESTEP_MSRC, sequence_config,
sepp_nepp	6:fb11b746ceb5	1267	&p_scheduler_sequence_steps->MsrcOn);
sepp_nepp	6:fb11b746ceb5	1268	}
sepp_nepp	6:fb11b746ceb5	1269	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1270	status = sequence_step_enabled(
sepp_nepp	6:fb11b746ceb5	1271	VL53L0X_SEQUENCESTEP_PRE_RANGE, sequence_config,
sepp_nepp	6:fb11b746ceb5	1272	&p_scheduler_sequence_steps->PreRangeOn);
sepp_nepp	6:fb11b746ceb5	1273	}
sepp_nepp	6:fb11b746ceb5	1274	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1275	status = sequence_step_enabled(
sepp_nepp	6:fb11b746ceb5	1276	VL53L0X_SEQUENCESTEP_FINAL_RANGE, sequence_config,
sepp_nepp	6:fb11b746ceb5	1277	&p_scheduler_sequence_steps->FinalRangeOn);
sepp_nepp	6:fb11b746ceb5	1278	}
sepp_nepp	6:fb11b746ceb5	1279
sepp_nepp	6:fb11b746ceb5	1280
sepp_nepp	6:fb11b746ceb5	1281	return status;
sepp_nepp	6:fb11b746ceb5	1282	}
sepp_nepp	6:fb11b746ceb5	1283
sepp_nepp	6:fb11b746ceb5	1284	uint8_t VL53L0X::VL53L0X_decode_vcsel_period(uint8_t vcsel_period_reg)
sepp_nepp	6:fb11b746ceb5	1285	{
sepp_nepp	6:fb11b746ceb5	1286	/*!
sepp_nepp	6:fb11b746ceb5	1287	* Converts the encoded VCSEL period register value into the real
sepp_nepp	6:fb11b746ceb5	1288	* period in PLL clocks
sepp_nepp	6:fb11b746ceb5	1289	*/
sepp_nepp	6:fb11b746ceb5	1290
sepp_nepp	6:fb11b746ceb5	1291	uint8_t vcsel_period_pclks = 0;
sepp_nepp	6:fb11b746ceb5	1292
sepp_nepp	6:fb11b746ceb5	1293	vcsel_period_pclks = (vcsel_period_reg + 1) << 1;
sepp_nepp	6:fb11b746ceb5	1294
sepp_nepp	6:fb11b746ceb5	1295	return vcsel_period_pclks;
sepp_nepp	6:fb11b746ceb5	1296	}
sepp_nepp	6:fb11b746ceb5	1297
sepp_nepp	6:fb11b746ceb5	1298	uint8_t VL53L0X::lv53l0x_encode_vcsel_period(uint8_t vcsel_period_pclks)
sepp_nepp	6:fb11b746ceb5	1299	{
sepp_nepp	6:fb11b746ceb5	1300	/*!
sepp_nepp	6:fb11b746ceb5	1301	* Converts the encoded VCSEL period register value into the real period
sepp_nepp	6:fb11b746ceb5	1302	* in PLL clocks
sepp_nepp	6:fb11b746ceb5	1303	*/
sepp_nepp	6:fb11b746ceb5	1304
sepp_nepp	6:fb11b746ceb5	1305	uint8_t vcsel_period_reg = 0;
sepp_nepp	6:fb11b746ceb5	1306
sepp_nepp	6:fb11b746ceb5	1307	vcsel_period_reg = (vcsel_period_pclks >> 1) - 1;
sepp_nepp	6:fb11b746ceb5	1308
sepp_nepp	6:fb11b746ceb5	1309	return vcsel_period_reg;
sepp_nepp	6:fb11b746ceb5	1310	}
sepp_nepp	6:fb11b746ceb5	1311
sepp_nepp	6:fb11b746ceb5	1312
sepp_nepp	7:3a1115c2556b	1313	VL53L0X_Error VL53L0X::wrapped_VL53L0X_set_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1314	VL53L0X_VcselPeriod vcsel_period_type, uint8_t vcsel_pulse_period_pclk)
sepp_nepp	6:fb11b746ceb5	1315	{
sepp_nepp	6:fb11b746ceb5	1316	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1317	uint8_t vcsel_period_reg;
sepp_nepp	6:fb11b746ceb5	1318	uint8_t min_pre_vcsel_period_pclk = 12;
sepp_nepp	6:fb11b746ceb5	1319	uint8_t max_pre_vcsel_period_pclk = 18;
sepp_nepp	6:fb11b746ceb5	1320	uint8_t min_final_vcsel_period_pclk = 8;
sepp_nepp	6:fb11b746ceb5	1321	uint8_t max_final_vcsel_period_pclk = 14;
sepp_nepp	6:fb11b746ceb5	1322	uint32_t measurement_timing_budget_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1323	uint32_t final_range_timeout_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1324	uint32_t pre_range_timeout_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1325	uint32_t msrc_timeout_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1326	uint8_t phase_cal_int = 0;
sepp_nepp	6:fb11b746ceb5	1327
sepp_nepp	6:fb11b746ceb5	1328	/* Check if valid clock period requested */
sepp_nepp	6:fb11b746ceb5	1329
sepp_nepp	6:fb11b746ceb5	1330	if ((vcsel_pulse_period_pclk % 2) != 0) {
sepp_nepp	6:fb11b746ceb5	1331	/* Value must be an even number */
sepp_nepp	6:fb11b746ceb5	1332	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1333	} else if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_PRE_RANGE &&
sepp_nepp	6:fb11b746ceb5	1334	(vcsel_pulse_period_pclk < min_pre_vcsel_period_pclk \|\|
sepp_nepp	6:fb11b746ceb5	1335	vcsel_pulse_period_pclk > max_pre_vcsel_period_pclk)) {
sepp_nepp	6:fb11b746ceb5	1336	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1337	} else if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_FINAL_RANGE &&
sepp_nepp	6:fb11b746ceb5	1338	(vcsel_pulse_period_pclk < min_final_vcsel_period_pclk \|\|
sepp_nepp	6:fb11b746ceb5	1339	vcsel_pulse_period_pclk > max_final_vcsel_period_pclk)) {
sepp_nepp	6:fb11b746ceb5	1340
sepp_nepp	6:fb11b746ceb5	1341	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1342	}
sepp_nepp	6:fb11b746ceb5	1343
sepp_nepp	6:fb11b746ceb5	1344	/* Apply specific settings for the requested clock period */
sepp_nepp	6:fb11b746ceb5	1345
sepp_nepp	6:fb11b746ceb5	1346	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1347	return status;
sepp_nepp	6:fb11b746ceb5	1348	}
sepp_nepp	6:fb11b746ceb5	1349
sepp_nepp	6:fb11b746ceb5	1350
sepp_nepp	6:fb11b746ceb5	1351	if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_PRE_RANGE) {
sepp_nepp	6:fb11b746ceb5	1352
sepp_nepp	6:fb11b746ceb5	1353	/* Set phase check limits */
sepp_nepp	6:fb11b746ceb5	1354	if (vcsel_pulse_period_pclk == 12) {
sepp_nepp	6:fb11b746ceb5	1355
sepp_nepp	7:3a1115c2556b	1356	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1357	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1358	0x18);
sepp_nepp	7:3a1115c2556b	1359	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1360	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1361	0x08);
sepp_nepp	6:fb11b746ceb5	1362	} else if (vcsel_pulse_period_pclk == 14) {
sepp_nepp	6:fb11b746ceb5	1363
sepp_nepp	7:3a1115c2556b	1364	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1365	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1366	0x30);
sepp_nepp	7:3a1115c2556b	1367	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1368	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1369	0x08);
sepp_nepp	6:fb11b746ceb5	1370	} else if (vcsel_pulse_period_pclk == 16) {
sepp_nepp	6:fb11b746ceb5	1371
sepp_nepp	7:3a1115c2556b	1372	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1373	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1374	0x40);
sepp_nepp	7:3a1115c2556b	1375	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1376	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1377	0x08);
sepp_nepp	6:fb11b746ceb5	1378	} else if (vcsel_pulse_period_pclk == 18) {
sepp_nepp	6:fb11b746ceb5	1379
sepp_nepp	7:3a1115c2556b	1380	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1381	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1382	0x50);
sepp_nepp	7:3a1115c2556b	1383	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1384	VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1385	0x08);
sepp_nepp	6:fb11b746ceb5	1386	}
sepp_nepp	6:fb11b746ceb5	1387	} else if (vcsel_period_type == VL53L0X_VCSEL_PERIOD_FINAL_RANGE) {
sepp_nepp	6:fb11b746ceb5	1388
sepp_nepp	6:fb11b746ceb5	1389	if (vcsel_pulse_period_pclk == 8) {
sepp_nepp	6:fb11b746ceb5	1390
sepp_nepp	7:3a1115c2556b	1391	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1392	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1393	0x10);
sepp_nepp	7:3a1115c2556b	1394	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1395	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1396	0x08);
sepp_nepp	6:fb11b746ceb5	1397
sepp_nepp	7:3a1115c2556b	1398	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1399	VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x02);
sepp_nepp	7:3a1115c2556b	1400	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1401	VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x0C);
sepp_nepp	6:fb11b746ceb5	1402
sepp_nepp	7:3a1115c2556b	1403	status \|= VL53L0X_write_byte( 0xff, 0x01);
sepp_nepp	7:3a1115c2556b	1404	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1405	VL53L0X_REG_ALGO_PHASECAL_LIM,
sepp_nepp	6:fb11b746ceb5	1406	0x30);
sepp_nepp	7:3a1115c2556b	1407	status \|= VL53L0X_write_byte( 0xff, 0x00);
sepp_nepp	6:fb11b746ceb5	1408	} else if (vcsel_pulse_period_pclk == 10) {
sepp_nepp	6:fb11b746ceb5	1409
sepp_nepp	7:3a1115c2556b	1410	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1411	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1412	0x28);
sepp_nepp	7:3a1115c2556b	1413	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1414	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1415	0x08);
sepp_nepp	6:fb11b746ceb5	1416
sepp_nepp	7:3a1115c2556b	1417	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1418	VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x03);
sepp_nepp	7:3a1115c2556b	1419	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1420	VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x09);
sepp_nepp	6:fb11b746ceb5	1421
sepp_nepp	7:3a1115c2556b	1422	status \|= VL53L0X_write_byte( 0xff, 0x01);
sepp_nepp	7:3a1115c2556b	1423	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1424	VL53L0X_REG_ALGO_PHASECAL_LIM,
sepp_nepp	6:fb11b746ceb5	1425	0x20);
sepp_nepp	7:3a1115c2556b	1426	status \|= VL53L0X_write_byte( 0xff, 0x00);
sepp_nepp	6:fb11b746ceb5	1427	} else if (vcsel_pulse_period_pclk == 12) {
sepp_nepp	6:fb11b746ceb5	1428
sepp_nepp	7:3a1115c2556b	1429	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1430	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1431	0x38);
sepp_nepp	7:3a1115c2556b	1432	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1433	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1434	0x08);
sepp_nepp	6:fb11b746ceb5	1435
sepp_nepp	7:3a1115c2556b	1436	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1437	VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x03);
sepp_nepp	7:3a1115c2556b	1438	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1439	VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x08);
sepp_nepp	6:fb11b746ceb5	1440
sepp_nepp	7:3a1115c2556b	1441	status \|= VL53L0X_write_byte( 0xff, 0x01);
sepp_nepp	7:3a1115c2556b	1442	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1443	VL53L0X_REG_ALGO_PHASECAL_LIM,
sepp_nepp	6:fb11b746ceb5	1444	0x20);
sepp_nepp	7:3a1115c2556b	1445	status \|= VL53L0X_write_byte( 0xff, 0x00);
sepp_nepp	6:fb11b746ceb5	1446	} else if (vcsel_pulse_period_pclk == 14) {
sepp_nepp	6:fb11b746ceb5	1447
sepp_nepp	7:3a1115c2556b	1448	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1449	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,
sepp_nepp	6:fb11b746ceb5	1450	0x048);
sepp_nepp	7:3a1115c2556b	1451	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1452	VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,
sepp_nepp	6:fb11b746ceb5	1453	0x08);
sepp_nepp	6:fb11b746ceb5	1454
sepp_nepp	7:3a1115c2556b	1455	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1456	VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH, 0x03);
sepp_nepp	7:3a1115c2556b	1457	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1458	VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT, 0x07);
sepp_nepp	6:fb11b746ceb5	1459
sepp_nepp	7:3a1115c2556b	1460	status \|= VL53L0X_write_byte( 0xff, 0x01);
sepp_nepp	7:3a1115c2556b	1461	status \|= VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1462	VL53L0X_REG_ALGO_PHASECAL_LIM,
sepp_nepp	6:fb11b746ceb5	1463	0x20);
sepp_nepp	7:3a1115c2556b	1464	status \|= VL53L0X_write_byte( 0xff, 0x00);
sepp_nepp	6:fb11b746ceb5	1465	}
sepp_nepp	6:fb11b746ceb5	1466	}
sepp_nepp	6:fb11b746ceb5	1467
sepp_nepp	6:fb11b746ceb5	1468
sepp_nepp	6:fb11b746ceb5	1469	/* Re-calculate and apply timeouts, in macro periods */
sepp_nepp	6:fb11b746ceb5	1470
sepp_nepp	6:fb11b746ceb5	1471	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1472	vcsel_period_reg = lv53l0x_encode_vcsel_period((uint8_t)
sepp_nepp	6:fb11b746ceb5	1473	vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	1474
sepp_nepp	6:fb11b746ceb5	1475	/* When the VCSEL period for the pre or final range is changed,
sepp_nepp	6:fb11b746ceb5	1476	* the corresponding timeout must be read from the device using
sepp_nepp	6:fb11b746ceb5	1477	* the current VCSEL period, then the new VCSEL period can be
sepp_nepp	6:fb11b746ceb5	1478	* applied. The timeout then must be written back to the device
sepp_nepp	6:fb11b746ceb5	1479	* using the new VCSEL period.
sepp_nepp	6:fb11b746ceb5	1480	*
sepp_nepp	6:fb11b746ceb5	1481	* For the MSRC timeout, the same applies - this timeout being
sepp_nepp	6:fb11b746ceb5	1482	* dependant on the pre-range vcsel period.
sepp_nepp	6:fb11b746ceb5	1483	*/
sepp_nepp	6:fb11b746ceb5	1484	switch (vcsel_period_type) {
sepp_nepp	6:fb11b746ceb5	1485	case VL53L0X_VCSEL_PERIOD_PRE_RANGE:
sepp_nepp	7:3a1115c2556b	1486	status = get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1487	VL53L0X_SEQUENCESTEP_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1488	&pre_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1489
sepp_nepp	6:fb11b746ceb5	1490	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1491	status = get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1492	VL53L0X_SEQUENCESTEP_MSRC,
sepp_nepp	6:fb11b746ceb5	1493	&msrc_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1494
sepp_nepp	6:fb11b746ceb5	1495	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1496	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1497	VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD,
sepp_nepp	6:fb11b746ceb5	1498	vcsel_period_reg);
sepp_nepp	6:fb11b746ceb5	1499
sepp_nepp	6:fb11b746ceb5	1500
sepp_nepp	6:fb11b746ceb5	1501	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1502	status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1503	pre_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1504
sepp_nepp	6:fb11b746ceb5	1505
sepp_nepp	6:fb11b746ceb5	1506	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1507	status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_MSRC,
sepp_nepp	6:fb11b746ceb5	1508	msrc_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1509
sepp_nepp	7:3a1115c2556b	1510	VL53L0X_SETDEVICESPECIFICPARAMETER( PreRangeVcselPulsePeriod,vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	1511	break;
sepp_nepp	6:fb11b746ceb5	1512	case VL53L0X_VCSEL_PERIOD_FINAL_RANGE:
sepp_nepp	7:3a1115c2556b	1513	status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	1514	&final_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1515
sepp_nepp	6:fb11b746ceb5	1516	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1517	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	1518	VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD,
sepp_nepp	6:fb11b746ceb5	1519	vcsel_period_reg);
sepp_nepp	6:fb11b746ceb5	1520
sepp_nepp	6:fb11b746ceb5	1521
sepp_nepp	6:fb11b746ceb5	1522	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1523	status = set_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1524	VL53L0X_SEQUENCESTEP_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	1525	final_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1526
sepp_nepp	7:3a1115c2556b	1527	VL53L0X_SETDEVICESPECIFICPARAMETER(FinalRangeVcselPulsePeriod,vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	1528	break;
sepp_nepp	6:fb11b746ceb5	1529	default:
sepp_nepp	6:fb11b746ceb5	1530	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1531	}
sepp_nepp	6:fb11b746ceb5	1532	}
sepp_nepp	6:fb11b746ceb5	1533
sepp_nepp	6:fb11b746ceb5	1534	/* Finally, the timing budget must be re-applied */
sepp_nepp	6:fb11b746ceb5	1535	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1536	VL53L0X_GETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1537	MeasurementTimingBudgetMicroSeconds,
sepp_nepp	6:fb11b746ceb5	1538	measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1539
sepp_nepp	7:3a1115c2556b	1540	status = VL53L0X_set_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	1541	measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1542	}
sepp_nepp	6:fb11b746ceb5	1543
sepp_nepp	6:fb11b746ceb5	1544	/* Perform the phase calibration. This is needed after changing on
sepp_nepp	6:fb11b746ceb5	1545	* vcsel period.
sepp_nepp	6:fb11b746ceb5	1546	* get_data_enable = 0, restore_config = 1 */
sepp_nepp	6:fb11b746ceb5	1547	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1548	status = VL53L0X_perform_phase_calibration(&phase_cal_int, 0, 1);
sepp_nepp	6:fb11b746ceb5	1549
sepp_nepp	6:fb11b746ceb5	1550	return status;
sepp_nepp	6:fb11b746ceb5	1551	}
sepp_nepp	6:fb11b746ceb5	1552
sepp_nepp	7:3a1115c2556b	1553	VL53L0X_Error VL53L0X::VL53L0X_set_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1554	VL53L0X_VcselPeriod vcsel_period_type, uint8_t vcsel_pulse_period)
sepp_nepp	6:fb11b746ceb5	1555	{
sepp_nepp	6:fb11b746ceb5	1556	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1557
sepp_nepp	6:fb11b746ceb5	1558
sepp_nepp	7:3a1115c2556b	1559	status = wrapped_VL53L0X_set_vcsel_pulse_period( vcsel_period_type,
sepp_nepp	6:fb11b746ceb5	1560	vcsel_pulse_period);
sepp_nepp	6:fb11b746ceb5	1561
sepp_nepp	6:fb11b746ceb5	1562
sepp_nepp	6:fb11b746ceb5	1563	return status;
sepp_nepp	6:fb11b746ceb5	1564	}
sepp_nepp	6:fb11b746ceb5	1565
sepp_nepp	7:3a1115c2556b	1566	VL53L0X_Error VL53L0X::wrapped_VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1567	VL53L0X_VcselPeriod vcsel_period_type, uint8_t *p_vcsel_pulse_period_pclk)
sepp_nepp	6:fb11b746ceb5	1568	{
sepp_nepp	6:fb11b746ceb5	1569	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1570	uint8_t vcsel_period_reg;
sepp_nepp	6:fb11b746ceb5	1571
sepp_nepp	6:fb11b746ceb5	1572	switch (vcsel_period_type) {
sepp_nepp	6:fb11b746ceb5	1573	case VL53L0X_VCSEL_PERIOD_PRE_RANGE:
sepp_nepp	7:3a1115c2556b	1574	status = VL53L0X_read_byte(
sepp_nepp	6:fb11b746ceb5	1575	VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD,
sepp_nepp	6:fb11b746ceb5	1576	&vcsel_period_reg);
sepp_nepp	6:fb11b746ceb5	1577	break;
sepp_nepp	6:fb11b746ceb5	1578	case VL53L0X_VCSEL_PERIOD_FINAL_RANGE:
sepp_nepp	7:3a1115c2556b	1579	status = VL53L0X_read_byte(
sepp_nepp	6:fb11b746ceb5	1580	VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD,
sepp_nepp	6:fb11b746ceb5	1581	&vcsel_period_reg);
sepp_nepp	6:fb11b746ceb5	1582	break;
sepp_nepp	6:fb11b746ceb5	1583	default:
sepp_nepp	6:fb11b746ceb5	1584	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1585	}
sepp_nepp	6:fb11b746ceb5	1586
sepp_nepp	6:fb11b746ceb5	1587	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	6:fb11b746ceb5	1588	*p_vcsel_pulse_period_pclk =
sepp_nepp	6:fb11b746ceb5	1589	VL53L0X_decode_vcsel_period(vcsel_period_reg);
sepp_nepp	6:fb11b746ceb5	1590
sepp_nepp	6:fb11b746ceb5	1591	return status;
sepp_nepp	6:fb11b746ceb5	1592	}
sepp_nepp	6:fb11b746ceb5	1593
sepp_nepp	7:3a1115c2556b	1594	VL53L0X_Error VL53L0X::VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1595	VL53L0X_VcselPeriod vcsel_period_type, uint8_t *p_vcsel_pulse_period_pclk)
sepp_nepp	6:fb11b746ceb5	1596	{
sepp_nepp	6:fb11b746ceb5	1597	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1598
sepp_nepp	6:fb11b746ceb5	1599
sepp_nepp	7:3a1115c2556b	1600	status = wrapped_VL53L0X_get_vcsel_pulse_period( vcsel_period_type,
sepp_nepp	6:fb11b746ceb5	1601	p_vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	1602
sepp_nepp	6:fb11b746ceb5	1603
sepp_nepp	6:fb11b746ceb5	1604	return status;
sepp_nepp	6:fb11b746ceb5	1605	}
sepp_nepp	6:fb11b746ceb5	1606
sepp_nepp	6:fb11b746ceb5	1607	uint32_t VL53L0X::VL53L0X_decode_timeout(uint16_t encoded_timeout)
sepp_nepp	6:fb11b746ceb5	1608	{
sepp_nepp	6:fb11b746ceb5	1609	/*!
sepp_nepp	6:fb11b746ceb5	1610	* Decode 16-bit timeout register value - format (LSByte * 2^MSByte) + 1
sepp_nepp	6:fb11b746ceb5	1611	*/
sepp_nepp	6:fb11b746ceb5	1612
sepp_nepp	6:fb11b746ceb5	1613	uint32_t timeout_macro_clks = 0;
sepp_nepp	6:fb11b746ceb5	1614
sepp_nepp	6:fb11b746ceb5	1615	timeout_macro_clks = ((uint32_t)(encoded_timeout & 0x00FF)
sepp_nepp	6:fb11b746ceb5	1616	<< (uint32_t)((encoded_timeout & 0xFF00) >> 8)) + 1;
sepp_nepp	6:fb11b746ceb5	1617
sepp_nepp	6:fb11b746ceb5	1618	return timeout_macro_clks;
sepp_nepp	6:fb11b746ceb5	1619	}
sepp_nepp	6:fb11b746ceb5	1620
sepp_nepp	7:3a1115c2556b	1621	uint32_t VL53L0X::VL53L0X_calc_macro_period_ps( uint8_t vcsel_period_pclks)
sepp_nepp	6:fb11b746ceb5	1622	{
sepp_nepp	6:fb11b746ceb5	1623	uint64_t pll_period_ps;
sepp_nepp	6:fb11b746ceb5	1624	uint32_t macro_period_vclks;
sepp_nepp	6:fb11b746ceb5	1625	uint32_t macro_period_ps;
sepp_nepp	6:fb11b746ceb5	1626
sepp_nepp	6:fb11b746ceb5	1627
sepp_nepp	6:fb11b746ceb5	1628
sepp_nepp	6:fb11b746ceb5	1629	/* The above calculation will produce rounding errors,
sepp_nepp	6:fb11b746ceb5	1630	therefore set fixed value
sepp_nepp	6:fb11b746ceb5	1631	*/
sepp_nepp	6:fb11b746ceb5	1632	pll_period_ps = 1655;
sepp_nepp	6:fb11b746ceb5	1633
sepp_nepp	6:fb11b746ceb5	1634	macro_period_vclks = 2304;
sepp_nepp	6:fb11b746ceb5	1635	macro_period_ps = (uint32_t)(macro_period_vclks
sepp_nepp	6:fb11b746ceb5	1636	* vcsel_period_pclks * pll_period_ps);
sepp_nepp	6:fb11b746ceb5	1637
sepp_nepp	6:fb11b746ceb5	1638	return macro_period_ps;
sepp_nepp	6:fb11b746ceb5	1639	}
sepp_nepp	6:fb11b746ceb5	1640
sepp_nepp	6:fb11b746ceb5	1641	/* To convert register value into us */
sepp_nepp	7:3a1115c2556b	1642	uint32_t VL53L0X::VL53L0X_calc_timeout_us(
sepp_nepp	6:fb11b746ceb5	1643	uint16_t timeout_period_mclks,
sepp_nepp	6:fb11b746ceb5	1644	uint8_t vcsel_period_pclks)
sepp_nepp	6:fb11b746ceb5	1645	{
sepp_nepp	6:fb11b746ceb5	1646	uint32_t macro_period_ps;
sepp_nepp	6:fb11b746ceb5	1647	uint32_t macro_period_ns;
sepp_nepp	6:fb11b746ceb5	1648	uint32_t actual_timeout_period_us = 0;
sepp_nepp	6:fb11b746ceb5	1649
sepp_nepp	7:3a1115c2556b	1650	macro_period_ps = VL53L0X_calc_macro_period_ps( vcsel_period_pclks);
sepp_nepp	6:fb11b746ceb5	1651	macro_period_ns = (macro_period_ps + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	1652
sepp_nepp	6:fb11b746ceb5	1653	actual_timeout_period_us =
sepp_nepp	6:fb11b746ceb5	1654	((timeout_period_mclks * macro_period_ns) + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	1655
sepp_nepp	6:fb11b746ceb5	1656	return actual_timeout_period_us;
sepp_nepp	6:fb11b746ceb5	1657	}
sepp_nepp	6:fb11b746ceb5	1658
sepp_nepp	7:3a1115c2556b	1659	VL53L0X_Error VL53L0X::get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1660	VL53L0X_SequenceStepId sequence_step_id,
sepp_nepp	6:fb11b746ceb5	1661	uint32_t *p_time_out_micro_secs)
sepp_nepp	6:fb11b746ceb5	1662	{
sepp_nepp	6:fb11b746ceb5	1663	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1664	uint8_t current_vcsel_pulse_period_p_clk;
sepp_nepp	6:fb11b746ceb5	1665	uint8_t encoded_time_out_byte = 0;
sepp_nepp	6:fb11b746ceb5	1666	uint32_t timeout_micro_seconds = 0;
sepp_nepp	6:fb11b746ceb5	1667	uint16_t pre_range_encoded_time_out = 0;
sepp_nepp	6:fb11b746ceb5	1668	uint16_t msrc_time_out_m_clks;
sepp_nepp	6:fb11b746ceb5	1669	uint16_t pre_range_time_out_m_clks;
sepp_nepp	6:fb11b746ceb5	1670	uint16_t final_range_time_out_m_clks = 0;
sepp_nepp	6:fb11b746ceb5	1671	uint16_t final_range_encoded_time_out;
sepp_nepp	6:fb11b746ceb5	1672	VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps;
sepp_nepp	6:fb11b746ceb5	1673
sepp_nepp	6:fb11b746ceb5	1674	if ((sequence_step_id == VL53L0X_SEQUENCESTEP_TCC) \|\|
sepp_nepp	6:fb11b746ceb5	1675	(sequence_step_id == VL53L0X_SEQUENCESTEP_DSS) \|\|
sepp_nepp	6:fb11b746ceb5	1676	(sequence_step_id == VL53L0X_SEQUENCESTEP_MSRC)) {
sepp_nepp	6:fb11b746ceb5	1677
sepp_nepp	7:3a1115c2556b	1678	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1679	VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1680	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1681	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1682	status = VL53L0X_read_byte(
sepp_nepp	6:fb11b746ceb5	1683	VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP,
sepp_nepp	6:fb11b746ceb5	1684	&encoded_time_out_byte);
sepp_nepp	6:fb11b746ceb5	1685	}
sepp_nepp	6:fb11b746ceb5	1686	msrc_time_out_m_clks = VL53L0X_decode_timeout(encoded_time_out_byte);
sepp_nepp	6:fb11b746ceb5	1687
sepp_nepp	7:3a1115c2556b	1688	timeout_micro_seconds = VL53L0X_calc_timeout_us(
sepp_nepp	6:fb11b746ceb5	1689	msrc_time_out_m_clks,
sepp_nepp	6:fb11b746ceb5	1690	current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1691	} else if (sequence_step_id == VL53L0X_SEQUENCESTEP_PRE_RANGE) {
sepp_nepp	6:fb11b746ceb5	1692	/* Retrieve PRE-RANGE VCSEL Period */
sepp_nepp	7:3a1115c2556b	1693	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1694	VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1695	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1696
sepp_nepp	6:fb11b746ceb5	1697	/* Retrieve PRE-RANGE Timeout in Macro periods (MCLKS) */
sepp_nepp	6:fb11b746ceb5	1698	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1699
sepp_nepp	6:fb11b746ceb5	1700	/* Retrieve PRE-RANGE VCSEL Period */
sepp_nepp	7:3a1115c2556b	1701	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1702	VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1703	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1704
sepp_nepp	6:fb11b746ceb5	1705	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1706	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	1707	VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI,
sepp_nepp	6:fb11b746ceb5	1708	&pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	1709	}
sepp_nepp	6:fb11b746ceb5	1710
sepp_nepp	6:fb11b746ceb5	1711	pre_range_time_out_m_clks = VL53L0X_decode_timeout(
sepp_nepp	6:fb11b746ceb5	1712	pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	1713
sepp_nepp	7:3a1115c2556b	1714	timeout_micro_seconds = VL53L0X_calc_timeout_us(
sepp_nepp	6:fb11b746ceb5	1715	pre_range_time_out_m_clks,
sepp_nepp	6:fb11b746ceb5	1716	current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1717	}
sepp_nepp	6:fb11b746ceb5	1718	} else if (sequence_step_id == VL53L0X_SEQUENCESTEP_FINAL_RANGE) {
sepp_nepp	6:fb11b746ceb5	1719
sepp_nepp	7:3a1115c2556b	1720	VL53L0X_get_sequence_step_enables( &scheduler_sequence_steps);
sepp_nepp	6:fb11b746ceb5	1721	pre_range_time_out_m_clks = 0;
sepp_nepp	6:fb11b746ceb5	1722
sepp_nepp	6:fb11b746ceb5	1723	if (scheduler_sequence_steps.PreRangeOn) {
sepp_nepp	6:fb11b746ceb5	1724	/* Retrieve PRE-RANGE VCSEL Period */
sepp_nepp	7:3a1115c2556b	1725	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1726	VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1727	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1728
sepp_nepp	6:fb11b746ceb5	1729	/* Retrieve PRE-RANGE Timeout in Macro periods
sepp_nepp	6:fb11b746ceb5	1730	* (MCLKS) */
sepp_nepp	6:fb11b746ceb5	1731	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1732	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	1733	VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI,
sepp_nepp	6:fb11b746ceb5	1734	&pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	1735	pre_range_time_out_m_clks = VL53L0X_decode_timeout(
sepp_nepp	6:fb11b746ceb5	1736	pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	1737	}
sepp_nepp	6:fb11b746ceb5	1738	}
sepp_nepp	6:fb11b746ceb5	1739
sepp_nepp	6:fb11b746ceb5	1740	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1741	/* Retrieve FINAL-RANGE VCSEL Period */
sepp_nepp	7:3a1115c2556b	1742	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	1743	VL53L0X_VCSEL_PERIOD_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	1744	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1745	}
sepp_nepp	6:fb11b746ceb5	1746
sepp_nepp	6:fb11b746ceb5	1747	/* Retrieve FINAL-RANGE Timeout in Macro periods (MCLKS) */
sepp_nepp	6:fb11b746ceb5	1748	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1749	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	1750	VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI,
sepp_nepp	6:fb11b746ceb5	1751	&final_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	1752	final_range_time_out_m_clks = VL53L0X_decode_timeout(
sepp_nepp	6:fb11b746ceb5	1753	final_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	1754	}
sepp_nepp	6:fb11b746ceb5	1755
sepp_nepp	6:fb11b746ceb5	1756	final_range_time_out_m_clks -= pre_range_time_out_m_clks;
sepp_nepp	7:3a1115c2556b	1757	timeout_micro_seconds = VL53L0X_calc_timeout_us(
sepp_nepp	6:fb11b746ceb5	1758	final_range_time_out_m_clks,
sepp_nepp	6:fb11b746ceb5	1759	current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	1760	}
sepp_nepp	6:fb11b746ceb5	1761
sepp_nepp	6:fb11b746ceb5	1762	*p_time_out_micro_secs = timeout_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1763
sepp_nepp	6:fb11b746ceb5	1764	return status;
sepp_nepp	6:fb11b746ceb5	1765	}
sepp_nepp	6:fb11b746ceb5	1766
sepp_nepp	7:3a1115c2556b	1767	VL53L0X_Error VL53L0X::wrapped_VL53L0X_get_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	1768	uint32_t *p_measurement_timing_budget_micro_seconds)
sepp_nepp	6:fb11b746ceb5	1769	{
sepp_nepp	6:fb11b746ceb5	1770	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1771	VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps;
sepp_nepp	6:fb11b746ceb5	1772	uint32_t final_range_timeout_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1773	uint32_t msrc_dcc_tcc_timeout_micro_seconds = 2000;
sepp_nepp	6:fb11b746ceb5	1774	uint32_t start_overhead_micro_seconds = 1910;
sepp_nepp	6:fb11b746ceb5	1775	uint32_t end_overhead_micro_seconds = 960;
sepp_nepp	6:fb11b746ceb5	1776	uint32_t msrc_overhead_micro_seconds = 660;
sepp_nepp	6:fb11b746ceb5	1777	uint32_t tcc_overhead_micro_seconds = 590;
sepp_nepp	6:fb11b746ceb5	1778	uint32_t dss_overhead_micro_seconds = 690;
sepp_nepp	6:fb11b746ceb5	1779	uint32_t pre_range_overhead_micro_seconds = 660;
sepp_nepp	6:fb11b746ceb5	1780	uint32_t final_range_overhead_micro_seconds = 550;
sepp_nepp	6:fb11b746ceb5	1781	uint32_t pre_range_timeout_micro_seconds = 0;
sepp_nepp	6:fb11b746ceb5	1782
sepp_nepp	6:fb11b746ceb5	1783
sepp_nepp	6:fb11b746ceb5	1784
sepp_nepp	6:fb11b746ceb5	1785	/* Start and end overhead times always present */
sepp_nepp	6:fb11b746ceb5	1786	*p_measurement_timing_budget_micro_seconds
sepp_nepp	6:fb11b746ceb5	1787	= start_overhead_micro_seconds + end_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1788
sepp_nepp	7:3a1115c2556b	1789	status = VL53L0X_get_sequence_step_enables( &scheduler_sequence_steps);
sepp_nepp	6:fb11b746ceb5	1790
sepp_nepp	6:fb11b746ceb5	1791	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1792
sepp_nepp	6:fb11b746ceb5	1793	return status;
sepp_nepp	6:fb11b746ceb5	1794	}
sepp_nepp	6:fb11b746ceb5	1795
sepp_nepp	6:fb11b746ceb5	1796
sepp_nepp	6:fb11b746ceb5	1797	if (scheduler_sequence_steps.TccOn \|\|
sepp_nepp	6:fb11b746ceb5	1798	scheduler_sequence_steps.MsrcOn \|\|
sepp_nepp	6:fb11b746ceb5	1799	scheduler_sequence_steps.DssOn) {
sepp_nepp	6:fb11b746ceb5	1800
sepp_nepp	7:3a1115c2556b	1801	status = get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1802	VL53L0X_SEQUENCESTEP_MSRC,
sepp_nepp	6:fb11b746ceb5	1803	&msrc_dcc_tcc_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1804
sepp_nepp	6:fb11b746ceb5	1805	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1806	if (scheduler_sequence_steps.TccOn) {
sepp_nepp	6:fb11b746ceb5	1807	*p_measurement_timing_budget_micro_seconds +=
sepp_nepp	6:fb11b746ceb5	1808	msrc_dcc_tcc_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	1809	tcc_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1810	}
sepp_nepp	6:fb11b746ceb5	1811
sepp_nepp	6:fb11b746ceb5	1812	if (scheduler_sequence_steps.DssOn) {
sepp_nepp	6:fb11b746ceb5	1813	*p_measurement_timing_budget_micro_seconds +=
sepp_nepp	6:fb11b746ceb5	1814	2 * (msrc_dcc_tcc_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	1815	dss_overhead_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1816	} else if (scheduler_sequence_steps.MsrcOn) {
sepp_nepp	6:fb11b746ceb5	1817	*p_measurement_timing_budget_micro_seconds +=
sepp_nepp	6:fb11b746ceb5	1818	msrc_dcc_tcc_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	1819	msrc_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1820	}
sepp_nepp	6:fb11b746ceb5	1821	}
sepp_nepp	6:fb11b746ceb5	1822	}
sepp_nepp	6:fb11b746ceb5	1823
sepp_nepp	6:fb11b746ceb5	1824	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1825	if (scheduler_sequence_steps.PreRangeOn) {
sepp_nepp	7:3a1115c2556b	1826	status = get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1827	VL53L0X_SEQUENCESTEP_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	1828	&pre_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1829	*p_measurement_timing_budget_micro_seconds +=
sepp_nepp	6:fb11b746ceb5	1830	pre_range_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	1831	pre_range_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	1832	}
sepp_nepp	6:fb11b746ceb5	1833	}
sepp_nepp	6:fb11b746ceb5	1834
sepp_nepp	6:fb11b746ceb5	1835	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1836	if (scheduler_sequence_steps.FinalRangeOn) {
sepp_nepp	7:3a1115c2556b	1837	status = get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	1838	VL53L0X_SEQUENCESTEP_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	1839	&final_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1840	*p_measurement_timing_budget_micro_seconds +=
sepp_nepp	6:fb11b746ceb5	1841	(final_range_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	1842	final_range_overhead_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1843	}
sepp_nepp	6:fb11b746ceb5	1844	}
sepp_nepp	6:fb11b746ceb5	1845
sepp_nepp	6:fb11b746ceb5	1846	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1847	VL53L0X_SETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	1848	MeasurementTimingBudgetMicroSeconds,
sepp_nepp	6:fb11b746ceb5	1849	*p_measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1850	}
sepp_nepp	6:fb11b746ceb5	1851
sepp_nepp	6:fb11b746ceb5	1852
sepp_nepp	6:fb11b746ceb5	1853	return status;
sepp_nepp	6:fb11b746ceb5	1854	}
sepp_nepp	6:fb11b746ceb5	1855
sepp_nepp	7:3a1115c2556b	1856	VL53L0X_Error VL53L0X::VL53L0X_get_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	1857	uint32_t *p_measurement_timing_budget_micro_seconds)
sepp_nepp	6:fb11b746ceb5	1858	{
sepp_nepp	6:fb11b746ceb5	1859	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1860
sepp_nepp	6:fb11b746ceb5	1861
sepp_nepp	7:3a1115c2556b	1862	status = wrapped_VL53L0X_get_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	1863	p_measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	1864
sepp_nepp	6:fb11b746ceb5	1865
sepp_nepp	6:fb11b746ceb5	1866	return status;
sepp_nepp	6:fb11b746ceb5	1867	}
sepp_nepp	6:fb11b746ceb5	1868
sepp_nepp	7:3a1115c2556b	1869	VL53L0X_Error VL53L0X::VL53L0X_get_device_parameters(
sepp_nepp	6:fb11b746ceb5	1870	VL53L0X_DeviceParameters_t *p_device_parameters)
sepp_nepp	6:fb11b746ceb5	1871	{
sepp_nepp	6:fb11b746ceb5	1872	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1873	int i;
sepp_nepp	6:fb11b746ceb5	1874
sepp_nepp	6:fb11b746ceb5	1875
sepp_nepp	6:fb11b746ceb5	1876
sepp_nepp	7:3a1115c2556b	1877	status = VL53L0X_get_device_mode( &(p_device_parameters->DeviceMode));
sepp_nepp	6:fb11b746ceb5	1878
sepp_nepp	6:fb11b746ceb5	1879	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1880	status = VL53L0X_get_inter_measurement_period_milli_seconds(
sepp_nepp	6:fb11b746ceb5	1881	&(p_device_parameters->InterMeasurementPeriodMilliSeconds));
sepp_nepp	6:fb11b746ceb5	1882
sepp_nepp	6:fb11b746ceb5	1883
sepp_nepp	6:fb11b746ceb5	1884	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1885	p_device_parameters->XTalkCompensationEnable = 0;
sepp_nepp	6:fb11b746ceb5	1886	}
sepp_nepp	6:fb11b746ceb5	1887
sepp_nepp	6:fb11b746ceb5	1888	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1889	status = VL53L0X_get_x_talk_compensation_rate_mega_cps(
sepp_nepp	6:fb11b746ceb5	1890	&(p_device_parameters->XTalkCompensationRateMegaCps));
sepp_nepp	6:fb11b746ceb5	1891
sepp_nepp	6:fb11b746ceb5	1892
sepp_nepp	6:fb11b746ceb5	1893	if (status == VL53L0X_ERROR_NONE)
sepp_nepp	7:3a1115c2556b	1894	status = VL53L0X_get_offset_calibration_data_micro_meter(
sepp_nepp	6:fb11b746ceb5	1895	&(p_device_parameters->RangeOffsetMicroMeters));
sepp_nepp	6:fb11b746ceb5	1896
sepp_nepp	6:fb11b746ceb5	1897
sepp_nepp	6:fb11b746ceb5	1898	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	1899	for (i = 0; i < VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS; i++) {
sepp_nepp	6:fb11b746ceb5	1900	/* get first the values, then the enables.
sepp_nepp	6:fb11b746ceb5	1901	* VL53L0X_GetLimitCheckValue will modify the enable
sepp_nepp	6:fb11b746ceb5	1902	* flags
sepp_nepp	6:fb11b746ceb5	1903	*/
sepp_nepp	6:fb11b746ceb5	1904	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1905	status \|= VL53L0X_get_limit_check_value( i,
sepp_nepp	6:fb11b746ceb5	1906	&(p_device_parameters->LimitChecksValue[i]));
sepp_nepp	6:fb11b746ceb5	1907	} else {
sepp_nepp	6:fb11b746ceb5	1908	break;
sepp_nepp	6:fb11b746ceb5	1909	}
sepp_nepp	6:fb11b746ceb5	1910	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1911	status \|= VL53L0X_get_limit_check_enable( i,
sepp_nepp	6:fb11b746ceb5	1912	&(p_device_parameters->LimitChecksEnable[i]));
sepp_nepp	6:fb11b746ceb5	1913	} else {
sepp_nepp	6:fb11b746ceb5	1914	break;
sepp_nepp	6:fb11b746ceb5	1915	}
sepp_nepp	6:fb11b746ceb5	1916	}
sepp_nepp	6:fb11b746ceb5	1917	}
sepp_nepp	6:fb11b746ceb5	1918
sepp_nepp	6:fb11b746ceb5	1919	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1920	status = VL53L0X_get_wrap_around_check_enable(
sepp_nepp	6:fb11b746ceb5	1921	&(p_device_parameters->WrapAroundCheckEnable));
sepp_nepp	6:fb11b746ceb5	1922	}
sepp_nepp	6:fb11b746ceb5	1923
sepp_nepp	6:fb11b746ceb5	1924	/* Need to be done at the end as it uses VCSELPulsePeriod */
sepp_nepp	6:fb11b746ceb5	1925	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	1926	status = VL53L0X_get_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	1927	&(p_device_parameters->MeasurementTimingBudgetMicroSeconds));
sepp_nepp	6:fb11b746ceb5	1928	}
sepp_nepp	6:fb11b746ceb5	1929
sepp_nepp	6:fb11b746ceb5	1930
sepp_nepp	6:fb11b746ceb5	1931	return status;
sepp_nepp	6:fb11b746ceb5	1932	}
sepp_nepp	6:fb11b746ceb5	1933
sepp_nepp	7:3a1115c2556b	1934	VL53L0X_Error VL53L0X::VL53L0X_set_limit_check_value( uint16_t limit_check_id,
sepp_nepp	6:fb11b746ceb5	1935	FixPoint1616_t limit_check_value)
sepp_nepp	6:fb11b746ceb5	1936	{
sepp_nepp	6:fb11b746ceb5	1937	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	1938	uint8_t temp8;
sepp_nepp	6:fb11b746ceb5	1939
sepp_nepp	6:fb11b746ceb5	1940
sepp_nepp	6:fb11b746ceb5	1941
sepp_nepp	7:3a1115c2556b	1942	VL53L0X_GETARRAYPARAMETERFIELD( LimitChecksEnable, limit_check_id,
sepp_nepp	6:fb11b746ceb5	1943	temp8);
sepp_nepp	6:fb11b746ceb5	1944
sepp_nepp	6:fb11b746ceb5	1945	if (temp8 == 0) { /* disabled write only internal value */
sepp_nepp	7:3a1115c2556b	1946	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1947	limit_check_id, limit_check_value);
sepp_nepp	6:fb11b746ceb5	1948	} else {
sepp_nepp	6:fb11b746ceb5	1949
sepp_nepp	6:fb11b746ceb5	1950	switch (limit_check_id) {
sepp_nepp	6:fb11b746ceb5	1951
sepp_nepp	6:fb11b746ceb5	1952	case VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	1953	/* internal computation: */
sepp_nepp	7:3a1115c2556b	1954	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1955	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	1956	limit_check_value);
sepp_nepp	6:fb11b746ceb5	1957	break;
sepp_nepp	6:fb11b746ceb5	1958
sepp_nepp	6:fb11b746ceb5	1959	case VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	1960
sepp_nepp	7:3a1115c2556b	1961	status = VL53L0X_write_word(
sepp_nepp	6:fb11b746ceb5	1962	VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT,
sepp_nepp	6:fb11b746ceb5	1963	VL53L0X_FIXPOINT1616TOFIXPOINT97(
sepp_nepp	6:fb11b746ceb5	1964	limit_check_value));
sepp_nepp	6:fb11b746ceb5	1965
sepp_nepp	6:fb11b746ceb5	1966	break;
sepp_nepp	6:fb11b746ceb5	1967
sepp_nepp	6:fb11b746ceb5	1968	case VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP:
sepp_nepp	6:fb11b746ceb5	1969
sepp_nepp	6:fb11b746ceb5	1970	/* internal computation: */
sepp_nepp	7:3a1115c2556b	1971	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1972	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP,
sepp_nepp	6:fb11b746ceb5	1973	limit_check_value);
sepp_nepp	6:fb11b746ceb5	1974
sepp_nepp	6:fb11b746ceb5	1975	break;
sepp_nepp	6:fb11b746ceb5	1976
sepp_nepp	6:fb11b746ceb5	1977	case VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD:
sepp_nepp	6:fb11b746ceb5	1978
sepp_nepp	6:fb11b746ceb5	1979	/* internal computation: */
sepp_nepp	7:3a1115c2556b	1980	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	1981	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD,
sepp_nepp	6:fb11b746ceb5	1982	limit_check_value);
sepp_nepp	6:fb11b746ceb5	1983
sepp_nepp	6:fb11b746ceb5	1984	break;
sepp_nepp	6:fb11b746ceb5	1985
sepp_nepp	6:fb11b746ceb5	1986	case VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC:
sepp_nepp	6:fb11b746ceb5	1987	case VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE:
sepp_nepp	6:fb11b746ceb5	1988
sepp_nepp	7:3a1115c2556b	1989	status = VL53L0X_write_word(
sepp_nepp	6:fb11b746ceb5	1990	VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT,
sepp_nepp	6:fb11b746ceb5	1991	VL53L0X_FIXPOINT1616TOFIXPOINT97(
sepp_nepp	6:fb11b746ceb5	1992	limit_check_value));
sepp_nepp	6:fb11b746ceb5	1993
sepp_nepp	6:fb11b746ceb5	1994	break;
sepp_nepp	6:fb11b746ceb5	1995
sepp_nepp	6:fb11b746ceb5	1996	default:
sepp_nepp	6:fb11b746ceb5	1997	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	1998
sepp_nepp	6:fb11b746ceb5	1999	}
sepp_nepp	6:fb11b746ceb5	2000
sepp_nepp	6:fb11b746ceb5	2001	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2002	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	2003	limit_check_id, limit_check_value);
sepp_nepp	6:fb11b746ceb5	2004	}
sepp_nepp	6:fb11b746ceb5	2005	}
sepp_nepp	6:fb11b746ceb5	2006
sepp_nepp	6:fb11b746ceb5	2007
sepp_nepp	6:fb11b746ceb5	2008	return status;
sepp_nepp	6:fb11b746ceb5	2009	}
sepp_nepp	6:fb11b746ceb5	2010
sepp_nepp	6:fb11b746ceb5	2011
sepp_nepp	6:fb11b746ceb5	2012
sepp_nepp	7:3a1115c2556b	2013	VL53L0X_Error VL53L0X::VL53L0X_check_part_used( uint8_t *revision,
sepp_nepp	6:fb11b746ceb5	2014	VL53L0X_DeviceInfo_t *p_VL53L0X_device_info)
sepp_nepp	6:fb11b746ceb5	2015	{
sepp_nepp	6:fb11b746ceb5	2016	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2017	uint8_t module_id_int;
sepp_nepp	6:fb11b746ceb5	2018	char *product_id_tmp;
sepp_nepp	6:fb11b746ceb5	2019
sepp_nepp	7:3a1115c2556b	2020	status = VL53L0X_get_info_from_device( 2);
sepp_nepp	6:fb11b746ceb5	2021
sepp_nepp	6:fb11b746ceb5	2022	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2023	module_id_int = VL53L0X_GETDEVICESPECIFICPARAMETER( ModuleId);
sepp_nepp	6:fb11b746ceb5	2024
sepp_nepp	6:fb11b746ceb5	2025	if (module_id_int == 0) {
sepp_nepp	6:fb11b746ceb5	2026	*revision = 0;
sepp_nepp	6:fb11b746ceb5	2027	VL53L0X_COPYSTRING(p_VL53L0X_device_info->ProductId, "");
sepp_nepp	6:fb11b746ceb5	2028	} else {
sepp_nepp	7:3a1115c2556b	2029	*revision = VL53L0X_GETDEVICESPECIFICPARAMETER( Revision);
sepp_nepp	7:3a1115c2556b	2030	product_id_tmp = VL53L0X_GETDEVICESPECIFICPARAMETER(ProductId);
sepp_nepp	6:fb11b746ceb5	2031	VL53L0X_COPYSTRING(p_VL53L0X_device_info->ProductId, product_id_tmp);
sepp_nepp	6:fb11b746ceb5	2032	}
sepp_nepp	6:fb11b746ceb5	2033	}
sepp_nepp	6:fb11b746ceb5	2034	return status;
sepp_nepp	6:fb11b746ceb5	2035	}
sepp_nepp	6:fb11b746ceb5	2036
sepp_nepp	7:3a1115c2556b	2037	VL53L0X_Error VL53L0X::wrapped_VL53L0X_get_device_info(
sepp_nepp	6:fb11b746ceb5	2038	VL53L0X_DeviceInfo_t *p_VL53L0X_device_info)
sepp_nepp	7:3a1115c2556b	2039	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2040	uint8_t revision_id;
sepp_nepp	6:fb11b746ceb5	2041	uint8_t revision;
sepp_nepp	6:fb11b746ceb5	2042
sepp_nepp	7:3a1115c2556b	2043	status = VL53L0X_check_part_used( &revision, p_VL53L0X_device_info);
sepp_nepp	6:fb11b746ceb5	2044
sepp_nepp	6:fb11b746ceb5	2045	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2046	if (revision == 0) {
sepp_nepp	6:fb11b746ceb5	2047	VL53L0X_COPYSTRING(p_VL53L0X_device_info->Name,
sepp_nepp	6:fb11b746ceb5	2048	VL53L0X_STRING_DEVICE_INFO_NAME_TS0);
sepp_nepp	6:fb11b746ceb5	2049	} else if ((revision <= 34) && (revision != 32)) {
sepp_nepp	6:fb11b746ceb5	2050	VL53L0X_COPYSTRING(p_VL53L0X_device_info->Name,
sepp_nepp	6:fb11b746ceb5	2051	VL53L0X_STRING_DEVICE_INFO_NAME_TS1);
sepp_nepp	6:fb11b746ceb5	2052	} else if (revision < 39) {
sepp_nepp	6:fb11b746ceb5	2053	VL53L0X_COPYSTRING(p_VL53L0X_device_info->Name,
sepp_nepp	6:fb11b746ceb5	2054	VL53L0X_STRING_DEVICE_INFO_NAME_TS2);
sepp_nepp	7:3a1115c2556b	2055	} else {VL53L0X_COPYSTRING(p_VL53L0X_device_info->Name,
sepp_nepp	6:fb11b746ceb5	2056	VL53L0X_STRING_DEVICE_INFO_NAME_ES1);
sepp_nepp	6:fb11b746ceb5	2057	}
sepp_nepp	6:fb11b746ceb5	2058
sepp_nepp	6:fb11b746ceb5	2059	VL53L0X_COPYSTRING(p_VL53L0X_device_info->Type,
sepp_nepp	6:fb11b746ceb5	2060	VL53L0X_STRING_DEVICE_INFO_TYPE);
sepp_nepp	6:fb11b746ceb5	2061	}
sepp_nepp	6:fb11b746ceb5	2062
sepp_nepp	6:fb11b746ceb5	2063	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2064	status = VL53L0X_read_byte( VL53L0X_REG_IDENTIFICATION_MODEL_ID,
sepp_nepp	7:3a1115c2556b	2065	&p_VL53L0X_device_info->ProductType);}
sepp_nepp	6:fb11b746ceb5	2066
sepp_nepp	6:fb11b746ceb5	2067	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2068	status = VL53L0X_read_byte(VL53L0X_REG_IDENTIFICATION_REVISION_ID,
sepp_nepp	6:fb11b746ceb5	2069	&revision_id);
sepp_nepp	6:fb11b746ceb5	2070	p_VL53L0X_device_info->ProductRevisionMajor = 1;
sepp_nepp	6:fb11b746ceb5	2071	p_VL53L0X_device_info->ProductRevisionMinor =
sepp_nepp	6:fb11b746ceb5	2072	(revision_id & 0xF0) >> 4;
sepp_nepp	6:fb11b746ceb5	2073	}
sepp_nepp	6:fb11b746ceb5	2074
sepp_nepp	6:fb11b746ceb5	2075	return status;
sepp_nepp	6:fb11b746ceb5	2076	}
sepp_nepp	6:fb11b746ceb5	2077
sepp_nepp	7:3a1115c2556b	2078	VL53L0X_Error VL53L0X::VL53L0X_get_device_info(
sepp_nepp	6:fb11b746ceb5	2079	VL53L0X_DeviceInfo_t *p_VL53L0X_device_info)
sepp_nepp	6:fb11b746ceb5	2080	{
sepp_nepp	6:fb11b746ceb5	2081	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	7:3a1115c2556b	2082
sepp_nepp	7:3a1115c2556b	2083	status = wrapped_VL53L0X_get_device_info( p_VL53L0X_device_info);
sepp_nepp	7:3a1115c2556b	2084
sepp_nepp	6:fb11b746ceb5	2085	return status;
sepp_nepp	6:fb11b746ceb5	2086	}
sepp_nepp	6:fb11b746ceb5	2087
sepp_nepp	7:3a1115c2556b	2088	VL53L0X_Error VL53L0X::VL53L0X_get_interrupt_mask_status(
sepp_nepp	6:fb11b746ceb5	2089	uint32_t *p_interrupt_mask_status)
sepp_nepp	7:3a1115c2556b	2090	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2091	uint8_t byte;
sepp_nepp	6:fb11b746ceb5	2092
sepp_nepp	7:3a1115c2556b	2093	status = VL53L0X_read_byte( VL53L0X_REG_RESULT_INTERRUPT_STATUS, &byte);
sepp_nepp	6:fb11b746ceb5	2094	*p_interrupt_mask_status = byte & 0x07;
sepp_nepp	6:fb11b746ceb5	2095
sepp_nepp	7:3a1115c2556b	2096	if (byte & 0x18) { status = VL53L0X_ERROR_RANGE_ERROR;}
sepp_nepp	7:3a1115c2556b	2097
sepp_nepp	6:fb11b746ceb5	2098	return status;
sepp_nepp	6:fb11b746ceb5	2099	}
sepp_nepp	6:fb11b746ceb5	2100
sepp_nepp	7:3a1115c2556b	2101	VL53L0X_Error VL53L0X::VL53L0X_get_measurement_data_ready(
sepp_nepp	6:fb11b746ceb5	2102	uint8_t *p_measurement_data_ready)
sepp_nepp	7:3a1115c2556b	2103	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2104	uint8_t sys_range_status_register;
sepp_nepp	6:fb11b746ceb5	2105	uint8_t interrupt_config;
sepp_nepp	6:fb11b746ceb5	2106	uint32_t interrupt_mask;
sepp_nepp	6:fb11b746ceb5	2107
sepp_nepp	7:3a1115c2556b	2108	interrupt_config = VL53L0X_GETDEVICESPECIFICPARAMETER(Pin0GpioFunctionality);
sepp_nepp	6:fb11b746ceb5	2109
sepp_nepp	6:fb11b746ceb5	2110	if (interrupt_config ==
sepp_nepp	6:fb11b746ceb5	2111	VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY) {
sepp_nepp	7:3a1115c2556b	2112	status = VL53L0X_get_interrupt_mask_status( &interrupt_mask);
sepp_nepp	6:fb11b746ceb5	2113	if (interrupt_mask ==
sepp_nepp	6:fb11b746ceb5	2114	VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY) {
sepp_nepp	6:fb11b746ceb5	2115	*p_measurement_data_ready = 1;
sepp_nepp	6:fb11b746ceb5	2116	} else {
sepp_nepp	6:fb11b746ceb5	2117	*p_measurement_data_ready = 0;
sepp_nepp	6:fb11b746ceb5	2118	}
sepp_nepp	6:fb11b746ceb5	2119	} else {
sepp_nepp	7:3a1115c2556b	2120	status = VL53L0X_read_byte( VL53L0X_REG_RESULT_RANGE_STATUS,
sepp_nepp	6:fb11b746ceb5	2121	&sys_range_status_register);
sepp_nepp	6:fb11b746ceb5	2122	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2123	if (sys_range_status_register & 0x01) {
sepp_nepp	6:fb11b746ceb5	2124	*p_measurement_data_ready = 1;
sepp_nepp	7:3a1115c2556b	2125	} else { *p_measurement_data_ready = 0; }
sepp_nepp	6:fb11b746ceb5	2126	}
sepp_nepp	6:fb11b746ceb5	2127	}
sepp_nepp	6:fb11b746ceb5	2128
sepp_nepp	6:fb11b746ceb5	2129	return status;
sepp_nepp	6:fb11b746ceb5	2130	}
sepp_nepp	6:fb11b746ceb5	2131
sepp_nepp	7:3a1115c2556b	2132	VL53L0X_Error VL53L0X::VL53L0X_polling_delay(void)
sepp_nepp	7:3a1115c2556b	2133	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2134
sepp_nepp	6:fb11b746ceb5	2135	// do nothing
sepp_nepp	6:fb11b746ceb5	2136	VL53L0X_OsDelay();
sepp_nepp	6:fb11b746ceb5	2137	return status;
sepp_nepp	6:fb11b746ceb5	2138	}
sepp_nepp	6:fb11b746ceb5	2139
sepp_nepp	7:3a1115c2556b	2140	VL53L0X_Error VL53L0X::VL53L0X_measurement_poll_for_completion(void)
sepp_nepp	7:3a1115c2556b	2141	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2142	uint8_t new_data_ready = 0;
sepp_nepp	6:fb11b746ceb5	2143	uint32_t loop_nb;
sepp_nepp	6:fb11b746ceb5	2144
sepp_nepp	6:fb11b746ceb5	2145	loop_nb = 0;
sepp_nepp	6:fb11b746ceb5	2146
sepp_nepp	7:3a1115c2556b	2147	do {status = VL53L0X_get_measurement_data_ready( &new_data_ready);
sepp_nepp	6:fb11b746ceb5	2148	if (status != 0) {
sepp_nepp	6:fb11b746ceb5	2149	break; /* the error is set */
sepp_nepp	6:fb11b746ceb5	2150	}
sepp_nepp	6:fb11b746ceb5	2151
sepp_nepp	6:fb11b746ceb5	2152	if (new_data_ready == 1) {
sepp_nepp	6:fb11b746ceb5	2153	break; /* done note that status == 0 */
sepp_nepp	6:fb11b746ceb5	2154	}
sepp_nepp	6:fb11b746ceb5	2155
sepp_nepp	6:fb11b746ceb5	2156	loop_nb++;
sepp_nepp	6:fb11b746ceb5	2157	if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) {
sepp_nepp	6:fb11b746ceb5	2158	status = VL53L0X_ERROR_TIME_OUT;
sepp_nepp	6:fb11b746ceb5	2159	break;
sepp_nepp	6:fb11b746ceb5	2160	}
sepp_nepp	6:fb11b746ceb5	2161
sepp_nepp	7:3a1115c2556b	2162	VL53L0X_polling_delay();
sepp_nepp	6:fb11b746ceb5	2163	} while (1);
sepp_nepp	6:fb11b746ceb5	2164
sepp_nepp	6:fb11b746ceb5	2165	return status;
sepp_nepp	6:fb11b746ceb5	2166	}
sepp_nepp	6:fb11b746ceb5	2167
sepp_nepp	6:fb11b746ceb5	2168	/* Group PAL Interrupt Functions */
sepp_nepp	7:3a1115c2556b	2169	VL53L0X_Error VL53L0X::VL53L0X_clear_interrupt_mask( uint32_t interrupt_mask)
sepp_nepp	7:3a1115c2556b	2170	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2171	uint8_t loop_count;
sepp_nepp	6:fb11b746ceb5	2172	uint8_t byte;
sepp_nepp	6:fb11b746ceb5	2173
sepp_nepp	6:fb11b746ceb5	2174	/* clear bit 0 range interrupt, bit 1 error interrupt */
sepp_nepp	6:fb11b746ceb5	2175	loop_count = 0;
sepp_nepp	6:fb11b746ceb5	2176	do {
sepp_nepp	7:3a1115c2556b	2177	status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR, 0x01);
sepp_nepp	7:3a1115c2556b	2178	status \|= VL53L0X_write_byte(VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR, 0x00);
sepp_nepp	7:3a1115c2556b	2179	status \|= VL53L0X_read_byte(VL53L0X_REG_RESULT_INTERRUPT_STATUS, &byte);
sepp_nepp	6:fb11b746ceb5	2180	loop_count++;
sepp_nepp	6:fb11b746ceb5	2181	} while (((byte & 0x07) != 0x00)
sepp_nepp	6:fb11b746ceb5	2182	&& (loop_count < 3)
sepp_nepp	6:fb11b746ceb5	2183	&& (status == VL53L0X_ERROR_NONE));
sepp_nepp	6:fb11b746ceb5	2184
sepp_nepp	6:fb11b746ceb5	2185
sepp_nepp	6:fb11b746ceb5	2186	if (loop_count >= 3) {
sepp_nepp	6:fb11b746ceb5	2187	status = VL53L0X_ERROR_INTERRUPT_NOT_CLEARED;
sepp_nepp	6:fb11b746ceb5	2188	}
sepp_nepp	6:fb11b746ceb5	2189
sepp_nepp	6:fb11b746ceb5	2190
sepp_nepp	6:fb11b746ceb5	2191	return status;
sepp_nepp	6:fb11b746ceb5	2192	}
sepp_nepp	6:fb11b746ceb5	2193
sepp_nepp	7:3a1115c2556b	2194	VL53L0X_Error VL53L0X::VL53L0X_perform_single_ref_calibration(
sepp_nepp	6:fb11b746ceb5	2195	uint8_t vhv_init_byte)
sepp_nepp	6:fb11b746ceb5	2196	{
sepp_nepp	6:fb11b746ceb5	2197	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2198
sepp_nepp	6:fb11b746ceb5	2199	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2200	status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START,
sepp_nepp	6:fb11b746ceb5	2201	VL53L0X_REG_SYSRANGE_MODE_START_STOP \|
sepp_nepp	6:fb11b746ceb5	2202	vhv_init_byte);
sepp_nepp	6:fb11b746ceb5	2203	}
sepp_nepp	6:fb11b746ceb5	2204
sepp_nepp	6:fb11b746ceb5	2205	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2206	status = VL53L0X_measurement_poll_for_completion();}
sepp_nepp	6:fb11b746ceb5	2207
sepp_nepp	6:fb11b746ceb5	2208	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2209	status = VL53L0X_clear_interrupt_mask( 0);}
sepp_nepp	6:fb11b746ceb5	2210
sepp_nepp	6:fb11b746ceb5	2211	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2212	status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START, 0x00);
sepp_nepp	6:fb11b746ceb5	2213	}
sepp_nepp	6:fb11b746ceb5	2214
sepp_nepp	6:fb11b746ceb5	2215	return status;
sepp_nepp	6:fb11b746ceb5	2216	}
sepp_nepp	6:fb11b746ceb5	2217
sepp_nepp	7:3a1115c2556b	2218	VL53L0X_Error VL53L0X::VL53L0X_ref_calibration_io( uint8_t read_not_write,
sepp_nepp	6:fb11b746ceb5	2219	uint8_t vhv_settings, uint8_t phase_cal,
sepp_nepp	6:fb11b746ceb5	2220	uint8_t p_vhv_settings, uint8_t p_phase_cal,
sepp_nepp	6:fb11b746ceb5	2221	const uint8_t vhv_enable, const uint8_t phase_enable)
sepp_nepp	6:fb11b746ceb5	2222	{
sepp_nepp	6:fb11b746ceb5	2223	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2224	uint8_t phase_calint = 0;
sepp_nepp	6:fb11b746ceb5	2225
sepp_nepp	6:fb11b746ceb5	2226	/* Read VHV from device */
sepp_nepp	7:3a1115c2556b	2227	status \|= VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	2228	status \|= VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	2229	status \|= VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	2230
sepp_nepp	6:fb11b746ceb5	2231	if (read_not_write) {
sepp_nepp	6:fb11b746ceb5	2232	if (vhv_enable) {
sepp_nepp	7:3a1115c2556b	2233	status \|= VL53L0X_read_byte( 0xCB, p_vhv_settings);}
sepp_nepp	6:fb11b746ceb5	2234	if (phase_enable) {
sepp_nepp	7:3a1115c2556b	2235	status \|= VL53L0X_read_byte( 0xEE, &phase_calint);}
sepp_nepp	6:fb11b746ceb5	2236	} else {
sepp_nepp	6:fb11b746ceb5	2237	if (vhv_enable) {
sepp_nepp	7:3a1115c2556b	2238	status \|= VL53L0X_write_byte( 0xCB, vhv_settings);}
sepp_nepp	6:fb11b746ceb5	2239	if (phase_enable) {
sepp_nepp	7:3a1115c2556b	2240	status \|= VL53L0X_update_byte( 0xEE, 0x80, phase_cal);}
sepp_nepp	6:fb11b746ceb5	2241	}
sepp_nepp	6:fb11b746ceb5	2242
sepp_nepp	7:3a1115c2556b	2243	status \|= VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	2244	status \|= VL53L0X_write_byte( 0x00, 0x01);
sepp_nepp	7:3a1115c2556b	2245	status \|= VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	2246
sepp_nepp	6:fb11b746ceb5	2247	*p_phase_cal = (uint8_t)(phase_calint & 0xEF);
sepp_nepp	6:fb11b746ceb5	2248
sepp_nepp	6:fb11b746ceb5	2249	return status;
sepp_nepp	6:fb11b746ceb5	2250	}
sepp_nepp	6:fb11b746ceb5	2251
sepp_nepp	7:3a1115c2556b	2252	VL53L0X_Error VL53L0X::VL53L0X_perform_vhv_calibration(
sepp_nepp	6:fb11b746ceb5	2253	uint8_t *p_vhv_settings, const uint8_t get_data_enable,
sepp_nepp	6:fb11b746ceb5	2254	const uint8_t restore_config)
sepp_nepp	6:fb11b746ceb5	2255	{
sepp_nepp	6:fb11b746ceb5	2256	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2257	uint8_t sequence_config = 0;
sepp_nepp	6:fb11b746ceb5	2258	uint8_t vhv_settings = 0;
sepp_nepp	6:fb11b746ceb5	2259	uint8_t phase_cal = 0;
sepp_nepp	6:fb11b746ceb5	2260	uint8_t phase_cal_int = 0;
sepp_nepp	6:fb11b746ceb5	2261
sepp_nepp	6:fb11b746ceb5	2262	/* store the value of the sequence config,
sepp_nepp	6:fb11b746ceb5	2263	* this will be reset before the end of the function
sepp_nepp	6:fb11b746ceb5	2264	*/
sepp_nepp	6:fb11b746ceb5	2265
sepp_nepp	6:fb11b746ceb5	2266	if (restore_config) {
sepp_nepp	7:3a1115c2556b	2267	sequence_config = PALDevDataGet( SequenceConfig);
sepp_nepp	6:fb11b746ceb5	2268	}
sepp_nepp	6:fb11b746ceb5	2269
sepp_nepp	6:fb11b746ceb5	2270	/* Run VHV */
sepp_nepp	7:3a1115c2556b	2271	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, 0x01);
sepp_nepp	6:fb11b746ceb5	2272
sepp_nepp	6:fb11b746ceb5	2273	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2274	status = VL53L0X_perform_single_ref_calibration( 0x40);}
sepp_nepp	6:fb11b746ceb5	2275
sepp_nepp	6:fb11b746ceb5	2276	/* Read VHV from device */
sepp_nepp	6:fb11b746ceb5	2277	if ((status == VL53L0X_ERROR_NONE) && (get_data_enable == 1)) {
sepp_nepp	7:3a1115c2556b	2278	status = VL53L0X_ref_calibration_io( 1, vhv_settings, phase_cal, /* Not used here */
sepp_nepp	7:3a1115c2556b	2279	p_vhv_settings, &phase_cal_int, 1, 0);
sepp_nepp	7:3a1115c2556b	2280	} else {*p_vhv_settings = 0; }
sepp_nepp	6:fb11b746ceb5	2281
sepp_nepp	6:fb11b746ceb5	2282
sepp_nepp	6:fb11b746ceb5	2283	if ((status == VL53L0X_ERROR_NONE) && restore_config) {
sepp_nepp	6:fb11b746ceb5	2284	/* restore the previous Sequence Config */
sepp_nepp	7:3a1115c2556b	2285	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,
sepp_nepp	6:fb11b746ceb5	2286	sequence_config);
sepp_nepp	6:fb11b746ceb5	2287	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2288	PALDevDataSet( SequenceConfig, sequence_config); }
sepp_nepp	6:fb11b746ceb5	2289	}
sepp_nepp	6:fb11b746ceb5	2290
sepp_nepp	6:fb11b746ceb5	2291	return status;
sepp_nepp	6:fb11b746ceb5	2292	}
sepp_nepp	6:fb11b746ceb5	2293
sepp_nepp	7:3a1115c2556b	2294	VL53L0X_Error VL53L0X::VL53L0X_perform_phase_calibration(
sepp_nepp	6:fb11b746ceb5	2295	uint8_t *p_phase_cal, const uint8_t get_data_enable,
sepp_nepp	6:fb11b746ceb5	2296	const uint8_t restore_config)
sepp_nepp	7:3a1115c2556b	2297	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2298	uint8_t sequence_config = 0;
sepp_nepp	6:fb11b746ceb5	2299	uint8_t vhv_settings = 0;
sepp_nepp	6:fb11b746ceb5	2300	uint8_t phase_cal = 0;
sepp_nepp	6:fb11b746ceb5	2301	uint8_t vhv_settingsint;
sepp_nepp	6:fb11b746ceb5	2302
sepp_nepp	6:fb11b746ceb5	2303	/* store the value of the sequence config,
sepp_nepp	7:3a1115c2556b	2304	* this will be reset before the end of the function */
sepp_nepp	6:fb11b746ceb5	2305
sepp_nepp	6:fb11b746ceb5	2306	if (restore_config) {
sepp_nepp	7:3a1115c2556b	2307	sequence_config = PALDevDataGet( SequenceConfig);
sepp_nepp	6:fb11b746ceb5	2308	}
sepp_nepp	6:fb11b746ceb5	2309
sepp_nepp	6:fb11b746ceb5	2310	/* Run PhaseCal */
sepp_nepp	7:3a1115c2556b	2311	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, 0x02);
sepp_nepp	6:fb11b746ceb5	2312
sepp_nepp	6:fb11b746ceb5	2313	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2314	status = VL53L0X_perform_single_ref_calibration( 0x0);
sepp_nepp	6:fb11b746ceb5	2315	}
sepp_nepp	6:fb11b746ceb5	2316
sepp_nepp	6:fb11b746ceb5	2317	/* Read PhaseCal from device */
sepp_nepp	6:fb11b746ceb5	2318	if ((status == VL53L0X_ERROR_NONE) && (get_data_enable == 1)) {
sepp_nepp	7:3a1115c2556b	2319	status = VL53L0X_ref_calibration_io( 1,
sepp_nepp	6:fb11b746ceb5	2320	vhv_settings, phase_cal, /* Not used here */
sepp_nepp	6:fb11b746ceb5	2321	&vhv_settingsint, p_phase_cal,
sepp_nepp	6:fb11b746ceb5	2322	0, 1);
sepp_nepp	6:fb11b746ceb5	2323	} else {
sepp_nepp	6:fb11b746ceb5	2324	*p_phase_cal = 0;
sepp_nepp	6:fb11b746ceb5	2325	}
sepp_nepp	6:fb11b746ceb5	2326
sepp_nepp	6:fb11b746ceb5	2327
sepp_nepp	6:fb11b746ceb5	2328	if ((status == VL53L0X_ERROR_NONE) && restore_config) {
sepp_nepp	6:fb11b746ceb5	2329	/* restore the previous Sequence Config */
sepp_nepp	7:3a1115c2556b	2330	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,
sepp_nepp	6:fb11b746ceb5	2331	sequence_config);
sepp_nepp	6:fb11b746ceb5	2332	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2333	PALDevDataSet( SequenceConfig, sequence_config);
sepp_nepp	6:fb11b746ceb5	2334	}
sepp_nepp	6:fb11b746ceb5	2335
sepp_nepp	6:fb11b746ceb5	2336	}
sepp_nepp	6:fb11b746ceb5	2337
sepp_nepp	6:fb11b746ceb5	2338	return status;
sepp_nepp	6:fb11b746ceb5	2339	}
sepp_nepp	6:fb11b746ceb5	2340
sepp_nepp	7:3a1115c2556b	2341	VL53L0X_Error VL53L0X::VL53L0X_perform_ref_calibration(
sepp_nepp	6:fb11b746ceb5	2342	uint8_t p_vhv_settings, uint8_t p_phase_cal, uint8_t get_data_enable)
sepp_nepp	6:fb11b746ceb5	2343	{
sepp_nepp	6:fb11b746ceb5	2344	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2345	uint8_t sequence_config = 0;
sepp_nepp	6:fb11b746ceb5	2346
sepp_nepp	6:fb11b746ceb5	2347	/* store the value of the sequence config,
sepp_nepp	7:3a1115c2556b	2348	* this will be reset before the end of the function */
sepp_nepp	7:3a1115c2556b	2349
sepp_nepp	7:3a1115c2556b	2350	sequence_config = PALDevDataGet( SequenceConfig);
sepp_nepp	6:fb11b746ceb5	2351
sepp_nepp	6:fb11b746ceb5	2352	/* In the following function we don't save the config to optimize
sepp_nepp	6:fb11b746ceb5	2353	* writes on device. Config is saved and restored only once. */
sepp_nepp	7:3a1115c2556b	2354	status = VL53L0X_perform_vhv_calibration(p_vhv_settings, get_data_enable, 0);
sepp_nepp	6:fb11b746ceb5	2355
sepp_nepp	6:fb11b746ceb5	2356	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2357	status = VL53L0X_perform_phase_calibration(p_phase_cal, get_data_enable, 0); }
sepp_nepp	6:fb11b746ceb5	2358
sepp_nepp	6:fb11b746ceb5	2359
sepp_nepp	6:fb11b746ceb5	2360	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2361	/* restore the previous Sequence Config */
sepp_nepp	7:3a1115c2556b	2362	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,
sepp_nepp	6:fb11b746ceb5	2363	sequence_config);
sepp_nepp	6:fb11b746ceb5	2364	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2365	PALDevDataSet( SequenceConfig, sequence_config); }
sepp_nepp	6:fb11b746ceb5	2366	}
sepp_nepp	6:fb11b746ceb5	2367
sepp_nepp	6:fb11b746ceb5	2368	return status;
sepp_nepp	6:fb11b746ceb5	2369	}
sepp_nepp	6:fb11b746ceb5	2370
sepp_nepp	6:fb11b746ceb5	2371	void VL53L0X::get_next_good_spad(uint8_t good_spad_array[], uint32_t size,
sepp_nepp	6:fb11b746ceb5	2372	uint32_t curr, int32_t *p_next)
sepp_nepp	6:fb11b746ceb5	2373	{
sepp_nepp	6:fb11b746ceb5	2374	uint32_t start_index;
sepp_nepp	6:fb11b746ceb5	2375	uint32_t fine_offset;
sepp_nepp	6:fb11b746ceb5	2376	uint32_t c_spads_per_byte = 8;
sepp_nepp	6:fb11b746ceb5	2377	uint32_t coarse_index;
sepp_nepp	6:fb11b746ceb5	2378	uint32_t fine_index;
sepp_nepp	6:fb11b746ceb5	2379	uint8_t data_byte;
sepp_nepp	6:fb11b746ceb5	2380	uint8_t success = 0;
sepp_nepp	6:fb11b746ceb5	2381
sepp_nepp	7:3a1115c2556b	2382	/* Starting with the current good spad, loop through the array to find
sepp_nepp	6:fb11b746ceb5	2383	* the next. i.e. the next bit set in the sequence.
sepp_nepp	6:fb11b746ceb5	2384	*
sepp_nepp	6:fb11b746ceb5	2385	* The coarse index is the byte index of the array and the fine index is
sepp_nepp	7:3a1115c2556b	2386	* the index of the bit within each byte. */
sepp_nepp	6:fb11b746ceb5	2387
sepp_nepp	6:fb11b746ceb5	2388	*p_next = -1;
sepp_nepp	6:fb11b746ceb5	2389
sepp_nepp	6:fb11b746ceb5	2390	start_index = curr / c_spads_per_byte;
sepp_nepp	6:fb11b746ceb5	2391	fine_offset = curr % c_spads_per_byte;
sepp_nepp	6:fb11b746ceb5	2392
sepp_nepp	6:fb11b746ceb5	2393	for (coarse_index = start_index; ((coarse_index < size) && !success);
sepp_nepp	6:fb11b746ceb5	2394	coarse_index++) {
sepp_nepp	6:fb11b746ceb5	2395	fine_index = 0;
sepp_nepp	6:fb11b746ceb5	2396	data_byte = good_spad_array[coarse_index];
sepp_nepp	6:fb11b746ceb5	2397
sepp_nepp	6:fb11b746ceb5	2398	if (coarse_index == start_index) {
sepp_nepp	6:fb11b746ceb5	2399	/* locate the bit position of the provided current
sepp_nepp	6:fb11b746ceb5	2400	* spad bit before iterating */
sepp_nepp	6:fb11b746ceb5	2401	data_byte >>= fine_offset;
sepp_nepp	6:fb11b746ceb5	2402	fine_index = fine_offset;
sepp_nepp	6:fb11b746ceb5	2403	}
sepp_nepp	6:fb11b746ceb5	2404
sepp_nepp	6:fb11b746ceb5	2405	while (fine_index < c_spads_per_byte) {
sepp_nepp	6:fb11b746ceb5	2406	if ((data_byte & 0x1) == 1) {
sepp_nepp	6:fb11b746ceb5	2407	success = 1;
sepp_nepp	6:fb11b746ceb5	2408	p_next = coarse_index c_spads_per_byte + fine_index;
sepp_nepp	6:fb11b746ceb5	2409	break;
sepp_nepp	6:fb11b746ceb5	2410	}
sepp_nepp	6:fb11b746ceb5	2411	data_byte >>= 1;
sepp_nepp	6:fb11b746ceb5	2412	fine_index++;
sepp_nepp	6:fb11b746ceb5	2413	}
sepp_nepp	6:fb11b746ceb5	2414	}
sepp_nepp	6:fb11b746ceb5	2415	}
sepp_nepp	6:fb11b746ceb5	2416
sepp_nepp	6:fb11b746ceb5	2417	uint8_t VL53L0X::is_aperture(uint32_t spad_index)
sepp_nepp	6:fb11b746ceb5	2418	{
sepp_nepp	7:3a1115c2556b	2419	/* This function reports if a given spad index is an aperture SPAD by
sepp_nepp	7:3a1115c2556b	2420	* deriving the quadrant.*/
sepp_nepp	6:fb11b746ceb5	2421	uint32_t quadrant;
sepp_nepp	6:fb11b746ceb5	2422	uint8_t is_aperture = 1;
sepp_nepp	6:fb11b746ceb5	2423	quadrant = spad_index >> 6;
sepp_nepp	6:fb11b746ceb5	2424	if (refArrayQuadrants[quadrant] == REF_ARRAY_SPAD_0) {
sepp_nepp	6:fb11b746ceb5	2425	is_aperture = 0;
sepp_nepp	6:fb11b746ceb5	2426	}
sepp_nepp	6:fb11b746ceb5	2427
sepp_nepp	6:fb11b746ceb5	2428	return is_aperture;
sepp_nepp	6:fb11b746ceb5	2429	}
sepp_nepp	6:fb11b746ceb5	2430
sepp_nepp	6:fb11b746ceb5	2431	VL53L0X_Error VL53L0X::enable_spad_bit(uint8_t spad_array[], uint32_t size,
sepp_nepp	6:fb11b746ceb5	2432	uint32_t spad_index)
sepp_nepp	7:3a1115c2556b	2433	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2434	uint32_t c_spads_per_byte = 8;
sepp_nepp	6:fb11b746ceb5	2435	uint32_t coarse_index;
sepp_nepp	6:fb11b746ceb5	2436	uint32_t fine_index;
sepp_nepp	6:fb11b746ceb5	2437
sepp_nepp	6:fb11b746ceb5	2438	coarse_index = spad_index / c_spads_per_byte;
sepp_nepp	6:fb11b746ceb5	2439	fine_index = spad_index % c_spads_per_byte;
sepp_nepp	6:fb11b746ceb5	2440	if (coarse_index >= size) {
sepp_nepp	6:fb11b746ceb5	2441	status = VL53L0X_ERROR_REF_SPAD_INIT;
sepp_nepp	6:fb11b746ceb5	2442	} else {
sepp_nepp	6:fb11b746ceb5	2443	spad_array[coarse_index] \|= (1 << fine_index);
sepp_nepp	6:fb11b746ceb5	2444	}
sepp_nepp	6:fb11b746ceb5	2445
sepp_nepp	6:fb11b746ceb5	2446	return status;
sepp_nepp	6:fb11b746ceb5	2447	}
sepp_nepp	6:fb11b746ceb5	2448
sepp_nepp	7:3a1115c2556b	2449	VL53L0X_Error VL53L0X::set_ref_spad_map( uint8_t *p_ref_spad_array)
sepp_nepp	7:3a1115c2556b	2450	{ VL53L0X_Error status = VL53L0X_write_multi(
sepp_nepp	6:fb11b746ceb5	2451	VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0,
sepp_nepp	6:fb11b746ceb5	2452	p_ref_spad_array, 6);
sepp_nepp	6:fb11b746ceb5	2453
sepp_nepp	6:fb11b746ceb5	2454	return status;
sepp_nepp	6:fb11b746ceb5	2455	}
sepp_nepp	6:fb11b746ceb5	2456
sepp_nepp	7:3a1115c2556b	2457	VL53L0X_Error VL53L0X::get_ref_spad_map( uint8_t *p_ref_spad_array)
sepp_nepp	6:fb11b746ceb5	2458	{
sepp_nepp	7:3a1115c2556b	2459	VL53L0X_Error status = VL53L0X_read_multi(
sepp_nepp	6:fb11b746ceb5	2460	VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0,
sepp_nepp	6:fb11b746ceb5	2461	p_ref_spad_array,
sepp_nepp	6:fb11b746ceb5	2462	6);
sepp_nepp	6:fb11b746ceb5	2463	// VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2464	// uint8_t count=0;
sepp_nepp	6:fb11b746ceb5	2465
sepp_nepp	6:fb11b746ceb5	2466	// for (count = 0; count < 6; count++)
sepp_nepp	7:3a1115c2556b	2467	// status = VL53L0X_RdByte( (VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 + count), &refSpadArray[count]);
sepp_nepp	6:fb11b746ceb5	2468	return status;
sepp_nepp	6:fb11b746ceb5	2469	}
sepp_nepp	6:fb11b746ceb5	2470
sepp_nepp	7:3a1115c2556b	2471	VL53L0X_Error VL53L0X::enable_ref_spads(
sepp_nepp	6:fb11b746ceb5	2472	uint8_t aperture_spads,
sepp_nepp	6:fb11b746ceb5	2473	uint8_t good_spad_array[],
sepp_nepp	6:fb11b746ceb5	2474	uint8_t spad_array[],
sepp_nepp	6:fb11b746ceb5	2475	uint32_t size,
sepp_nepp	6:fb11b746ceb5	2476	uint32_t start,
sepp_nepp	6:fb11b746ceb5	2477	uint32_t offset,
sepp_nepp	6:fb11b746ceb5	2478	uint32_t spad_count,
sepp_nepp	6:fb11b746ceb5	2479	uint32_t *p_last_spad)
sepp_nepp	6:fb11b746ceb5	2480	{
sepp_nepp	6:fb11b746ceb5	2481	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2482	uint32_t index;
sepp_nepp	6:fb11b746ceb5	2483	uint32_t i;
sepp_nepp	6:fb11b746ceb5	2484	int32_t next_good_spad = offset;
sepp_nepp	6:fb11b746ceb5	2485	uint32_t current_spad;
sepp_nepp	6:fb11b746ceb5	2486	uint8_t check_spad_array[6];
sepp_nepp	6:fb11b746ceb5	2487
sepp_nepp	6:fb11b746ceb5	2488	/*
sepp_nepp	6:fb11b746ceb5	2489	* This function takes in a spad array which may or may not have SPADS
sepp_nepp	6:fb11b746ceb5	2490	* already enabled and appends from a given offset a requested number
sepp_nepp	6:fb11b746ceb5	2491	* of new SPAD enables. The 'good spad map' is applied to
sepp_nepp	6:fb11b746ceb5	2492	* determine the next SPADs to enable.
sepp_nepp	6:fb11b746ceb5	2493	*
sepp_nepp	6:fb11b746ceb5	2494	* This function applies to only aperture or only non-aperture spads.
sepp_nepp	6:fb11b746ceb5	2495	* Checks are performed to ensure this.
sepp_nepp	6:fb11b746ceb5	2496	*/
sepp_nepp	6:fb11b746ceb5	2497
sepp_nepp	6:fb11b746ceb5	2498	current_spad = offset;
sepp_nepp	6:fb11b746ceb5	2499	for (index = 0; index < spad_count; index++) {
sepp_nepp	6:fb11b746ceb5	2500	get_next_good_spad(good_spad_array, size, current_spad,
sepp_nepp	6:fb11b746ceb5	2501	&next_good_spad);
sepp_nepp	6:fb11b746ceb5	2502
sepp_nepp	6:fb11b746ceb5	2503	if (next_good_spad == -1) {
sepp_nepp	6:fb11b746ceb5	2504	status = VL53L0X_ERROR_REF_SPAD_INIT;
sepp_nepp	6:fb11b746ceb5	2505	break;
sepp_nepp	6:fb11b746ceb5	2506	}
sepp_nepp	6:fb11b746ceb5	2507
sepp_nepp	6:fb11b746ceb5	2508	/* Confirm that the next good SPAD is non-aperture */
sepp_nepp	6:fb11b746ceb5	2509	if (is_aperture(start + next_good_spad) != aperture_spads) {
sepp_nepp	6:fb11b746ceb5	2510	/* if we can't get the required number of good aperture
sepp_nepp	6:fb11b746ceb5	2511	* spads from the current quadrant then this is an error
sepp_nepp	6:fb11b746ceb5	2512	*/
sepp_nepp	6:fb11b746ceb5	2513	status = VL53L0X_ERROR_REF_SPAD_INIT;
sepp_nepp	6:fb11b746ceb5	2514	break;
sepp_nepp	6:fb11b746ceb5	2515	}
sepp_nepp	6:fb11b746ceb5	2516	current_spad = (uint32_t)next_good_spad;
sepp_nepp	6:fb11b746ceb5	2517	enable_spad_bit(spad_array, size, current_spad);
sepp_nepp	6:fb11b746ceb5	2518	current_spad++;
sepp_nepp	6:fb11b746ceb5	2519	}
sepp_nepp	6:fb11b746ceb5	2520	*p_last_spad = current_spad;
sepp_nepp	6:fb11b746ceb5	2521
sepp_nepp	6:fb11b746ceb5	2522	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2523	status = set_ref_spad_map( spad_array);
sepp_nepp	6:fb11b746ceb5	2524	}
sepp_nepp	6:fb11b746ceb5	2525
sepp_nepp	6:fb11b746ceb5	2526
sepp_nepp	6:fb11b746ceb5	2527	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2528	status = get_ref_spad_map( check_spad_array);
sepp_nepp	6:fb11b746ceb5	2529
sepp_nepp	6:fb11b746ceb5	2530	i = 0;
sepp_nepp	6:fb11b746ceb5	2531
sepp_nepp	6:fb11b746ceb5	2532	/* Compare spad maps. If not equal report error. */
sepp_nepp	6:fb11b746ceb5	2533	while (i < size) {
sepp_nepp	6:fb11b746ceb5	2534	if (spad_array[i] != check_spad_array[i]) {
sepp_nepp	6:fb11b746ceb5	2535	status = VL53L0X_ERROR_REF_SPAD_INIT;
sepp_nepp	6:fb11b746ceb5	2536	break;
sepp_nepp	6:fb11b746ceb5	2537	}
sepp_nepp	6:fb11b746ceb5	2538	i++;
sepp_nepp	6:fb11b746ceb5	2539	}
sepp_nepp	6:fb11b746ceb5	2540	}
sepp_nepp	6:fb11b746ceb5	2541	return status;
sepp_nepp	6:fb11b746ceb5	2542	}
sepp_nepp	6:fb11b746ceb5	2543
sepp_nepp	7:3a1115c2556b	2544	VL53L0X_Error VL53L0X::VL53L0X_set_device_mode( VL53L0X_DeviceModes device_mode)
sepp_nepp	6:fb11b746ceb5	2545	{
sepp_nepp	6:fb11b746ceb5	2546	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2547
sepp_nepp	6:fb11b746ceb5	2548	switch (device_mode) {
sepp_nepp	6:fb11b746ceb5	2549	case VL53L0X_DEVICEMODE_SINGLE_RANGING:
sepp_nepp	6:fb11b746ceb5	2550	case VL53L0X_DEVICEMODE_CONTINUOUS_RANGING:
sepp_nepp	6:fb11b746ceb5	2551	case VL53L0X_DEVICEMODE_CONTINUOUS_TIMED_RANGING:
sepp_nepp	6:fb11b746ceb5	2552	case VL53L0X_DEVICEMODE_GPIO_DRIVE:
sepp_nepp	6:fb11b746ceb5	2553	case VL53L0X_DEVICEMODE_GPIO_OSC:
sepp_nepp	6:fb11b746ceb5	2554	/* Supported modes */
sepp_nepp	7:3a1115c2556b	2555	VL53L0X_SETPARAMETERFIELD( DeviceMode, device_mode);
sepp_nepp	6:fb11b746ceb5	2556	break;
sepp_nepp	6:fb11b746ceb5	2557	default:
sepp_nepp	6:fb11b746ceb5	2558	/* Unsupported mode */
sepp_nepp	6:fb11b746ceb5	2559	status = VL53L0X_ERROR_MODE_NOT_SUPPORTED;
sepp_nepp	6:fb11b746ceb5	2560	}
sepp_nepp	6:fb11b746ceb5	2561
sepp_nepp	6:fb11b746ceb5	2562
sepp_nepp	6:fb11b746ceb5	2563	return status;
sepp_nepp	6:fb11b746ceb5	2564	}
sepp_nepp	6:fb11b746ceb5	2565
sepp_nepp	7:3a1115c2556b	2566	VL53L0X_Error VL53L0X::VL53L0X_set_interrupt_thresholds(
sepp_nepp	6:fb11b746ceb5	2567	VL53L0X_DeviceModes device_mode, FixPoint1616_t threshold_low,
sepp_nepp	6:fb11b746ceb5	2568	FixPoint1616_t threshold_high)
sepp_nepp	6:fb11b746ceb5	2569	{
sepp_nepp	6:fb11b746ceb5	2570	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2571	uint16_t threshold16;
sepp_nepp	6:fb11b746ceb5	2572
sepp_nepp	6:fb11b746ceb5	2573
sepp_nepp	6:fb11b746ceb5	2574	/* no dependency on DeviceMode for Ewok */
sepp_nepp	6:fb11b746ceb5	2575	/* Need to divide by 2 because the FW will apply a x2 */
sepp_nepp	6:fb11b746ceb5	2576	threshold16 = (uint16_t)((threshold_low >> 17) & 0x00fff);
sepp_nepp	7:3a1115c2556b	2577	status = VL53L0X_write_word( VL53L0X_REG_SYSTEM_THRESH_LOW, threshold16);
sepp_nepp	6:fb11b746ceb5	2578
sepp_nepp	6:fb11b746ceb5	2579	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2580	/* Need to divide by 2 because the FW will apply a x2 */
sepp_nepp	6:fb11b746ceb5	2581	threshold16 = (uint16_t)((threshold_high >> 17) & 0x00fff);
sepp_nepp	7:3a1115c2556b	2582	status = VL53L0X_write_word( VL53L0X_REG_SYSTEM_THRESH_HIGH,
sepp_nepp	6:fb11b746ceb5	2583	threshold16);
sepp_nepp	6:fb11b746ceb5	2584	}
sepp_nepp	6:fb11b746ceb5	2585
sepp_nepp	6:fb11b746ceb5	2586
sepp_nepp	6:fb11b746ceb5	2587	return status;
sepp_nepp	6:fb11b746ceb5	2588	}
sepp_nepp	6:fb11b746ceb5	2589
sepp_nepp	7:3a1115c2556b	2590	VL53L0X_Error VL53L0X::VL53L0X_get_interrupt_thresholds(
sepp_nepp	6:fb11b746ceb5	2591	VL53L0X_DeviceModes device_mode, FixPoint1616_t *p_threshold_low,
sepp_nepp	6:fb11b746ceb5	2592	FixPoint1616_t *p_threshold_high)
sepp_nepp	6:fb11b746ceb5	2593	{
sepp_nepp	6:fb11b746ceb5	2594	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2595	uint16_t threshold16;
sepp_nepp	6:fb11b746ceb5	2596
sepp_nepp	6:fb11b746ceb5	2597
sepp_nepp	6:fb11b746ceb5	2598	/* no dependency on DeviceMode for Ewok */
sepp_nepp	6:fb11b746ceb5	2599
sepp_nepp	7:3a1115c2556b	2600	status = VL53L0X_read_word( VL53L0X_REG_SYSTEM_THRESH_LOW, &threshold16);
sepp_nepp	6:fb11b746ceb5	2601	/* Need to multiply by 2 because the FW will apply a x2 */
sepp_nepp	6:fb11b746ceb5	2602	*p_threshold_low = (FixPoint1616_t)((0x00fff & threshold16) << 17);
sepp_nepp	6:fb11b746ceb5	2603
sepp_nepp	6:fb11b746ceb5	2604	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2605	status = VL53L0X_read_word( VL53L0X_REG_SYSTEM_THRESH_HIGH,
sepp_nepp	6:fb11b746ceb5	2606	&threshold16);
sepp_nepp	6:fb11b746ceb5	2607	/* Need to multiply by 2 because the FW will apply a x2 */
sepp_nepp	6:fb11b746ceb5	2608	*p_threshold_high =
sepp_nepp	6:fb11b746ceb5	2609	(FixPoint1616_t)((0x00fff & threshold16) << 17);
sepp_nepp	6:fb11b746ceb5	2610	}
sepp_nepp	6:fb11b746ceb5	2611
sepp_nepp	6:fb11b746ceb5	2612
sepp_nepp	6:fb11b746ceb5	2613	return status;
sepp_nepp	6:fb11b746ceb5	2614	}
sepp_nepp	6:fb11b746ceb5	2615
sepp_nepp	7:3a1115c2556b	2616	VL53L0X_Error VL53L0X::VL53L0X_load_tuning_settings(
sepp_nepp	6:fb11b746ceb5	2617	uint8_t *p_tuning_setting_buffer)
sepp_nepp	6:fb11b746ceb5	2618	{
sepp_nepp	6:fb11b746ceb5	2619	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2620	int i;
sepp_nepp	6:fb11b746ceb5	2621	int index;
sepp_nepp	6:fb11b746ceb5	2622	uint8_t msb;
sepp_nepp	6:fb11b746ceb5	2623	uint8_t lsb;
sepp_nepp	6:fb11b746ceb5	2624	uint8_t select_param;
sepp_nepp	6:fb11b746ceb5	2625	uint8_t number_of_writes;
sepp_nepp	6:fb11b746ceb5	2626	uint8_t address;
sepp_nepp	6:fb11b746ceb5	2627	uint8_t local_buffer[4]; /* max */
sepp_nepp	6:fb11b746ceb5	2628	uint16_t temp16;
sepp_nepp	6:fb11b746ceb5	2629
sepp_nepp	6:fb11b746ceb5	2630
sepp_nepp	6:fb11b746ceb5	2631
sepp_nepp	6:fb11b746ceb5	2632	index = 0;
sepp_nepp	6:fb11b746ceb5	2633
sepp_nepp	6:fb11b746ceb5	2634	while ((*(p_tuning_setting_buffer + index) != 0) &&
sepp_nepp	6:fb11b746ceb5	2635	(status == VL53L0X_ERROR_NONE)) {
sepp_nepp	6:fb11b746ceb5	2636	number_of_writes = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2637	index++;
sepp_nepp	6:fb11b746ceb5	2638	if (number_of_writes == 0xFF) {
sepp_nepp	6:fb11b746ceb5	2639	/* internal parameters */
sepp_nepp	6:fb11b746ceb5	2640	select_param = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2641	index++;
sepp_nepp	6:fb11b746ceb5	2642	switch (select_param) {
sepp_nepp	6:fb11b746ceb5	2643	case 0: /* uint16_t SigmaEstRefArray -> 2 bytes */
sepp_nepp	6:fb11b746ceb5	2644	msb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2645	index++;
sepp_nepp	6:fb11b746ceb5	2646	lsb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2647	index++;
sepp_nepp	6:fb11b746ceb5	2648	temp16 = VL53L0X_MAKEUINT16(lsb, msb);
sepp_nepp	7:3a1115c2556b	2649	PALDevDataSet( SigmaEstRefArray, temp16);
sepp_nepp	6:fb11b746ceb5	2650	break;
sepp_nepp	6:fb11b746ceb5	2651	case 1: /* uint16_t SigmaEstEffPulseWidth -> 2 bytes */
sepp_nepp	6:fb11b746ceb5	2652	msb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2653	index++;
sepp_nepp	6:fb11b746ceb5	2654	lsb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2655	index++;
sepp_nepp	6:fb11b746ceb5	2656	temp16 = VL53L0X_MAKEUINT16(lsb, msb);
sepp_nepp	7:3a1115c2556b	2657	PALDevDataSet( SigmaEstEffPulseWidth,
sepp_nepp	6:fb11b746ceb5	2658	temp16);
sepp_nepp	6:fb11b746ceb5	2659	break;
sepp_nepp	6:fb11b746ceb5	2660	case 2: /* uint16_t SigmaEstEffAmbWidth -> 2 bytes */
sepp_nepp	6:fb11b746ceb5	2661	msb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2662	index++;
sepp_nepp	6:fb11b746ceb5	2663	lsb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2664	index++;
sepp_nepp	6:fb11b746ceb5	2665	temp16 = VL53L0X_MAKEUINT16(lsb, msb);
sepp_nepp	7:3a1115c2556b	2666	PALDevDataSet( SigmaEstEffAmbWidth, temp16);
sepp_nepp	6:fb11b746ceb5	2667	break;
sepp_nepp	6:fb11b746ceb5	2668	case 3: /* uint16_t targetRefRate -> 2 bytes */
sepp_nepp	6:fb11b746ceb5	2669	msb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2670	index++;
sepp_nepp	6:fb11b746ceb5	2671	lsb = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2672	index++;
sepp_nepp	6:fb11b746ceb5	2673	temp16 = VL53L0X_MAKEUINT16(lsb, msb);
sepp_nepp	7:3a1115c2556b	2674	PALDevDataSet( targetRefRate, temp16);
sepp_nepp	6:fb11b746ceb5	2675	break;
sepp_nepp	6:fb11b746ceb5	2676	default: /* invalid parameter */
sepp_nepp	6:fb11b746ceb5	2677	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	2678	}
sepp_nepp	6:fb11b746ceb5	2679
sepp_nepp	6:fb11b746ceb5	2680	} else if (number_of_writes <= 4) {
sepp_nepp	6:fb11b746ceb5	2681	address = *(p_tuning_setting_buffer + index);
sepp_nepp	6:fb11b746ceb5	2682	index++;
sepp_nepp	6:fb11b746ceb5	2683
sepp_nepp	6:fb11b746ceb5	2684	for (i = 0; i < number_of_writes; i++) {
sepp_nepp	6:fb11b746ceb5	2685	local_buffer[i] = *(p_tuning_setting_buffer +
sepp_nepp	6:fb11b746ceb5	2686	index);
sepp_nepp	6:fb11b746ceb5	2687	index++;
sepp_nepp	6:fb11b746ceb5	2688	}
sepp_nepp	6:fb11b746ceb5	2689
sepp_nepp	7:3a1115c2556b	2690	status = VL53L0X_write_multi( address, local_buffer,
sepp_nepp	6:fb11b746ceb5	2691	number_of_writes);
sepp_nepp	6:fb11b746ceb5	2692
sepp_nepp	6:fb11b746ceb5	2693	} else {
sepp_nepp	6:fb11b746ceb5	2694	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	2695	}
sepp_nepp	6:fb11b746ceb5	2696	}
sepp_nepp	6:fb11b746ceb5	2697
sepp_nepp	6:fb11b746ceb5	2698
sepp_nepp	6:fb11b746ceb5	2699	return status;
sepp_nepp	6:fb11b746ceb5	2700	}
sepp_nepp	6:fb11b746ceb5	2701
sepp_nepp	7:3a1115c2556b	2702	VL53L0X_Error VL53L0X::VL53L0X_check_and_load_interrupt_settings(
sepp_nepp	6:fb11b746ceb5	2703	uint8_t start_not_stopflag)
sepp_nepp	6:fb11b746ceb5	2704	{
sepp_nepp	6:fb11b746ceb5	2705	uint8_t interrupt_config;
sepp_nepp	6:fb11b746ceb5	2706	FixPoint1616_t threshold_low;
sepp_nepp	6:fb11b746ceb5	2707	FixPoint1616_t threshold_high;
sepp_nepp	6:fb11b746ceb5	2708	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2709
sepp_nepp	7:3a1115c2556b	2710	interrupt_config = VL53L0X_GETDEVICESPECIFICPARAMETER(Pin0GpioFunctionality);
sepp_nepp	6:fb11b746ceb5	2711
sepp_nepp	6:fb11b746ceb5	2712	if ((interrupt_config ==
sepp_nepp	6:fb11b746ceb5	2713	VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW) \|\|
sepp_nepp	6:fb11b746ceb5	2714	(interrupt_config ==
sepp_nepp	6:fb11b746ceb5	2715	VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH) \|\|
sepp_nepp	6:fb11b746ceb5	2716	(interrupt_config ==
sepp_nepp	6:fb11b746ceb5	2717	VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT)) {
sepp_nepp	6:fb11b746ceb5	2718
sepp_nepp	7:3a1115c2556b	2719	status = VL53L0X_get_interrupt_thresholds(
sepp_nepp	6:fb11b746ceb5	2720	VL53L0X_DEVICEMODE_CONTINUOUS_RANGING,
sepp_nepp	6:fb11b746ceb5	2721	&threshold_low, &threshold_high);
sepp_nepp	6:fb11b746ceb5	2722
sepp_nepp	6:fb11b746ceb5	2723	if (((threshold_low > 255 * 65536) \|\|
sepp_nepp	6:fb11b746ceb5	2724	(threshold_high > 255 * 65536)) &&
sepp_nepp	6:fb11b746ceb5	2725	(status == VL53L0X_ERROR_NONE)) {
sepp_nepp	6:fb11b746ceb5	2726
sepp_nepp	6:fb11b746ceb5	2727	if (start_not_stopflag != 0) {
sepp_nepp	7:3a1115c2556b	2728	status = VL53L0X_load_tuning_settings(
sepp_nepp	6:fb11b746ceb5	2729	InterruptThresholdSettings);
sepp_nepp	6:fb11b746ceb5	2730	} else {
sepp_nepp	7:3a1115c2556b	2731	status \|= VL53L0X_write_byte( 0xFF, 0x04);
sepp_nepp	7:3a1115c2556b	2732	status \|= VL53L0X_write_byte( 0x70, 0x00);
sepp_nepp	7:3a1115c2556b	2733	status \|= VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	7:3a1115c2556b	2734	status \|= VL53L0X_write_byte( 0x80, 0x00);
sepp_nepp	6:fb11b746ceb5	2735	}
sepp_nepp	6:fb11b746ceb5	2736
sepp_nepp	6:fb11b746ceb5	2737	}
sepp_nepp	6:fb11b746ceb5	2738
sepp_nepp	6:fb11b746ceb5	2739
sepp_nepp	6:fb11b746ceb5	2740	}
sepp_nepp	6:fb11b746ceb5	2741
sepp_nepp	6:fb11b746ceb5	2742	return status;
sepp_nepp	6:fb11b746ceb5	2743
sepp_nepp	6:fb11b746ceb5	2744	}
sepp_nepp	6:fb11b746ceb5	2745
sepp_nepp	7:3a1115c2556b	2746	VL53L0X_Error VL53L0X::VL53L0X_start_measurement(void)
sepp_nepp	6:fb11b746ceb5	2747	{
sepp_nepp	6:fb11b746ceb5	2748	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2749	VL53L0X_DeviceModes device_mode;
sepp_nepp	6:fb11b746ceb5	2750	uint8_t byte;
sepp_nepp	6:fb11b746ceb5	2751	uint8_t start_stop_byte = VL53L0X_REG_SYSRANGE_MODE_START_STOP;
sepp_nepp	6:fb11b746ceb5	2752	uint32_t loop_nb;
sepp_nepp	6:fb11b746ceb5	2753
sepp_nepp	6:fb11b746ceb5	2754
sepp_nepp	6:fb11b746ceb5	2755	/* Get Current DeviceMode */
sepp_nepp	7:3a1115c2556b	2756	VL53L0X_get_device_mode( &device_mode);
sepp_nepp	7:3a1115c2556b	2757
sepp_nepp	7:3a1115c2556b	2758	status = VL53L0X_write_byte( 0x80, 0x01);
sepp_nepp	7:3a1115c2556b	2759	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	2760	status = VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	2761	status = VL53L0X_write_byte( 0x91, PALDevDataGet( StopVariable));
sepp_nepp	7:3a1115c2556b	2762	status = VL53L0X_write_byte( 0x00, 0x01);
sepp_nepp	7:3a1115c2556b	2763	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	7:3a1115c2556b	2764	status = VL53L0X_write_byte( 0x80, 0x00);
sepp_nepp	6:fb11b746ceb5	2765
sepp_nepp	6:fb11b746ceb5	2766	switch (device_mode) {
sepp_nepp	6:fb11b746ceb5	2767	case VL53L0X_DEVICEMODE_SINGLE_RANGING:
sepp_nepp	7:3a1115c2556b	2768	status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START, 0x01);
sepp_nepp	6:fb11b746ceb5	2769
sepp_nepp	6:fb11b746ceb5	2770	byte = start_stop_byte;
sepp_nepp	6:fb11b746ceb5	2771	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2772	/* Wait until start bit has been cleared */
sepp_nepp	6:fb11b746ceb5	2773	loop_nb = 0;
sepp_nepp	6:fb11b746ceb5	2774	do {
sepp_nepp	6:fb11b746ceb5	2775	if (loop_nb > 0)
sepp_nepp	7:3a1115c2556b	2776	status = VL53L0X_read_byte(
sepp_nepp	6:fb11b746ceb5	2777	VL53L0X_REG_SYSRANGE_START, &byte);
sepp_nepp	6:fb11b746ceb5	2778	loop_nb = loop_nb + 1;
sepp_nepp	6:fb11b746ceb5	2779	} while (((byte & start_stop_byte) == start_stop_byte)
sepp_nepp	6:fb11b746ceb5	2780	&& (status == VL53L0X_ERROR_NONE)
sepp_nepp	6:fb11b746ceb5	2781	&& (loop_nb < VL53L0X_DEFAULT_MAX_LOOP));
sepp_nepp	6:fb11b746ceb5	2782
sepp_nepp	6:fb11b746ceb5	2783	if (loop_nb >= VL53L0X_DEFAULT_MAX_LOOP) {
sepp_nepp	6:fb11b746ceb5	2784	status = VL53L0X_ERROR_TIME_OUT;
sepp_nepp	6:fb11b746ceb5	2785	}
sepp_nepp	6:fb11b746ceb5	2786
sepp_nepp	6:fb11b746ceb5	2787	}
sepp_nepp	6:fb11b746ceb5	2788
sepp_nepp	6:fb11b746ceb5	2789	break;
sepp_nepp	6:fb11b746ceb5	2790	case VL53L0X_DEVICEMODE_CONTINUOUS_RANGING:
sepp_nepp	6:fb11b746ceb5	2791	/* Back-to-back mode */
sepp_nepp	6:fb11b746ceb5	2792
sepp_nepp	6:fb11b746ceb5	2793	/* Check if need to apply interrupt settings */
sepp_nepp	6:fb11b746ceb5	2794	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2795	status = VL53L0X_check_and_load_interrupt_settings( 1);
sepp_nepp	6:fb11b746ceb5	2796	}
sepp_nepp	6:fb11b746ceb5	2797
sepp_nepp	7:3a1115c2556b	2798	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	2799	VL53L0X_REG_SYSRANGE_START,
sepp_nepp	6:fb11b746ceb5	2800	VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK);
sepp_nepp	6:fb11b746ceb5	2801	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2802	/* Set PAL State to Running */
sepp_nepp	7:3a1115c2556b	2803	PALDevDataSet( PalState, VL53L0X_STATE_RUNNING);
sepp_nepp	6:fb11b746ceb5	2804	}
sepp_nepp	6:fb11b746ceb5	2805	break;
sepp_nepp	6:fb11b746ceb5	2806	case VL53L0X_DEVICEMODE_CONTINUOUS_TIMED_RANGING:
sepp_nepp	6:fb11b746ceb5	2807	/* Continuous mode */
sepp_nepp	6:fb11b746ceb5	2808	/* Check if need to apply interrupt settings */
sepp_nepp	6:fb11b746ceb5	2809	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2810	status = VL53L0X_check_and_load_interrupt_settings( 1);
sepp_nepp	6:fb11b746ceb5	2811	}
sepp_nepp	6:fb11b746ceb5	2812
sepp_nepp	7:3a1115c2556b	2813	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	2814	VL53L0X_REG_SYSRANGE_START,
sepp_nepp	6:fb11b746ceb5	2815	VL53L0X_REG_SYSRANGE_MODE_TIMED);
sepp_nepp	6:fb11b746ceb5	2816
sepp_nepp	6:fb11b746ceb5	2817	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2818	/* Set PAL State to Running */
sepp_nepp	7:3a1115c2556b	2819	PALDevDataSet( PalState, VL53L0X_STATE_RUNNING);
sepp_nepp	6:fb11b746ceb5	2820	}
sepp_nepp	6:fb11b746ceb5	2821	break;
sepp_nepp	6:fb11b746ceb5	2822	default:
sepp_nepp	6:fb11b746ceb5	2823	/* Selected mode not supported */
sepp_nepp	6:fb11b746ceb5	2824	status = VL53L0X_ERROR_MODE_NOT_SUPPORTED;
sepp_nepp	6:fb11b746ceb5	2825	}
sepp_nepp	6:fb11b746ceb5	2826
sepp_nepp	6:fb11b746ceb5	2827
sepp_nepp	6:fb11b746ceb5	2828
sepp_nepp	6:fb11b746ceb5	2829	return status;
sepp_nepp	6:fb11b746ceb5	2830	}
sepp_nepp	6:fb11b746ceb5	2831
sepp_nepp	6:fb11b746ceb5	2832	/* Group PAL Measurement Functions */
sepp_nepp	7:3a1115c2556b	2833	VL53L0X_Error VL53L0X::VL53L0X_perform_single_measurement(void)
sepp_nepp	6:fb11b746ceb5	2834	{
sepp_nepp	6:fb11b746ceb5	2835	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2836	VL53L0X_DeviceModes device_mode;
sepp_nepp	6:fb11b746ceb5	2837
sepp_nepp	6:fb11b746ceb5	2838
sepp_nepp	6:fb11b746ceb5	2839
sepp_nepp	6:fb11b746ceb5	2840	/* Get Current DeviceMode */
sepp_nepp	7:3a1115c2556b	2841	status = VL53L0X_get_device_mode( &device_mode);
sepp_nepp	6:fb11b746ceb5	2842
sepp_nepp	6:fb11b746ceb5	2843	/* Start immediately to run a single ranging measurement in case of
sepp_nepp	6:fb11b746ceb5	2844	* single ranging or single histogram */
sepp_nepp	6:fb11b746ceb5	2845	if (status == VL53L0X_ERROR_NONE
sepp_nepp	6:fb11b746ceb5	2846	&& device_mode == VL53L0X_DEVICEMODE_SINGLE_RANGING) {
sepp_nepp	7:3a1115c2556b	2847	status = VL53L0X_start_measurement();
sepp_nepp	6:fb11b746ceb5	2848	}
sepp_nepp	6:fb11b746ceb5	2849
sepp_nepp	6:fb11b746ceb5	2850
sepp_nepp	6:fb11b746ceb5	2851	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	2852	status = VL53L0X_measurement_poll_for_completion();
sepp_nepp	6:fb11b746ceb5	2853	}
sepp_nepp	6:fb11b746ceb5	2854
sepp_nepp	6:fb11b746ceb5	2855
sepp_nepp	6:fb11b746ceb5	2856	/* Change PAL State in case of single ranging or single histogram */
sepp_nepp	7:3a1115c2556b	2857	if (status == VL53L0X_ERROR_NONE && device_mode == VL53L0X_DEVICEMODE_SINGLE_RANGING) {
sepp_nepp	7:3a1115c2556b	2858	PALDevDataSet( PalState, VL53L0X_STATE_IDLE); }
sepp_nepp	7:3a1115c2556b	2859
sepp_nepp	6:fb11b746ceb5	2860	return status;
sepp_nepp	6:fb11b746ceb5	2861	}
sepp_nepp	6:fb11b746ceb5	2862
sepp_nepp	7:3a1115c2556b	2863	VL53L0X_Error VL53L0X::VL53L0X_get_x_talk_compensation_enable(
sepp_nepp	6:fb11b746ceb5	2864	uint8_t *p_x_talk_compensation_enable)
sepp_nepp	7:3a1115c2556b	2865	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2866	uint8_t temp8;
sepp_nepp	7:3a1115c2556b	2867
sepp_nepp	7:3a1115c2556b	2868	VL53L0X_GETPARAMETERFIELD( XTalkCompensationEnable, temp8);
sepp_nepp	6:fb11b746ceb5	2869	*p_x_talk_compensation_enable = temp8;
sepp_nepp	6:fb11b746ceb5	2870
sepp_nepp	6:fb11b746ceb5	2871	return status;
sepp_nepp	6:fb11b746ceb5	2872	}
sepp_nepp	6:fb11b746ceb5	2873
sepp_nepp	7:3a1115c2556b	2874	VL53L0X_Error VL53L0X::VL53L0X_get_total_xtalk_rate(
sepp_nepp	6:fb11b746ceb5	2875	VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data,
sepp_nepp	6:fb11b746ceb5	2876	FixPoint1616_t *p_total_xtalk_rate_mcps)
sepp_nepp	6:fb11b746ceb5	2877	{
sepp_nepp	6:fb11b746ceb5	2878	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2879
sepp_nepp	6:fb11b746ceb5	2880	uint8_t xtalk_comp_enable;
sepp_nepp	6:fb11b746ceb5	2881	FixPoint1616_t total_xtalk_mega_cps;
sepp_nepp	6:fb11b746ceb5	2882	FixPoint1616_t xtalk_per_spad_mega_cps;
sepp_nepp	6:fb11b746ceb5	2883
sepp_nepp	6:fb11b746ceb5	2884	*p_total_xtalk_rate_mcps = 0;
sepp_nepp	6:fb11b746ceb5	2885
sepp_nepp	7:3a1115c2556b	2886	status = VL53L0X_get_x_talk_compensation_enable( &xtalk_comp_enable);
sepp_nepp	6:fb11b746ceb5	2887	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2888
sepp_nepp	6:fb11b746ceb5	2889	if (xtalk_comp_enable) {
sepp_nepp	6:fb11b746ceb5	2890
sepp_nepp	6:fb11b746ceb5	2891	VL53L0X_GETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	2892	XTalkCompensationRateMegaCps,
sepp_nepp	6:fb11b746ceb5	2893	xtalk_per_spad_mega_cps);
sepp_nepp	6:fb11b746ceb5	2894
sepp_nepp	6:fb11b746ceb5	2895	/* FixPoint1616 * FixPoint 8:8 = FixPoint0824 */
sepp_nepp	6:fb11b746ceb5	2896	total_xtalk_mega_cps =
sepp_nepp	6:fb11b746ceb5	2897	p_ranging_measurement_data->EffectiveSpadRtnCount *
sepp_nepp	6:fb11b746ceb5	2898	xtalk_per_spad_mega_cps;
sepp_nepp	6:fb11b746ceb5	2899
sepp_nepp	6:fb11b746ceb5	2900	/* FixPoint0824 >> 8 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	2901	*p_total_xtalk_rate_mcps =
sepp_nepp	6:fb11b746ceb5	2902	(total_xtalk_mega_cps + 0x80) >> 8;
sepp_nepp	6:fb11b746ceb5	2903	}
sepp_nepp	6:fb11b746ceb5	2904	}
sepp_nepp	6:fb11b746ceb5	2905
sepp_nepp	6:fb11b746ceb5	2906	return status;
sepp_nepp	6:fb11b746ceb5	2907	}
sepp_nepp	6:fb11b746ceb5	2908
sepp_nepp	7:3a1115c2556b	2909	VL53L0X_Error VL53L0X::VL53L0X_get_total_signal_rate(
sepp_nepp	6:fb11b746ceb5	2910	VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data,
sepp_nepp	6:fb11b746ceb5	2911	FixPoint1616_t *p_total_signal_rate_mcps)
sepp_nepp	6:fb11b746ceb5	2912	{
sepp_nepp	6:fb11b746ceb5	2913	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	2914	FixPoint1616_t total_xtalk_mega_cps;
sepp_nepp	6:fb11b746ceb5	2915
sepp_nepp	6:fb11b746ceb5	2916
sepp_nepp	6:fb11b746ceb5	2917
sepp_nepp	6:fb11b746ceb5	2918	*p_total_signal_rate_mcps =
sepp_nepp	6:fb11b746ceb5	2919	p_ranging_measurement_data->SignalRateRtnMegaCps;
sepp_nepp	6:fb11b746ceb5	2920
sepp_nepp	7:3a1115c2556b	2921	status = VL53L0X_get_total_xtalk_rate(p_ranging_measurement_data, &total_xtalk_mega_cps);
sepp_nepp	6:fb11b746ceb5	2922
sepp_nepp	6:fb11b746ceb5	2923	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	2924	*p_total_signal_rate_mcps += total_xtalk_mega_cps;
sepp_nepp	6:fb11b746ceb5	2925	}
sepp_nepp	6:fb11b746ceb5	2926
sepp_nepp	6:fb11b746ceb5	2927	return status;
sepp_nepp	6:fb11b746ceb5	2928	}
sepp_nepp	6:fb11b746ceb5	2929
sepp_nepp	6:fb11b746ceb5	2930	/* To convert ms into register value */
sepp_nepp	7:3a1115c2556b	2931	uint32_t VL53L0X::VL53L0X_calc_timeout_mclks(
sepp_nepp	6:fb11b746ceb5	2932	uint32_t timeout_period_us,
sepp_nepp	6:fb11b746ceb5	2933	uint8_t vcsel_period_pclks)
sepp_nepp	6:fb11b746ceb5	2934	{
sepp_nepp	6:fb11b746ceb5	2935	uint32_t macro_period_ps;
sepp_nepp	6:fb11b746ceb5	2936	uint32_t macro_period_ns;
sepp_nepp	6:fb11b746ceb5	2937	uint32_t timeout_period_mclks = 0;
sepp_nepp	6:fb11b746ceb5	2938
sepp_nepp	7:3a1115c2556b	2939	macro_period_ps = VL53L0X_calc_macro_period_ps( vcsel_period_pclks);
sepp_nepp	6:fb11b746ceb5	2940	macro_period_ns = (macro_period_ps + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	2941
sepp_nepp	6:fb11b746ceb5	2942	timeout_period_mclks =
sepp_nepp	6:fb11b746ceb5	2943	(uint32_t)(((timeout_period_us * 1000)
sepp_nepp	6:fb11b746ceb5	2944	+ (macro_period_ns / 2)) / macro_period_ns);
sepp_nepp	6:fb11b746ceb5	2945
sepp_nepp	6:fb11b746ceb5	2946	return timeout_period_mclks;
sepp_nepp	6:fb11b746ceb5	2947	}
sepp_nepp	6:fb11b746ceb5	2948
sepp_nepp	6:fb11b746ceb5	2949	uint32_t VL53L0X::VL53L0X_isqrt(uint32_t num)
sepp_nepp	6:fb11b746ceb5	2950	{
sepp_nepp	6:fb11b746ceb5	2951	/*
sepp_nepp	6:fb11b746ceb5	2952	* Implements an integer square root
sepp_nepp	6:fb11b746ceb5	2953	*
sepp_nepp	6:fb11b746ceb5	2954	* From: http://en.wikipedia.org/wiki/Methods_of_computing_square_roots
sepp_nepp	6:fb11b746ceb5	2955	*/
sepp_nepp	6:fb11b746ceb5	2956
sepp_nepp	6:fb11b746ceb5	2957	uint32_t res = 0;
sepp_nepp	6:fb11b746ceb5	2958	uint32_t bit = 1 << 30;
sepp_nepp	6:fb11b746ceb5	2959	/* The second-to-top bit is set:
sepp_nepp	6:fb11b746ceb5	2960	* 1 << 14 for 16-bits, 1 << 30 for 32 bits */
sepp_nepp	6:fb11b746ceb5	2961
sepp_nepp	6:fb11b746ceb5	2962	/* "bit" starts at the highest power of four <= the argument. */
sepp_nepp	6:fb11b746ceb5	2963	while (bit > num) {
sepp_nepp	6:fb11b746ceb5	2964	bit >>= 2;
sepp_nepp	6:fb11b746ceb5	2965	}
sepp_nepp	6:fb11b746ceb5	2966
sepp_nepp	6:fb11b746ceb5	2967
sepp_nepp	6:fb11b746ceb5	2968	while (bit != 0) {
sepp_nepp	6:fb11b746ceb5	2969	if (num >= res + bit) {
sepp_nepp	6:fb11b746ceb5	2970	num -= res + bit;
sepp_nepp	6:fb11b746ceb5	2971	res = (res >> 1) + bit;
sepp_nepp	6:fb11b746ceb5	2972	} else {
sepp_nepp	6:fb11b746ceb5	2973	res >>= 1;
sepp_nepp	6:fb11b746ceb5	2974	}
sepp_nepp	6:fb11b746ceb5	2975
sepp_nepp	6:fb11b746ceb5	2976	bit >>= 2;
sepp_nepp	6:fb11b746ceb5	2977	}
sepp_nepp	6:fb11b746ceb5	2978
sepp_nepp	6:fb11b746ceb5	2979	return res;
sepp_nepp	6:fb11b746ceb5	2980	}
sepp_nepp	6:fb11b746ceb5	2981
sepp_nepp	6:fb11b746ceb5	2982	VL53L0X_Error VL53L0X::VL53L0X_calc_dmax(
sepp_nepp	7:3a1115c2556b	2983
sepp_nepp	6:fb11b746ceb5	2984	FixPoint1616_t total_signal_rate_mcps,
sepp_nepp	6:fb11b746ceb5	2985	FixPoint1616_t total_corr_signal_rate_mcps,
sepp_nepp	6:fb11b746ceb5	2986	FixPoint1616_t pw_mult,
sepp_nepp	6:fb11b746ceb5	2987	uint32_t sigma_estimate_p1,
sepp_nepp	6:fb11b746ceb5	2988	FixPoint1616_t sigma_estimate_p2,
sepp_nepp	6:fb11b746ceb5	2989	uint32_t peak_vcsel_duration_us,
sepp_nepp	6:fb11b746ceb5	2990	uint32_t *pd_max_mm)
sepp_nepp	6:fb11b746ceb5	2991	{
sepp_nepp	6:fb11b746ceb5	2992	const uint32_t c_sigma_limit = 18;
sepp_nepp	6:fb11b746ceb5	2993	const FixPoint1616_t c_signal_limit = 0x4000; /* 0.25 */
sepp_nepp	6:fb11b746ceb5	2994	const FixPoint1616_t c_sigma_est_ref = 0x00000042; /* 0.001 */
sepp_nepp	6:fb11b746ceb5	2995	const uint32_t c_amb_eff_width_sigma_est_ns = 6;
sepp_nepp	6:fb11b746ceb5	2996	const uint32_t c_amb_eff_width_d_max_ns = 7;
sepp_nepp	6:fb11b746ceb5	2997	uint32_t dmax_cal_range_mm;
sepp_nepp	6:fb11b746ceb5	2998	FixPoint1616_t dmax_cal_signal_rate_rtn_mcps;
sepp_nepp	6:fb11b746ceb5	2999	FixPoint1616_t min_signal_needed;
sepp_nepp	6:fb11b746ceb5	3000	FixPoint1616_t min_signal_needed_p1;
sepp_nepp	6:fb11b746ceb5	3001	FixPoint1616_t min_signal_needed_p2;
sepp_nepp	6:fb11b746ceb5	3002	FixPoint1616_t min_signal_needed_p3;
sepp_nepp	6:fb11b746ceb5	3003	FixPoint1616_t min_signal_needed_p4;
sepp_nepp	6:fb11b746ceb5	3004	FixPoint1616_t sigma_limit_tmp;
sepp_nepp	6:fb11b746ceb5	3005	FixPoint1616_t sigma_est_sq_tmp;
sepp_nepp	6:fb11b746ceb5	3006	FixPoint1616_t signal_limit_tmp;
sepp_nepp	6:fb11b746ceb5	3007	FixPoint1616_t signal_at0_mm;
sepp_nepp	6:fb11b746ceb5	3008	FixPoint1616_t dmax_dark;
sepp_nepp	6:fb11b746ceb5	3009	FixPoint1616_t dmax_ambient;
sepp_nepp	6:fb11b746ceb5	3010	FixPoint1616_t dmax_dark_tmp;
sepp_nepp	6:fb11b746ceb5	3011	FixPoint1616_t sigma_est_p2_tmp;
sepp_nepp	6:fb11b746ceb5	3012	uint32_t signal_rate_temp_mcps;
sepp_nepp	6:fb11b746ceb5	3013
sepp_nepp	6:fb11b746ceb5	3014	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3015
sepp_nepp	6:fb11b746ceb5	3016
sepp_nepp	6:fb11b746ceb5	3017
sepp_nepp	6:fb11b746ceb5	3018	dmax_cal_range_mm =
sepp_nepp	7:3a1115c2556b	3019	PALDevDataGet( DmaxCalRangeMilliMeter);
sepp_nepp	6:fb11b746ceb5	3020
sepp_nepp	6:fb11b746ceb5	3021	dmax_cal_signal_rate_rtn_mcps =
sepp_nepp	7:3a1115c2556b	3022	PALDevDataGet( DmaxCalSignalRateRtnMegaCps);
sepp_nepp	6:fb11b746ceb5	3023
sepp_nepp	6:fb11b746ceb5	3024	/* uint32 * FixPoint1616 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3025	signal_at0_mm = dmax_cal_range_mm * dmax_cal_signal_rate_rtn_mcps;
sepp_nepp	6:fb11b746ceb5	3026
sepp_nepp	6:fb11b746ceb5	3027	/* FixPoint1616 >> 8 = FixPoint2408 */
sepp_nepp	6:fb11b746ceb5	3028	signal_at0_mm = (signal_at0_mm + 0x80) >> 8;
sepp_nepp	6:fb11b746ceb5	3029	signal_at0_mm *= dmax_cal_range_mm;
sepp_nepp	6:fb11b746ceb5	3030
sepp_nepp	6:fb11b746ceb5	3031	min_signal_needed_p1 = 0;
sepp_nepp	6:fb11b746ceb5	3032	if (total_corr_signal_rate_mcps > 0) {
sepp_nepp	6:fb11b746ceb5	3033
sepp_nepp	6:fb11b746ceb5	3034	/* Shift by 10 bits to increase resolution prior to the
sepp_nepp	6:fb11b746ceb5	3035	* division */
sepp_nepp	6:fb11b746ceb5	3036	signal_rate_temp_mcps = total_signal_rate_mcps << 10;
sepp_nepp	6:fb11b746ceb5	3037
sepp_nepp	6:fb11b746ceb5	3038	/* Add rounding value prior to division */
sepp_nepp	6:fb11b746ceb5	3039	min_signal_needed_p1 = signal_rate_temp_mcps +
sepp_nepp	6:fb11b746ceb5	3040	(total_corr_signal_rate_mcps / 2);
sepp_nepp	6:fb11b746ceb5	3041
sepp_nepp	6:fb11b746ceb5	3042	/* FixPoint0626/FixPoint1616 = FixPoint2210 */
sepp_nepp	6:fb11b746ceb5	3043	min_signal_needed_p1 /= total_corr_signal_rate_mcps;
sepp_nepp	6:fb11b746ceb5	3044
sepp_nepp	6:fb11b746ceb5	3045	/* Apply a factored version of the speed of light.
sepp_nepp	6:fb11b746ceb5	3046	Correction to be applied at the end */
sepp_nepp	6:fb11b746ceb5	3047	min_signal_needed_p1 *= 3;
sepp_nepp	6:fb11b746ceb5	3048
sepp_nepp	6:fb11b746ceb5	3049	/* FixPoint2210 * FixPoint2210 = FixPoint1220 */
sepp_nepp	6:fb11b746ceb5	3050	min_signal_needed_p1 *= min_signal_needed_p1;
sepp_nepp	6:fb11b746ceb5	3051
sepp_nepp	6:fb11b746ceb5	3052	/* FixPoint1220 >> 16 = FixPoint2804 */
sepp_nepp	6:fb11b746ceb5	3053	min_signal_needed_p1 = (min_signal_needed_p1 + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3054	}
sepp_nepp	6:fb11b746ceb5	3055
sepp_nepp	6:fb11b746ceb5	3056	min_signal_needed_p2 = pw_mult * sigma_estimate_p1;
sepp_nepp	6:fb11b746ceb5	3057
sepp_nepp	6:fb11b746ceb5	3058	/* FixPoint1616 >> 16 = uint32 */
sepp_nepp	6:fb11b746ceb5	3059	min_signal_needed_p2 = (min_signal_needed_p2 + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3060
sepp_nepp	6:fb11b746ceb5	3061	/* uint32 * uint32 = uint32 */
sepp_nepp	6:fb11b746ceb5	3062	min_signal_needed_p2 *= min_signal_needed_p2;
sepp_nepp	6:fb11b746ceb5	3063
sepp_nepp	6:fb11b746ceb5	3064	/* Check sigmaEstimateP2
sepp_nepp	6:fb11b746ceb5	3065	* If this value is too high there is not enough signal rate
sepp_nepp	6:fb11b746ceb5	3066	* to calculate dmax value so set a suitable value to ensure
sepp_nepp	6:fb11b746ceb5	3067	* a very small dmax.
sepp_nepp	6:fb11b746ceb5	3068	*/
sepp_nepp	6:fb11b746ceb5	3069	sigma_est_p2_tmp = (sigma_estimate_p2 + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3070	sigma_est_p2_tmp = (sigma_est_p2_tmp + c_amb_eff_width_sigma_est_ns / 2) /
sepp_nepp	6:fb11b746ceb5	3071	c_amb_eff_width_sigma_est_ns;
sepp_nepp	6:fb11b746ceb5	3072	sigma_est_p2_tmp *= c_amb_eff_width_d_max_ns;
sepp_nepp	6:fb11b746ceb5	3073
sepp_nepp	6:fb11b746ceb5	3074	if (sigma_est_p2_tmp > 0xffff) {
sepp_nepp	6:fb11b746ceb5	3075	min_signal_needed_p3 = 0xfff00000;
sepp_nepp	6:fb11b746ceb5	3076	} else {
sepp_nepp	6:fb11b746ceb5	3077
sepp_nepp	6:fb11b746ceb5	3078	/* DMAX uses a different ambient width from sigma, so apply
sepp_nepp	6:fb11b746ceb5	3079	* correction.
sepp_nepp	6:fb11b746ceb5	3080	* Perform division before multiplication to prevent overflow.
sepp_nepp	6:fb11b746ceb5	3081	*/
sepp_nepp	6:fb11b746ceb5	3082	sigma_estimate_p2 = (sigma_estimate_p2 + c_amb_eff_width_sigma_est_ns / 2) /
sepp_nepp	6:fb11b746ceb5	3083	c_amb_eff_width_sigma_est_ns;
sepp_nepp	6:fb11b746ceb5	3084	sigma_estimate_p2 *= c_amb_eff_width_d_max_ns;
sepp_nepp	6:fb11b746ceb5	3085
sepp_nepp	6:fb11b746ceb5	3086	/* FixPoint1616 >> 16 = uint32 */
sepp_nepp	6:fb11b746ceb5	3087	min_signal_needed_p3 = (sigma_estimate_p2 + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3088
sepp_nepp	6:fb11b746ceb5	3089	min_signal_needed_p3 *= min_signal_needed_p3;
sepp_nepp	6:fb11b746ceb5	3090
sepp_nepp	6:fb11b746ceb5	3091	}
sepp_nepp	6:fb11b746ceb5	3092
sepp_nepp	6:fb11b746ceb5	3093	/* FixPoint1814 / uint32 = FixPoint1814 */
sepp_nepp	6:fb11b746ceb5	3094	sigma_limit_tmp = ((c_sigma_limit << 14) + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3095
sepp_nepp	6:fb11b746ceb5	3096	/* FixPoint1814 * FixPoint1814 = FixPoint3628 := FixPoint0428 */
sepp_nepp	6:fb11b746ceb5	3097	sigma_limit_tmp *= sigma_limit_tmp;
sepp_nepp	6:fb11b746ceb5	3098
sepp_nepp	6:fb11b746ceb5	3099	/* FixPoint1616 * FixPoint1616 = FixPoint3232 */
sepp_nepp	6:fb11b746ceb5	3100	sigma_est_sq_tmp = c_sigma_est_ref * c_sigma_est_ref;
sepp_nepp	6:fb11b746ceb5	3101
sepp_nepp	6:fb11b746ceb5	3102	/* FixPoint3232 >> 4 = FixPoint0428 */
sepp_nepp	6:fb11b746ceb5	3103	sigma_est_sq_tmp = (sigma_est_sq_tmp + 0x08) >> 4;
sepp_nepp	6:fb11b746ceb5	3104
sepp_nepp	6:fb11b746ceb5	3105	/* FixPoint0428 - FixPoint0428 = FixPoint0428 */
sepp_nepp	6:fb11b746ceb5	3106	sigma_limit_tmp -= sigma_est_sq_tmp;
sepp_nepp	6:fb11b746ceb5	3107
sepp_nepp	6:fb11b746ceb5	3108	/* uint32_t * FixPoint0428 = FixPoint0428 */
sepp_nepp	6:fb11b746ceb5	3109	min_signal_needed_p4 = 4 * 12 * sigma_limit_tmp;
sepp_nepp	6:fb11b746ceb5	3110
sepp_nepp	6:fb11b746ceb5	3111	/* FixPoint0428 >> 14 = FixPoint1814 */
sepp_nepp	6:fb11b746ceb5	3112	min_signal_needed_p4 = (min_signal_needed_p4 + 0x2000) >> 14;
sepp_nepp	6:fb11b746ceb5	3113
sepp_nepp	6:fb11b746ceb5	3114	/* uint32 + uint32 = uint32 */
sepp_nepp	6:fb11b746ceb5	3115	min_signal_needed = (min_signal_needed_p2 + min_signal_needed_p3);
sepp_nepp	6:fb11b746ceb5	3116
sepp_nepp	6:fb11b746ceb5	3117	/* uint32 / uint32 = uint32 */
sepp_nepp	6:fb11b746ceb5	3118	min_signal_needed += (peak_vcsel_duration_us / 2);
sepp_nepp	6:fb11b746ceb5	3119	min_signal_needed /= peak_vcsel_duration_us;
sepp_nepp	6:fb11b746ceb5	3120
sepp_nepp	6:fb11b746ceb5	3121	/* uint32 << 14 = FixPoint1814 */
sepp_nepp	6:fb11b746ceb5	3122	min_signal_needed <<= 14;
sepp_nepp	6:fb11b746ceb5	3123
sepp_nepp	6:fb11b746ceb5	3124	/* FixPoint1814 / FixPoint1814 = uint32 */
sepp_nepp	6:fb11b746ceb5	3125	min_signal_needed += (min_signal_needed_p4 / 2);
sepp_nepp	6:fb11b746ceb5	3126	min_signal_needed /= min_signal_needed_p4;
sepp_nepp	6:fb11b746ceb5	3127
sepp_nepp	6:fb11b746ceb5	3128	/* FixPoint3200 * FixPoint2804 := FixPoint2804*/
sepp_nepp	6:fb11b746ceb5	3129	min_signal_needed *= min_signal_needed_p1;
sepp_nepp	6:fb11b746ceb5	3130
sepp_nepp	6:fb11b746ceb5	3131	/* Apply correction by dividing by 1000000.
sepp_nepp	6:fb11b746ceb5	3132	* This assumes 10E16 on the numerator of the equation
sepp_nepp	6:fb11b746ceb5	3133	* and 10E-22 on the denominator.
sepp_nepp	6:fb11b746ceb5	3134	* We do this because 32bit fix point calculation can't
sepp_nepp	6:fb11b746ceb5	3135	* handle the larger and smaller elements of this equation,
sepp_nepp	6:fb11b746ceb5	3136	* i.e. speed of light and pulse widths.
sepp_nepp	6:fb11b746ceb5	3137	*/
sepp_nepp	6:fb11b746ceb5	3138	min_signal_needed = (min_signal_needed + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3139	min_signal_needed <<= 4;
sepp_nepp	6:fb11b746ceb5	3140
sepp_nepp	6:fb11b746ceb5	3141	min_signal_needed = (min_signal_needed + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3142
sepp_nepp	6:fb11b746ceb5	3143	/* FixPoint1616 >> 8 = FixPoint2408 */
sepp_nepp	6:fb11b746ceb5	3144	signal_limit_tmp = (c_signal_limit + 0x80) >> 8;
sepp_nepp	6:fb11b746ceb5	3145
sepp_nepp	6:fb11b746ceb5	3146	/* FixPoint2408/FixPoint2408 = uint32 */
sepp_nepp	6:fb11b746ceb5	3147	if (signal_limit_tmp != 0) {
sepp_nepp	6:fb11b746ceb5	3148	dmax_dark_tmp = (signal_at0_mm + (signal_limit_tmp / 2))
sepp_nepp	6:fb11b746ceb5	3149	/ signal_limit_tmp;
sepp_nepp	6:fb11b746ceb5	3150	} else {
sepp_nepp	6:fb11b746ceb5	3151	dmax_dark_tmp = 0;
sepp_nepp	6:fb11b746ceb5	3152	}
sepp_nepp	6:fb11b746ceb5	3153
sepp_nepp	6:fb11b746ceb5	3154	dmax_dark = VL53L0X_isqrt(dmax_dark_tmp);
sepp_nepp	6:fb11b746ceb5	3155
sepp_nepp	6:fb11b746ceb5	3156	/* FixPoint2408/FixPoint2408 = uint32 */
sepp_nepp	6:fb11b746ceb5	3157	if (min_signal_needed != 0) {
sepp_nepp	6:fb11b746ceb5	3158	dmax_ambient = (signal_at0_mm + min_signal_needed / 2)
sepp_nepp	6:fb11b746ceb5	3159	/ min_signal_needed;
sepp_nepp	6:fb11b746ceb5	3160	} else {
sepp_nepp	6:fb11b746ceb5	3161	dmax_ambient = 0;
sepp_nepp	6:fb11b746ceb5	3162	}
sepp_nepp	6:fb11b746ceb5	3163
sepp_nepp	6:fb11b746ceb5	3164	dmax_ambient = VL53L0X_isqrt(dmax_ambient);
sepp_nepp	6:fb11b746ceb5	3165
sepp_nepp	6:fb11b746ceb5	3166	*pd_max_mm = dmax_dark;
sepp_nepp	6:fb11b746ceb5	3167	if (dmax_dark > dmax_ambient) {
sepp_nepp	6:fb11b746ceb5	3168	*pd_max_mm = dmax_ambient;
sepp_nepp	6:fb11b746ceb5	3169	}
sepp_nepp	6:fb11b746ceb5	3170
sepp_nepp	6:fb11b746ceb5	3171
sepp_nepp	6:fb11b746ceb5	3172
sepp_nepp	6:fb11b746ceb5	3173	return status;
sepp_nepp	6:fb11b746ceb5	3174	}
sepp_nepp	6:fb11b746ceb5	3175
sepp_nepp	7:3a1115c2556b	3176	VL53L0X_Error VL53L0X::VL53L0X_calc_sigma_estimate(
sepp_nepp	6:fb11b746ceb5	3177	VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data,
sepp_nepp	6:fb11b746ceb5	3178	FixPoint1616_t *p_sigma_estimate,
sepp_nepp	6:fb11b746ceb5	3179	uint32_t *p_dmax_mm)
sepp_nepp	6:fb11b746ceb5	3180	{
sepp_nepp	6:fb11b746ceb5	3181	/* Expressed in 100ths of a ns, i.e. centi-ns */
sepp_nepp	6:fb11b746ceb5	3182	const uint32_t c_pulse_effective_width_centi_ns = 800;
sepp_nepp	6:fb11b746ceb5	3183	/* Expressed in 100ths of a ns, i.e. centi-ns */
sepp_nepp	6:fb11b746ceb5	3184	const uint32_t c_ambient_effective_width_centi_ns = 600;
sepp_nepp	6:fb11b746ceb5	3185	const FixPoint1616_t c_dflt_final_range_integration_time_milli_secs = 0x00190000; /* 25ms */
sepp_nepp	6:fb11b746ceb5	3186	const uint32_t c_vcsel_pulse_width_ps = 4700; /* pico secs */
sepp_nepp	6:fb11b746ceb5	3187	const FixPoint1616_t c_sigma_est_max = 0x028F87AE;
sepp_nepp	6:fb11b746ceb5	3188	const FixPoint1616_t c_sigma_est_rtn_max = 0xF000;
sepp_nepp	6:fb11b746ceb5	3189	const FixPoint1616_t c_amb_to_signal_ratio_max = 0xF0000000 /
sepp_nepp	6:fb11b746ceb5	3190	c_ambient_effective_width_centi_ns;
sepp_nepp	6:fb11b746ceb5	3191	/* Time Of Flight per mm (6.6 pico secs) */
sepp_nepp	6:fb11b746ceb5	3192	const FixPoint1616_t c_tof_per_mm_ps = 0x0006999A;
sepp_nepp	6:fb11b746ceb5	3193	const uint32_t c_16bit_rounding_param = 0x00008000;
sepp_nepp	6:fb11b746ceb5	3194	const FixPoint1616_t c_max_x_talk_kcps = 0x00320000;
sepp_nepp	6:fb11b746ceb5	3195	const uint32_t c_pll_period_ps = 1655;
sepp_nepp	6:fb11b746ceb5	3196
sepp_nepp	6:fb11b746ceb5	3197	uint32_t vcsel_total_events_rtn;
sepp_nepp	6:fb11b746ceb5	3198	uint32_t final_range_timeout_micro_secs;
sepp_nepp	6:fb11b746ceb5	3199	uint32_t pre_range_timeout_micro_secs;
sepp_nepp	6:fb11b746ceb5	3200	uint32_t final_range_integration_time_milli_secs;
sepp_nepp	6:fb11b746ceb5	3201	FixPoint1616_t sigma_estimate_p1;
sepp_nepp	6:fb11b746ceb5	3202	FixPoint1616_t sigma_estimate_p2;
sepp_nepp	6:fb11b746ceb5	3203	FixPoint1616_t sigma_estimate_p3;
sepp_nepp	6:fb11b746ceb5	3204	FixPoint1616_t delta_t_ps;
sepp_nepp	6:fb11b746ceb5	3205	FixPoint1616_t pw_mult;
sepp_nepp	6:fb11b746ceb5	3206	FixPoint1616_t sigma_est_rtn;
sepp_nepp	6:fb11b746ceb5	3207	FixPoint1616_t sigma_estimate;
sepp_nepp	6:fb11b746ceb5	3208	FixPoint1616_t x_talk_correction;
sepp_nepp	6:fb11b746ceb5	3209	FixPoint1616_t ambient_rate_kcps;
sepp_nepp	6:fb11b746ceb5	3210	FixPoint1616_t peak_signal_rate_kcps;
sepp_nepp	6:fb11b746ceb5	3211	FixPoint1616_t x_talk_comp_rate_mcps;
sepp_nepp	6:fb11b746ceb5	3212	uint32_t x_talk_comp_rate_kcps;
sepp_nepp	6:fb11b746ceb5	3213	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3214	FixPoint1616_t diff1_mcps;
sepp_nepp	6:fb11b746ceb5	3215	FixPoint1616_t diff2_mcps;
sepp_nepp	6:fb11b746ceb5	3216	FixPoint1616_t sqr1;
sepp_nepp	6:fb11b746ceb5	3217	FixPoint1616_t sqr2;
sepp_nepp	6:fb11b746ceb5	3218	FixPoint1616_t sqr_sum;
sepp_nepp	6:fb11b746ceb5	3219	FixPoint1616_t sqrt_result_centi_ns;
sepp_nepp	6:fb11b746ceb5	3220	FixPoint1616_t sqrt_result;
sepp_nepp	6:fb11b746ceb5	3221	FixPoint1616_t total_signal_rate_mcps;
sepp_nepp	6:fb11b746ceb5	3222	FixPoint1616_t corrected_signal_rate_mcps;
sepp_nepp	6:fb11b746ceb5	3223	FixPoint1616_t sigma_est_ref;
sepp_nepp	6:fb11b746ceb5	3224	uint32_t vcsel_width;
sepp_nepp	6:fb11b746ceb5	3225	uint32_t final_range_macro_pclks;
sepp_nepp	6:fb11b746ceb5	3226	uint32_t pre_range_macro_pclks;
sepp_nepp	6:fb11b746ceb5	3227	uint32_t peak_vcsel_duration_us;
sepp_nepp	6:fb11b746ceb5	3228	uint8_t final_range_vcsel_pclks;
sepp_nepp	6:fb11b746ceb5	3229	uint8_t pre_range_vcsel_pclks;
sepp_nepp	6:fb11b746ceb5	3230	/*! \addtogroup calc_sigma_estimate
sepp_nepp	6:fb11b746ceb5	3231	* @{
sepp_nepp	6:fb11b746ceb5	3232	*
sepp_nepp	6:fb11b746ceb5	3233	* Estimates the range sigma
sepp_nepp	6:fb11b746ceb5	3234	*/
sepp_nepp	6:fb11b746ceb5	3235
sepp_nepp	6:fb11b746ceb5	3236
sepp_nepp	6:fb11b746ceb5	3237
sepp_nepp	7:3a1115c2556b	3238	VL53L0X_GETPARAMETERFIELD( XTalkCompensationRateMegaCps,
sepp_nepp	6:fb11b746ceb5	3239	x_talk_comp_rate_mcps);
sepp_nepp	6:fb11b746ceb5	3240
sepp_nepp	6:fb11b746ceb5	3241	/*
sepp_nepp	6:fb11b746ceb5	3242	* We work in kcps rather than mcps as this helps keep within the
sepp_nepp	6:fb11b746ceb5	3243	* confines of the 32 Fix1616 type.
sepp_nepp	6:fb11b746ceb5	3244	*/
sepp_nepp	6:fb11b746ceb5	3245
sepp_nepp	6:fb11b746ceb5	3246	ambient_rate_kcps =
sepp_nepp	6:fb11b746ceb5	3247	(p_ranging_measurement_data->AmbientRateRtnMegaCps * 1000) >> 16;
sepp_nepp	6:fb11b746ceb5	3248
sepp_nepp	6:fb11b746ceb5	3249	corrected_signal_rate_mcps =
sepp_nepp	6:fb11b746ceb5	3250	p_ranging_measurement_data->SignalRateRtnMegaCps;
sepp_nepp	6:fb11b746ceb5	3251
sepp_nepp	6:fb11b746ceb5	3252
sepp_nepp	7:3a1115c2556b	3253	status = VL53L0X_get_total_signal_rate(p_ranging_measurement_data, &total_signal_rate_mcps);
sepp_nepp	7:3a1115c2556b	3254	status = VL53L0X_get_total_xtalk_rate(p_ranging_measurement_data, &x_talk_comp_rate_mcps);
sepp_nepp	6:fb11b746ceb5	3255
sepp_nepp	6:fb11b746ceb5	3256
sepp_nepp	6:fb11b746ceb5	3257	/* Signal rate measurement provided by device is the
sepp_nepp	6:fb11b746ceb5	3258	* peak signal rate, not average.
sepp_nepp	6:fb11b746ceb5	3259	*/
sepp_nepp	6:fb11b746ceb5	3260	peak_signal_rate_kcps = (total_signal_rate_mcps * 1000);
sepp_nepp	6:fb11b746ceb5	3261	peak_signal_rate_kcps = (peak_signal_rate_kcps + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3262
sepp_nepp	6:fb11b746ceb5	3263	x_talk_comp_rate_kcps = x_talk_comp_rate_mcps * 1000;
sepp_nepp	6:fb11b746ceb5	3264
sepp_nepp	6:fb11b746ceb5	3265	if (x_talk_comp_rate_kcps > c_max_x_talk_kcps) {
sepp_nepp	6:fb11b746ceb5	3266	x_talk_comp_rate_kcps = c_max_x_talk_kcps;
sepp_nepp	6:fb11b746ceb5	3267	}
sepp_nepp	6:fb11b746ceb5	3268
sepp_nepp	6:fb11b746ceb5	3269	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3270
sepp_nepp	6:fb11b746ceb5	3271	/* Calculate final range macro periods */
sepp_nepp	7:3a1115c2556b	3272	final_range_timeout_micro_secs = VL53L0X_GETDEVICESPECIFICPARAMETER( FinalRangeTimeoutMicroSecs);
sepp_nepp	7:3a1115c2556b	3273	final_range_vcsel_pclks = VL53L0X_GETDEVICESPECIFICPARAMETER( FinalRangeVcselPulsePeriod);
sepp_nepp	7:3a1115c2556b	3274	final_range_macro_pclks = VL53L0X_calc_timeout_mclks( final_range_timeout_micro_secs, final_range_vcsel_pclks);
sepp_nepp	6:fb11b746ceb5	3275
sepp_nepp	6:fb11b746ceb5	3276	/* Calculate pre-range macro periods */
sepp_nepp	7:3a1115c2556b	3277	pre_range_timeout_micro_secs = VL53L0X_GETDEVICESPECIFICPARAMETER( PreRangeTimeoutMicroSecs);
sepp_nepp	7:3a1115c2556b	3278	pre_range_vcsel_pclks = VL53L0X_GETDEVICESPECIFICPARAMETER( PreRangeVcselPulsePeriod);
sepp_nepp	7:3a1115c2556b	3279
sepp_nepp	7:3a1115c2556b	3280	pre_range_macro_pclks = VL53L0X_calc_timeout_mclks(pre_range_timeout_micro_secs, pre_range_vcsel_pclks);
sepp_nepp	6:fb11b746ceb5	3281
sepp_nepp	6:fb11b746ceb5	3282	vcsel_width = 3;
sepp_nepp	6:fb11b746ceb5	3283	if (final_range_vcsel_pclks == 8) {
sepp_nepp	6:fb11b746ceb5	3284	vcsel_width = 2;
sepp_nepp	6:fb11b746ceb5	3285	}
sepp_nepp	6:fb11b746ceb5	3286
sepp_nepp	6:fb11b746ceb5	3287
sepp_nepp	6:fb11b746ceb5	3288	peak_vcsel_duration_us = vcsel_width * 2048 *
sepp_nepp	6:fb11b746ceb5	3289	(pre_range_macro_pclks + final_range_macro_pclks);
sepp_nepp	6:fb11b746ceb5	3290	peak_vcsel_duration_us = (peak_vcsel_duration_us + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3291	peak_vcsel_duration_us *= c_pll_period_ps;
sepp_nepp	6:fb11b746ceb5	3292	peak_vcsel_duration_us = (peak_vcsel_duration_us + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3293
sepp_nepp	6:fb11b746ceb5	3294	/* Fix1616 >> 8 = Fix2408 */
sepp_nepp	6:fb11b746ceb5	3295	total_signal_rate_mcps = (total_signal_rate_mcps + 0x80) >> 8;
sepp_nepp	6:fb11b746ceb5	3296
sepp_nepp	6:fb11b746ceb5	3297	/* Fix2408 * uint32 = Fix2408 */
sepp_nepp	6:fb11b746ceb5	3298	vcsel_total_events_rtn = total_signal_rate_mcps *
sepp_nepp	6:fb11b746ceb5	3299	peak_vcsel_duration_us;
sepp_nepp	6:fb11b746ceb5	3300
sepp_nepp	6:fb11b746ceb5	3301	/* Fix2408 >> 8 = uint32 */
sepp_nepp	6:fb11b746ceb5	3302	vcsel_total_events_rtn = (vcsel_total_events_rtn + 0x80) >> 8;
sepp_nepp	6:fb11b746ceb5	3303
sepp_nepp	6:fb11b746ceb5	3304	/* Fix2408 << 8 = Fix1616 = */
sepp_nepp	6:fb11b746ceb5	3305	total_signal_rate_mcps <<= 8;
sepp_nepp	6:fb11b746ceb5	3306	}
sepp_nepp	6:fb11b746ceb5	3307
sepp_nepp	6:fb11b746ceb5	3308	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3309
sepp_nepp	6:fb11b746ceb5	3310	return status;
sepp_nepp	6:fb11b746ceb5	3311	}
sepp_nepp	6:fb11b746ceb5	3312
sepp_nepp	6:fb11b746ceb5	3313	if (peak_signal_rate_kcps == 0) {
sepp_nepp	6:fb11b746ceb5	3314	*p_sigma_estimate = c_sigma_est_max;
sepp_nepp	7:3a1115c2556b	3315	PALDevDataSet( SigmaEstimate, c_sigma_est_max);
sepp_nepp	6:fb11b746ceb5	3316	*p_dmax_mm = 0;
sepp_nepp	6:fb11b746ceb5	3317	} else {
sepp_nepp	6:fb11b746ceb5	3318	if (vcsel_total_events_rtn < 1) {
sepp_nepp	6:fb11b746ceb5	3319	vcsel_total_events_rtn = 1;
sepp_nepp	6:fb11b746ceb5	3320	}
sepp_nepp	6:fb11b746ceb5	3321
sepp_nepp	6:fb11b746ceb5	3322	sigma_estimate_p1 = c_pulse_effective_width_centi_ns;
sepp_nepp	6:fb11b746ceb5	3323
sepp_nepp	6:fb11b746ceb5	3324	/* ((FixPoint1616 << 16)* uint32)/uint32 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3325	sigma_estimate_p2 = (ambient_rate_kcps << 16) / peak_signal_rate_kcps;
sepp_nepp	6:fb11b746ceb5	3326	if (sigma_estimate_p2 > c_amb_to_signal_ratio_max) {
sepp_nepp	6:fb11b746ceb5	3327	/* Clip to prevent overflow. Will ensure safe
sepp_nepp	6:fb11b746ceb5	3328	* max result. */
sepp_nepp	6:fb11b746ceb5	3329	sigma_estimate_p2 = c_amb_to_signal_ratio_max;
sepp_nepp	6:fb11b746ceb5	3330	}
sepp_nepp	6:fb11b746ceb5	3331	sigma_estimate_p2 *= c_ambient_effective_width_centi_ns;
sepp_nepp	6:fb11b746ceb5	3332
sepp_nepp	6:fb11b746ceb5	3333	sigma_estimate_p3 = 2 * VL53L0X_isqrt(vcsel_total_events_rtn * 12);
sepp_nepp	6:fb11b746ceb5	3334
sepp_nepp	6:fb11b746ceb5	3335	/* uint32 * FixPoint1616 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3336	delta_t_ps = p_ranging_measurement_data->RangeMilliMeter *
sepp_nepp	6:fb11b746ceb5	3337	c_tof_per_mm_ps;
sepp_nepp	6:fb11b746ceb5	3338
sepp_nepp	6:fb11b746ceb5	3339	/*
sepp_nepp	6:fb11b746ceb5	3340	* vcselRate - xtalkCompRate
sepp_nepp	6:fb11b746ceb5	3341	* (uint32 << 16) - FixPoint1616 = FixPoint1616.
sepp_nepp	6:fb11b746ceb5	3342	* Divide result by 1000 to convert to mcps.
sepp_nepp	6:fb11b746ceb5	3343	* 500 is added to ensure rounding when integer division
sepp_nepp	6:fb11b746ceb5	3344	* truncates.
sepp_nepp	6:fb11b746ceb5	3345	*/
sepp_nepp	6:fb11b746ceb5	3346	diff1_mcps = (((peak_signal_rate_kcps << 16) -
sepp_nepp	6:fb11b746ceb5	3347	2 * x_talk_comp_rate_kcps) + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3348
sepp_nepp	6:fb11b746ceb5	3349	/* vcselRate + xtalkCompRate */
sepp_nepp	6:fb11b746ceb5	3350	diff2_mcps = ((peak_signal_rate_kcps << 16) + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3351
sepp_nepp	6:fb11b746ceb5	3352	/* Shift by 8 bits to increase resolution prior to the
sepp_nepp	6:fb11b746ceb5	3353	* division */
sepp_nepp	6:fb11b746ceb5	3354	diff1_mcps <<= 8;
sepp_nepp	6:fb11b746ceb5	3355
sepp_nepp	6:fb11b746ceb5	3356	/* FixPoint0824/FixPoint1616 = FixPoint2408 */
sepp_nepp	6:fb11b746ceb5	3357	// xTalkCorrection = abs(diff1_mcps/diff2_mcps);
sepp_nepp	6:fb11b746ceb5	3358	// abs is causing compiler overloading isue in C++, but unsigned types. So, redundant call anyway!
sepp_nepp	6:fb11b746ceb5	3359	x_talk_correction = diff1_mcps / diff2_mcps;
sepp_nepp	6:fb11b746ceb5	3360
sepp_nepp	6:fb11b746ceb5	3361	/* FixPoint2408 << 8 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3362	x_talk_correction <<= 8;
sepp_nepp	6:fb11b746ceb5	3363
sepp_nepp	6:fb11b746ceb5	3364	if (p_ranging_measurement_data->RangeStatus != 0) {
sepp_nepp	6:fb11b746ceb5	3365	pw_mult = 1 << 16;
sepp_nepp	6:fb11b746ceb5	3366	} else {
sepp_nepp	6:fb11b746ceb5	3367	/* FixPoint1616/uint32 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3368	pw_mult = delta_t_ps / c_vcsel_pulse_width_ps; /* smaller than 1.0f */
sepp_nepp	6:fb11b746ceb5	3369
sepp_nepp	6:fb11b746ceb5	3370	/*
sepp_nepp	6:fb11b746ceb5	3371	* FixPoint1616 * FixPoint1616 = FixPoint3232, however both
sepp_nepp	6:fb11b746ceb5	3372	* values are small enough such that32 bits will not be
sepp_nepp	6:fb11b746ceb5	3373	* exceeded.
sepp_nepp	6:fb11b746ceb5	3374	*/
sepp_nepp	6:fb11b746ceb5	3375	pw_mult *= ((1 << 16) - x_talk_correction);
sepp_nepp	6:fb11b746ceb5	3376
sepp_nepp	6:fb11b746ceb5	3377	/* (FixPoint3232 >> 16) = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3378	pw_mult = (pw_mult + c_16bit_rounding_param) >> 16;
sepp_nepp	6:fb11b746ceb5	3379
sepp_nepp	6:fb11b746ceb5	3380	/* FixPoint1616 + FixPoint1616 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3381	pw_mult += (1 << 16);
sepp_nepp	6:fb11b746ceb5	3382
sepp_nepp	6:fb11b746ceb5	3383	/*
sepp_nepp	6:fb11b746ceb5	3384	* At this point the value will be 1.xx, therefore if we square
sepp_nepp	6:fb11b746ceb5	3385	* the value this will exceed 32 bits. To address this perform
sepp_nepp	6:fb11b746ceb5	3386	* a single shift to the right before the multiplication.
sepp_nepp	6:fb11b746ceb5	3387	*/
sepp_nepp	6:fb11b746ceb5	3388	pw_mult >>= 1;
sepp_nepp	6:fb11b746ceb5	3389	/* FixPoint1715 * FixPoint1715 = FixPoint3430 */
sepp_nepp	6:fb11b746ceb5	3390	pw_mult = pw_mult * pw_mult;
sepp_nepp	6:fb11b746ceb5	3391
sepp_nepp	6:fb11b746ceb5	3392	/* (FixPoint3430 >> 14) = Fix1616 */
sepp_nepp	6:fb11b746ceb5	3393	pw_mult >>= 14;
sepp_nepp	6:fb11b746ceb5	3394	}
sepp_nepp	6:fb11b746ceb5	3395
sepp_nepp	6:fb11b746ceb5	3396	/* FixPoint1616 * uint32 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3397	sqr1 = pw_mult * sigma_estimate_p1;
sepp_nepp	6:fb11b746ceb5	3398
sepp_nepp	6:fb11b746ceb5	3399	/* (FixPoint1616 >> 16) = FixPoint3200 */
sepp_nepp	6:fb11b746ceb5	3400	sqr1 = (sqr1 + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3401
sepp_nepp	6:fb11b746ceb5	3402	/* FixPoint3200 * FixPoint3200 = FixPoint6400 */
sepp_nepp	6:fb11b746ceb5	3403	sqr1 *= sqr1;
sepp_nepp	6:fb11b746ceb5	3404
sepp_nepp	6:fb11b746ceb5	3405	sqr2 = sigma_estimate_p2;
sepp_nepp	6:fb11b746ceb5	3406
sepp_nepp	6:fb11b746ceb5	3407	/* (FixPoint1616 >> 16) = FixPoint3200 */
sepp_nepp	6:fb11b746ceb5	3408	sqr2 = (sqr2 + 0x8000) >> 16;
sepp_nepp	6:fb11b746ceb5	3409
sepp_nepp	6:fb11b746ceb5	3410	/* FixPoint3200 * FixPoint3200 = FixPoint6400 */
sepp_nepp	6:fb11b746ceb5	3411	sqr2 *= sqr2;
sepp_nepp	6:fb11b746ceb5	3412
sepp_nepp	6:fb11b746ceb5	3413	/* FixPoint64000 + FixPoint6400 = FixPoint6400 */
sepp_nepp	6:fb11b746ceb5	3414	sqr_sum = sqr1 + sqr2;
sepp_nepp	6:fb11b746ceb5	3415
sepp_nepp	6:fb11b746ceb5	3416	/* SQRT(FixPoin6400) = FixPoint3200 */
sepp_nepp	6:fb11b746ceb5	3417	sqrt_result_centi_ns = VL53L0X_isqrt(sqr_sum);
sepp_nepp	6:fb11b746ceb5	3418
sepp_nepp	6:fb11b746ceb5	3419	/* (FixPoint3200 << 16) = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3420	sqrt_result_centi_ns <<= 16;
sepp_nepp	6:fb11b746ceb5	3421
sepp_nepp	6:fb11b746ceb5	3422	/*
sepp_nepp	6:fb11b746ceb5	3423	* Note that the Speed Of Light is expressed in um per 1E-10
sepp_nepp	6:fb11b746ceb5	3424	* seconds (2997) Therefore to get mm/ns we have to divide by
sepp_nepp	6:fb11b746ceb5	3425	* 10000
sepp_nepp	6:fb11b746ceb5	3426	*/
sepp_nepp	6:fb11b746ceb5	3427	sigma_est_rtn = (((sqrt_result_centi_ns + 50) / 100) /
sepp_nepp	6:fb11b746ceb5	3428	sigma_estimate_p3);
sepp_nepp	6:fb11b746ceb5	3429	sigma_est_rtn *= VL53L0X_SPEED_OF_LIGHT_IN_AIR;
sepp_nepp	6:fb11b746ceb5	3430
sepp_nepp	6:fb11b746ceb5	3431	/* Add 5000 before dividing by 10000 to ensure rounding. */
sepp_nepp	6:fb11b746ceb5	3432	sigma_est_rtn += 5000;
sepp_nepp	6:fb11b746ceb5	3433	sigma_est_rtn /= 10000;
sepp_nepp	6:fb11b746ceb5	3434
sepp_nepp	6:fb11b746ceb5	3435	if (sigma_est_rtn > c_sigma_est_rtn_max) {
sepp_nepp	6:fb11b746ceb5	3436	/* Clip to prevent overflow. Will ensure safe
sepp_nepp	6:fb11b746ceb5	3437	* max result. */
sepp_nepp	6:fb11b746ceb5	3438	sigma_est_rtn = c_sigma_est_rtn_max;
sepp_nepp	6:fb11b746ceb5	3439	}
sepp_nepp	6:fb11b746ceb5	3440	final_range_integration_time_milli_secs =
sepp_nepp	6:fb11b746ceb5	3441	(final_range_timeout_micro_secs + pre_range_timeout_micro_secs + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3442
sepp_nepp	6:fb11b746ceb5	3443	/* sigmaEstRef = 1mm * 25ms/final range integration time (inc pre-range)
sepp_nepp	6:fb11b746ceb5	3444	* sqrt(FixPoint1616/int) = FixPoint2408)
sepp_nepp	6:fb11b746ceb5	3445	*/
sepp_nepp	6:fb11b746ceb5	3446	sigma_est_ref =
sepp_nepp	6:fb11b746ceb5	3447	VL53L0X_isqrt((c_dflt_final_range_integration_time_milli_secs +
sepp_nepp	6:fb11b746ceb5	3448	final_range_integration_time_milli_secs / 2) /
sepp_nepp	6:fb11b746ceb5	3449	final_range_integration_time_milli_secs);
sepp_nepp	6:fb11b746ceb5	3450
sepp_nepp	6:fb11b746ceb5	3451	/* FixPoint2408 << 8 = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3452	sigma_est_ref <<= 8;
sepp_nepp	6:fb11b746ceb5	3453	sigma_est_ref = (sigma_est_ref + 500) / 1000;
sepp_nepp	6:fb11b746ceb5	3454
sepp_nepp	6:fb11b746ceb5	3455	/* FixPoint1616 * FixPoint1616 = FixPoint3232 */
sepp_nepp	6:fb11b746ceb5	3456	sqr1 = sigma_est_rtn * sigma_est_rtn;
sepp_nepp	6:fb11b746ceb5	3457	/* FixPoint1616 * FixPoint1616 = FixPoint3232 */
sepp_nepp	6:fb11b746ceb5	3458	sqr2 = sigma_est_ref * sigma_est_ref;
sepp_nepp	6:fb11b746ceb5	3459
sepp_nepp	6:fb11b746ceb5	3460	/* sqrt(FixPoint3232) = FixPoint1616 */
sepp_nepp	6:fb11b746ceb5	3461	sqrt_result = VL53L0X_isqrt((sqr1 + sqr2));
sepp_nepp	6:fb11b746ceb5	3462	/*
sepp_nepp	6:fb11b746ceb5	3463	* Note that the Shift by 4 bits increases resolution prior to
sepp_nepp	6:fb11b746ceb5	3464	* the sqrt, therefore the result must be shifted by 2 bits to
sepp_nepp	6:fb11b746ceb5	3465	* the right to revert back to the FixPoint1616 format.
sepp_nepp	6:fb11b746ceb5	3466	*/
sepp_nepp	6:fb11b746ceb5	3467
sepp_nepp	6:fb11b746ceb5	3468	sigma_estimate = 1000 * sqrt_result;
sepp_nepp	6:fb11b746ceb5	3469
sepp_nepp	6:fb11b746ceb5	3470	if ((peak_signal_rate_kcps < 1) \|\| (vcsel_total_events_rtn < 1) \|\|
sepp_nepp	6:fb11b746ceb5	3471	(sigma_estimate > c_sigma_est_max)) {
sepp_nepp	6:fb11b746ceb5	3472	sigma_estimate = c_sigma_est_max;
sepp_nepp	6:fb11b746ceb5	3473	}
sepp_nepp	6:fb11b746ceb5	3474
sepp_nepp	6:fb11b746ceb5	3475	*p_sigma_estimate = (uint32_t)(sigma_estimate);
sepp_nepp	7:3a1115c2556b	3476	PALDevDataSet( SigmaEstimate, *p_sigma_estimate);
sepp_nepp	7:3a1115c2556b	3477	status = VL53L0X_calc_dmax(total_signal_rate_mcps,
sepp_nepp	6:fb11b746ceb5	3478	corrected_signal_rate_mcps,
sepp_nepp	6:fb11b746ceb5	3479	pw_mult,
sepp_nepp	6:fb11b746ceb5	3480	sigma_estimate_p1,
sepp_nepp	6:fb11b746ceb5	3481	sigma_estimate_p2,
sepp_nepp	6:fb11b746ceb5	3482	peak_vcsel_duration_us,
sepp_nepp	6:fb11b746ceb5	3483	p_dmax_mm);
sepp_nepp	6:fb11b746ceb5	3484	}
sepp_nepp	6:fb11b746ceb5	3485
sepp_nepp	6:fb11b746ceb5	3486
sepp_nepp	6:fb11b746ceb5	3487	return status;
sepp_nepp	6:fb11b746ceb5	3488	}
sepp_nepp	6:fb11b746ceb5	3489
sepp_nepp	7:3a1115c2556b	3490	VL53L0X_Error VL53L0X::VL53L0X_get_pal_range_status(
sepp_nepp	6:fb11b746ceb5	3491	uint8_t device_range_status,
sepp_nepp	6:fb11b746ceb5	3492	FixPoint1616_t signal_rate,
sepp_nepp	6:fb11b746ceb5	3493	uint16_t effective_spad_rtn_count,
sepp_nepp	6:fb11b746ceb5	3494	VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data,
sepp_nepp	6:fb11b746ceb5	3495	uint8_t *p_pal_range_status)
sepp_nepp	6:fb11b746ceb5	3496	{
sepp_nepp	6:fb11b746ceb5	3497	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3498	uint8_t none_flag;
sepp_nepp	6:fb11b746ceb5	3499	uint8_t sigma_limitflag = 0;
sepp_nepp	6:fb11b746ceb5	3500	uint8_t signal_ref_clipflag = 0;
sepp_nepp	6:fb11b746ceb5	3501	uint8_t range_ignore_thresholdflag = 0;
sepp_nepp	6:fb11b746ceb5	3502	uint8_t sigma_limit_check_enable = 0;
sepp_nepp	6:fb11b746ceb5	3503	uint8_t signal_rate_final_range_limit_check_enable = 0;
sepp_nepp	6:fb11b746ceb5	3504	uint8_t signal_ref_clip_limit_check_enable = 0;
sepp_nepp	6:fb11b746ceb5	3505	uint8_t range_ignore_threshold_limit_check_enable = 0;
sepp_nepp	6:fb11b746ceb5	3506	FixPoint1616_t sigma_estimate;
sepp_nepp	6:fb11b746ceb5	3507	FixPoint1616_t sigma_limit_value;
sepp_nepp	6:fb11b746ceb5	3508	FixPoint1616_t signal_ref_clip_value;
sepp_nepp	6:fb11b746ceb5	3509	FixPoint1616_t range_ignore_threshold_value;
sepp_nepp	6:fb11b746ceb5	3510	FixPoint1616_t signal_rate_per_spad;
sepp_nepp	6:fb11b746ceb5	3511	uint8_t device_range_status_internal = 0;
sepp_nepp	6:fb11b746ceb5	3512	uint16_t tmp_word = 0;
sepp_nepp	6:fb11b746ceb5	3513	uint8_t temp8;
sepp_nepp	6:fb11b746ceb5	3514	uint32_t dmax_mm = 0;
sepp_nepp	6:fb11b746ceb5	3515	FixPoint1616_t last_signal_ref_mcps;
sepp_nepp	6:fb11b746ceb5	3516
sepp_nepp	6:fb11b746ceb5	3517
sepp_nepp	6:fb11b746ceb5	3518
sepp_nepp	6:fb11b746ceb5	3519
sepp_nepp	6:fb11b746ceb5	3520	/*
sepp_nepp	6:fb11b746ceb5	3521	* VL53L0X has a good ranging when the value of the
sepp_nepp	6:fb11b746ceb5	3522	* DeviceRangeStatus = 11. This function will replace the value 0 with
sepp_nepp	6:fb11b746ceb5	3523	* the value 11 in the DeviceRangeStatus.
sepp_nepp	6:fb11b746ceb5	3524	* In addition, the SigmaEstimator is not included in the VL53L0X
sepp_nepp	6:fb11b746ceb5	3525	* DeviceRangeStatus, this will be added in the PalRangeStatus.
sepp_nepp	6:fb11b746ceb5	3526	*/
sepp_nepp	6:fb11b746ceb5	3527
sepp_nepp	6:fb11b746ceb5	3528	device_range_status_internal = ((device_range_status & 0x78) >> 3);
sepp_nepp	6:fb11b746ceb5	3529
sepp_nepp	6:fb11b746ceb5	3530	if (device_range_status_internal == 0 \|\|
sepp_nepp	6:fb11b746ceb5	3531	device_range_status_internal == 5 \|\|
sepp_nepp	6:fb11b746ceb5	3532	device_range_status_internal == 7 \|\|
sepp_nepp	6:fb11b746ceb5	3533	device_range_status_internal == 12 \|\|
sepp_nepp	6:fb11b746ceb5	3534	device_range_status_internal == 13 \|\|
sepp_nepp	6:fb11b746ceb5	3535	device_range_status_internal == 14 \|\|
sepp_nepp	6:fb11b746ceb5	3536	device_range_status_internal == 15
sepp_nepp	6:fb11b746ceb5	3537	) {
sepp_nepp	6:fb11b746ceb5	3538	none_flag = 1;
sepp_nepp	6:fb11b746ceb5	3539	} else {
sepp_nepp	6:fb11b746ceb5	3540	none_flag = 0;
sepp_nepp	6:fb11b746ceb5	3541	}
sepp_nepp	6:fb11b746ceb5	3542
sepp_nepp	6:fb11b746ceb5	3543	/*
sepp_nepp	6:fb11b746ceb5	3544	* Check if Sigma limit is enabled, if yes then do comparison with limit
sepp_nepp	6:fb11b746ceb5	3545	* value and put the result back into pPalRangeStatus.
sepp_nepp	6:fb11b746ceb5	3546	*/
sepp_nepp	6:fb11b746ceb5	3547	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3548	status = VL53L0X_get_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	3549	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	3550	&sigma_limit_check_enable);
sepp_nepp	6:fb11b746ceb5	3551	}
sepp_nepp	6:fb11b746ceb5	3552
sepp_nepp	6:fb11b746ceb5	3553	if ((sigma_limit_check_enable != 0) && (status == VL53L0X_ERROR_NONE)) {
sepp_nepp	6:fb11b746ceb5	3554	/*
sepp_nepp	6:fb11b746ceb5	3555	* compute the Sigma and check with limit
sepp_nepp	6:fb11b746ceb5	3556	*/
sepp_nepp	7:3a1115c2556b	3557	status = VL53L0X_calc_sigma_estimate(p_ranging_measurement_data,
sepp_nepp	6:fb11b746ceb5	3558	&sigma_estimate,
sepp_nepp	6:fb11b746ceb5	3559	&dmax_mm);
sepp_nepp	6:fb11b746ceb5	3560	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3561	p_ranging_measurement_data->RangeDMaxMilliMeter = dmax_mm;
sepp_nepp	6:fb11b746ceb5	3562	}
sepp_nepp	6:fb11b746ceb5	3563
sepp_nepp	6:fb11b746ceb5	3564	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3565	status = VL53L0X_get_limit_check_value(
sepp_nepp	6:fb11b746ceb5	3566	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	3567	&sigma_limit_value);
sepp_nepp	6:fb11b746ceb5	3568
sepp_nepp	6:fb11b746ceb5	3569	if ((sigma_limit_value > 0) &&
sepp_nepp	6:fb11b746ceb5	3570	(sigma_estimate > sigma_limit_value)) {
sepp_nepp	6:fb11b746ceb5	3571	/* Limit Fail */
sepp_nepp	6:fb11b746ceb5	3572	sigma_limitflag = 1;
sepp_nepp	6:fb11b746ceb5	3573	}
sepp_nepp	6:fb11b746ceb5	3574	}
sepp_nepp	6:fb11b746ceb5	3575	}
sepp_nepp	6:fb11b746ceb5	3576
sepp_nepp	6:fb11b746ceb5	3577	/*
sepp_nepp	6:fb11b746ceb5	3578	* Check if Signal ref clip limit is enabled, if yes then do comparison
sepp_nepp	6:fb11b746ceb5	3579	* with limit value and put the result back into pPalRangeStatus.
sepp_nepp	6:fb11b746ceb5	3580	*/
sepp_nepp	6:fb11b746ceb5	3581	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3582	status = VL53L0X_get_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	3583	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP,
sepp_nepp	6:fb11b746ceb5	3584	&signal_ref_clip_limit_check_enable);
sepp_nepp	6:fb11b746ceb5	3585	}
sepp_nepp	6:fb11b746ceb5	3586
sepp_nepp	6:fb11b746ceb5	3587	if ((signal_ref_clip_limit_check_enable != 0) &&
sepp_nepp	6:fb11b746ceb5	3588	(status == VL53L0X_ERROR_NONE)) {
sepp_nepp	6:fb11b746ceb5	3589
sepp_nepp	7:3a1115c2556b	3590	status = VL53L0X_get_limit_check_value(
sepp_nepp	6:fb11b746ceb5	3591	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP,
sepp_nepp	6:fb11b746ceb5	3592	&signal_ref_clip_value);
sepp_nepp	6:fb11b746ceb5	3593
sepp_nepp	6:fb11b746ceb5	3594	/* Read LastSignalRefMcps from device */
sepp_nepp	6:fb11b746ceb5	3595	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3596	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	6:fb11b746ceb5	3597	}
sepp_nepp	6:fb11b746ceb5	3598
sepp_nepp	6:fb11b746ceb5	3599	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3600	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	3601	VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF,
sepp_nepp	6:fb11b746ceb5	3602	&tmp_word);
sepp_nepp	6:fb11b746ceb5	3603	}
sepp_nepp	6:fb11b746ceb5	3604
sepp_nepp	6:fb11b746ceb5	3605	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3606	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	3607	}
sepp_nepp	6:fb11b746ceb5	3608
sepp_nepp	6:fb11b746ceb5	3609	last_signal_ref_mcps = VL53L0X_FIXPOINT97TOFIXPOINT1616(tmp_word);
sepp_nepp	7:3a1115c2556b	3610	PALDevDataSet( LastSignalRefMcps, last_signal_ref_mcps);
sepp_nepp	6:fb11b746ceb5	3611
sepp_nepp	6:fb11b746ceb5	3612	if ((signal_ref_clip_value > 0) &&
sepp_nepp	6:fb11b746ceb5	3613	(last_signal_ref_mcps > signal_ref_clip_value)) {
sepp_nepp	6:fb11b746ceb5	3614	/* Limit Fail */
sepp_nepp	6:fb11b746ceb5	3615	signal_ref_clipflag = 1;
sepp_nepp	6:fb11b746ceb5	3616	}
sepp_nepp	6:fb11b746ceb5	3617	}
sepp_nepp	6:fb11b746ceb5	3618
sepp_nepp	6:fb11b746ceb5	3619	/*
sepp_nepp	6:fb11b746ceb5	3620	* Check if Signal ref clip limit is enabled, if yes then do comparison
sepp_nepp	6:fb11b746ceb5	3621	* with limit value and put the result back into pPalRangeStatus.
sepp_nepp	6:fb11b746ceb5	3622	* EffectiveSpadRtnCount has a format 8.8
sepp_nepp	6:fb11b746ceb5	3623	* If (Return signal rate < (1.5 x Xtalk x number of Spads)) : FAIL
sepp_nepp	6:fb11b746ceb5	3624	*/
sepp_nepp	6:fb11b746ceb5	3625	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3626	status = VL53L0X_get_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	3627	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD,
sepp_nepp	6:fb11b746ceb5	3628	&range_ignore_threshold_limit_check_enable);
sepp_nepp	6:fb11b746ceb5	3629	}
sepp_nepp	6:fb11b746ceb5	3630
sepp_nepp	6:fb11b746ceb5	3631	if ((range_ignore_threshold_limit_check_enable != 0) &&
sepp_nepp	6:fb11b746ceb5	3632	(status == VL53L0X_ERROR_NONE)) {
sepp_nepp	6:fb11b746ceb5	3633
sepp_nepp	6:fb11b746ceb5	3634	/* Compute the signal rate per spad */
sepp_nepp	6:fb11b746ceb5	3635	if (effective_spad_rtn_count == 0) {
sepp_nepp	6:fb11b746ceb5	3636	signal_rate_per_spad = 0;
sepp_nepp	6:fb11b746ceb5	3637	} else {
sepp_nepp	6:fb11b746ceb5	3638	signal_rate_per_spad = (FixPoint1616_t)((256 * signal_rate)
sepp_nepp	6:fb11b746ceb5	3639	/ effective_spad_rtn_count);
sepp_nepp	6:fb11b746ceb5	3640	}
sepp_nepp	6:fb11b746ceb5	3641
sepp_nepp	7:3a1115c2556b	3642	status = VL53L0X_get_limit_check_value(
sepp_nepp	6:fb11b746ceb5	3643	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD,
sepp_nepp	6:fb11b746ceb5	3644	&range_ignore_threshold_value);
sepp_nepp	6:fb11b746ceb5	3645
sepp_nepp	6:fb11b746ceb5	3646	if ((range_ignore_threshold_value > 0) &&
sepp_nepp	6:fb11b746ceb5	3647	(signal_rate_per_spad < range_ignore_threshold_value)) {
sepp_nepp	6:fb11b746ceb5	3648	/* Limit Fail add 2^6 to range status */
sepp_nepp	6:fb11b746ceb5	3649	range_ignore_thresholdflag = 1;
sepp_nepp	6:fb11b746ceb5	3650	}
sepp_nepp	6:fb11b746ceb5	3651	}
sepp_nepp	6:fb11b746ceb5	3652
sepp_nepp	6:fb11b746ceb5	3653	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3654	if (none_flag == 1) {
sepp_nepp	6:fb11b746ceb5	3655	p_pal_range_status = 255; / NONE */
sepp_nepp	6:fb11b746ceb5	3656	} else if (device_range_status_internal == 1 \|\|
sepp_nepp	6:fb11b746ceb5	3657	device_range_status_internal == 2 \|\|
sepp_nepp	6:fb11b746ceb5	3658	device_range_status_internal == 3) {
sepp_nepp	6:fb11b746ceb5	3659	p_pal_range_status = 5; / HW fail */
sepp_nepp	6:fb11b746ceb5	3660	} else if (device_range_status_internal == 6 \|\|
sepp_nepp	6:fb11b746ceb5	3661	device_range_status_internal == 9) {
sepp_nepp	6:fb11b746ceb5	3662	p_pal_range_status = 4; / Phase fail */
sepp_nepp	6:fb11b746ceb5	3663	} else if (device_range_status_internal == 8 \|\|
sepp_nepp	6:fb11b746ceb5	3664	device_range_status_internal == 10 \|\|
sepp_nepp	6:fb11b746ceb5	3665	signal_ref_clipflag == 1) {
sepp_nepp	6:fb11b746ceb5	3666	p_pal_range_status = 3; / Min range */
sepp_nepp	6:fb11b746ceb5	3667	} else if (device_range_status_internal == 4 \|\|
sepp_nepp	6:fb11b746ceb5	3668	range_ignore_thresholdflag == 1) {
sepp_nepp	6:fb11b746ceb5	3669	p_pal_range_status = 2; / Signal Fail */
sepp_nepp	6:fb11b746ceb5	3670	} else if (sigma_limitflag == 1) {
sepp_nepp	6:fb11b746ceb5	3671	p_pal_range_status = 1; / Sigma Fail */
sepp_nepp	6:fb11b746ceb5	3672	} else {
sepp_nepp	6:fb11b746ceb5	3673	p_pal_range_status = 0; / Range Valid */
sepp_nepp	6:fb11b746ceb5	3674	}
sepp_nepp	6:fb11b746ceb5	3675	}
sepp_nepp	6:fb11b746ceb5	3676
sepp_nepp	6:fb11b746ceb5	3677	/* DMAX only relevant during range error */
sepp_nepp	6:fb11b746ceb5	3678	if (*p_pal_range_status == 0) {
sepp_nepp	6:fb11b746ceb5	3679	p_ranging_measurement_data->RangeDMaxMilliMeter = 0;
sepp_nepp	6:fb11b746ceb5	3680	}
sepp_nepp	6:fb11b746ceb5	3681
sepp_nepp	6:fb11b746ceb5	3682	/* fill the Limit Check Status */
sepp_nepp	6:fb11b746ceb5	3683
sepp_nepp	7:3a1115c2556b	3684	status = VL53L0X_get_limit_check_enable(
sepp_nepp	6:fb11b746ceb5	3685	VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	3686	&signal_rate_final_range_limit_check_enable);
sepp_nepp	6:fb11b746ceb5	3687
sepp_nepp	6:fb11b746ceb5	3688	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3689	if ((sigma_limit_check_enable == 0) \|\| (sigma_limitflag == 1)) {
sepp_nepp	6:fb11b746ceb5	3690	temp8 = 1;
sepp_nepp	6:fb11b746ceb5	3691	} else {
sepp_nepp	6:fb11b746ceb5	3692	temp8 = 0;
sepp_nepp	6:fb11b746ceb5	3693	}
sepp_nepp	7:3a1115c2556b	3694	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksStatus,
sepp_nepp	6:fb11b746ceb5	3695	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE, temp8);
sepp_nepp	6:fb11b746ceb5	3696
sepp_nepp	6:fb11b746ceb5	3697	if ((device_range_status_internal == 4) \|\|
sepp_nepp	6:fb11b746ceb5	3698	(signal_rate_final_range_limit_check_enable == 0)) {
sepp_nepp	6:fb11b746ceb5	3699	temp8 = 1;
sepp_nepp	6:fb11b746ceb5	3700	} else {
sepp_nepp	6:fb11b746ceb5	3701	temp8 = 0;
sepp_nepp	6:fb11b746ceb5	3702	}
sepp_nepp	7:3a1115c2556b	3703	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksStatus,
sepp_nepp	6:fb11b746ceb5	3704	VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	3705	temp8);
sepp_nepp	6:fb11b746ceb5	3706
sepp_nepp	6:fb11b746ceb5	3707	if ((signal_ref_clip_limit_check_enable == 0) \|\|
sepp_nepp	6:fb11b746ceb5	3708	(signal_ref_clipflag == 1)) {
sepp_nepp	6:fb11b746ceb5	3709	temp8 = 1;
sepp_nepp	6:fb11b746ceb5	3710	} else {
sepp_nepp	6:fb11b746ceb5	3711	temp8 = 0;
sepp_nepp	6:fb11b746ceb5	3712	}
sepp_nepp	6:fb11b746ceb5	3713
sepp_nepp	7:3a1115c2556b	3714	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksStatus,
sepp_nepp	6:fb11b746ceb5	3715	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP, temp8);
sepp_nepp	6:fb11b746ceb5	3716
sepp_nepp	6:fb11b746ceb5	3717	if ((range_ignore_threshold_limit_check_enable == 0) \|\|
sepp_nepp	6:fb11b746ceb5	3718	(range_ignore_thresholdflag == 1)) {
sepp_nepp	6:fb11b746ceb5	3719	temp8 = 1;
sepp_nepp	6:fb11b746ceb5	3720	} else {
sepp_nepp	6:fb11b746ceb5	3721	temp8 = 0;
sepp_nepp	6:fb11b746ceb5	3722	}
sepp_nepp	6:fb11b746ceb5	3723
sepp_nepp	7:3a1115c2556b	3724	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksStatus,
sepp_nepp	6:fb11b746ceb5	3725	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD,
sepp_nepp	6:fb11b746ceb5	3726	temp8);
sepp_nepp	6:fb11b746ceb5	3727	}
sepp_nepp	6:fb11b746ceb5	3728
sepp_nepp	6:fb11b746ceb5	3729
sepp_nepp	6:fb11b746ceb5	3730	return status;
sepp_nepp	6:fb11b746ceb5	3731
sepp_nepp	6:fb11b746ceb5	3732	}
sepp_nepp	6:fb11b746ceb5	3733
sepp_nepp	7:3a1115c2556b	3734	VL53L0X_Error VL53L0X::VL53L0X_get_ranging_measurement_data(
sepp_nepp	6:fb11b746ceb5	3735	VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data)
sepp_nepp	6:fb11b746ceb5	3736	{
sepp_nepp	6:fb11b746ceb5	3737	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3738	uint8_t device_range_status;
sepp_nepp	6:fb11b746ceb5	3739	uint8_t range_fractional_enable;
sepp_nepp	6:fb11b746ceb5	3740	uint8_t pal_range_status;
sepp_nepp	6:fb11b746ceb5	3741	uint8_t x_talk_compensation_enable;
sepp_nepp	6:fb11b746ceb5	3742	uint16_t ambient_rate;
sepp_nepp	6:fb11b746ceb5	3743	FixPoint1616_t signal_rate;
sepp_nepp	6:fb11b746ceb5	3744	uint16_t x_talk_compensation_rate_mega_cps;
sepp_nepp	6:fb11b746ceb5	3745	uint16_t effective_spad_rtn_count;
sepp_nepp	6:fb11b746ceb5	3746	uint16_t tmpuint16;
sepp_nepp	6:fb11b746ceb5	3747	uint16_t xtalk_range_milli_meter;
sepp_nepp	6:fb11b746ceb5	3748	uint16_t linearity_corrective_gain;
sepp_nepp	6:fb11b746ceb5	3749	uint8_t localBuffer[12];
sepp_nepp	6:fb11b746ceb5	3750	VL53L0X_RangingMeasurementData_t last_range_data_buffer;
sepp_nepp	6:fb11b746ceb5	3751
sepp_nepp	6:fb11b746ceb5	3752
sepp_nepp	6:fb11b746ceb5	3753
sepp_nepp	6:fb11b746ceb5	3754	/* use multi read even if some registers are not useful, result will
sepp_nepp	6:fb11b746ceb5	3755	* be more efficient
sepp_nepp	6:fb11b746ceb5	3756	* start reading at 0x14 dec20
sepp_nepp	6:fb11b746ceb5	3757	* end reading at 0x21 dec33 total 14 bytes to read
sepp_nepp	6:fb11b746ceb5	3758	*/
sepp_nepp	7:3a1115c2556b	3759	status = VL53L0X_read_multi( 0x14, localBuffer, 12);
sepp_nepp	6:fb11b746ceb5	3760
sepp_nepp	6:fb11b746ceb5	3761	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3762
sepp_nepp	6:fb11b746ceb5	3763	tmpuint16 = VL53L0X_MAKEUINT16(localBuffer[11], localBuffer[10]);
sepp_nepp	6:fb11b746ceb5	3764	/* cut1.1 if SYSTEM__RANGE_CONFIG if 1 range is 2bits fractional
sepp_nepp	6:fb11b746ceb5	3765	(format 11.2) else no fractional /
sepp_nepp	6:fb11b746ceb5	3766
sepp_nepp	6:fb11b746ceb5	3767	signal_rate = VL53L0X_FIXPOINT97TOFIXPOINT1616(
sepp_nepp	6:fb11b746ceb5	3768	VL53L0X_MAKEUINT16(localBuffer[7], localBuffer[6]));
sepp_nepp	6:fb11b746ceb5	3769	/* peak_signal_count_rate_rtn_mcps */
sepp_nepp	6:fb11b746ceb5	3770	p_ranging_measurement_data->SignalRateRtnMegaCps = signal_rate;
sepp_nepp	6:fb11b746ceb5	3771
sepp_nepp	6:fb11b746ceb5	3772	ambient_rate = VL53L0X_MAKEUINT16(localBuffer[9], localBuffer[8]);
sepp_nepp	6:fb11b746ceb5	3773	p_ranging_measurement_data->AmbientRateRtnMegaCps =
sepp_nepp	6:fb11b746ceb5	3774	VL53L0X_FIXPOINT97TOFIXPOINT1616(ambient_rate);
sepp_nepp	6:fb11b746ceb5	3775
sepp_nepp	6:fb11b746ceb5	3776	effective_spad_rtn_count = VL53L0X_MAKEUINT16(localBuffer[3],
sepp_nepp	6:fb11b746ceb5	3777	localBuffer[2]);
sepp_nepp	6:fb11b746ceb5	3778	/* EffectiveSpadRtnCount is 8.8 format */
sepp_nepp	6:fb11b746ceb5	3779	p_ranging_measurement_data->EffectiveSpadRtnCount =
sepp_nepp	6:fb11b746ceb5	3780	effective_spad_rtn_count;
sepp_nepp	6:fb11b746ceb5	3781
sepp_nepp	6:fb11b746ceb5	3782	device_range_status = localBuffer[0];
sepp_nepp	6:fb11b746ceb5	3783
sepp_nepp	6:fb11b746ceb5	3784	/* Get Linearity Corrective Gain */
sepp_nepp	7:3a1115c2556b	3785	linearity_corrective_gain = PALDevDataGet(
sepp_nepp	6:fb11b746ceb5	3786	LinearityCorrectiveGain);
sepp_nepp	6:fb11b746ceb5	3787
sepp_nepp	6:fb11b746ceb5	3788	/* Get ranging configuration */
sepp_nepp	7:3a1115c2556b	3789	range_fractional_enable = PALDevDataGet(RangeFractionalEnable);
sepp_nepp	6:fb11b746ceb5	3790
sepp_nepp	6:fb11b746ceb5	3791	if (linearity_corrective_gain != 1000) {
sepp_nepp	6:fb11b746ceb5	3792
sepp_nepp	6:fb11b746ceb5	3793	tmpuint16 = (uint16_t)((linearity_corrective_gain
sepp_nepp	6:fb11b746ceb5	3794	* tmpuint16 + 500) / 1000);
sepp_nepp	6:fb11b746ceb5	3795
sepp_nepp	6:fb11b746ceb5	3796	/* Implement Xtalk */
sepp_nepp	7:3a1115c2556b	3797	VL53L0X_GETPARAMETERFIELD(
sepp_nepp	6:fb11b746ceb5	3798	XTalkCompensationRateMegaCps,
sepp_nepp	6:fb11b746ceb5	3799	x_talk_compensation_rate_mega_cps);
sepp_nepp	7:3a1115c2556b	3800	VL53L0X_GETPARAMETERFIELD( XTalkCompensationEnable,
sepp_nepp	6:fb11b746ceb5	3801	x_talk_compensation_enable);
sepp_nepp	6:fb11b746ceb5	3802
sepp_nepp	6:fb11b746ceb5	3803	if (x_talk_compensation_enable) {
sepp_nepp	6:fb11b746ceb5	3804
sepp_nepp	6:fb11b746ceb5	3805	if ((signal_rate
sepp_nepp	6:fb11b746ceb5	3806	- ((x_talk_compensation_rate_mega_cps
sepp_nepp	6:fb11b746ceb5	3807	* effective_spad_rtn_count) >> 8))
sepp_nepp	6:fb11b746ceb5	3808	<= 0) {
sepp_nepp	6:fb11b746ceb5	3809	if (range_fractional_enable) {
sepp_nepp	6:fb11b746ceb5	3810	xtalk_range_milli_meter = 8888;
sepp_nepp	6:fb11b746ceb5	3811	} else {
sepp_nepp	6:fb11b746ceb5	3812	xtalk_range_milli_meter = 8888 << 2;
sepp_nepp	6:fb11b746ceb5	3813	}
sepp_nepp	6:fb11b746ceb5	3814	} else {
sepp_nepp	6:fb11b746ceb5	3815	xtalk_range_milli_meter =
sepp_nepp	6:fb11b746ceb5	3816	(tmpuint16 * signal_rate)
sepp_nepp	6:fb11b746ceb5	3817	/ (signal_rate
sepp_nepp	6:fb11b746ceb5	3818	- ((x_talk_compensation_rate_mega_cps
sepp_nepp	6:fb11b746ceb5	3819	* effective_spad_rtn_count)
sepp_nepp	6:fb11b746ceb5	3820	>> 8));
sepp_nepp	6:fb11b746ceb5	3821	}
sepp_nepp	6:fb11b746ceb5	3822
sepp_nepp	6:fb11b746ceb5	3823	tmpuint16 = xtalk_range_milli_meter;
sepp_nepp	6:fb11b746ceb5	3824	}
sepp_nepp	6:fb11b746ceb5	3825
sepp_nepp	6:fb11b746ceb5	3826	}
sepp_nepp	6:fb11b746ceb5	3827
sepp_nepp	6:fb11b746ceb5	3828	if (range_fractional_enable) {
sepp_nepp	6:fb11b746ceb5	3829	p_ranging_measurement_data->RangeMilliMeter =
sepp_nepp	6:fb11b746ceb5	3830	(uint16_t)((tmpuint16) >> 2);
sepp_nepp	6:fb11b746ceb5	3831	p_ranging_measurement_data->RangeFractionalPart =
sepp_nepp	6:fb11b746ceb5	3832	(uint8_t)((tmpuint16 & 0x03) << 6);
sepp_nepp	6:fb11b746ceb5	3833	} else {
sepp_nepp	6:fb11b746ceb5	3834	p_ranging_measurement_data->RangeMilliMeter = tmpuint16;
sepp_nepp	6:fb11b746ceb5	3835	p_ranging_measurement_data->RangeFractionalPart = 0;
sepp_nepp	6:fb11b746ceb5	3836	}
sepp_nepp	6:fb11b746ceb5	3837
sepp_nepp	6:fb11b746ceb5	3838	/*
sepp_nepp	6:fb11b746ceb5	3839	* For a standard definition of RangeStatus, this should
sepp_nepp	6:fb11b746ceb5	3840	* return 0 in case of good result after a ranging
sepp_nepp	6:fb11b746ceb5	3841	* The range status depends on the device so call a device
sepp_nepp	6:fb11b746ceb5	3842	* specific function to obtain the right Status.
sepp_nepp	6:fb11b746ceb5	3843	*/
sepp_nepp	7:3a1115c2556b	3844	status \|= VL53L0X_get_pal_range_status( device_range_status,
sepp_nepp	6:fb11b746ceb5	3845	signal_rate, effective_spad_rtn_count,
sepp_nepp	6:fb11b746ceb5	3846	p_ranging_measurement_data, &pal_range_status);
sepp_nepp	6:fb11b746ceb5	3847
sepp_nepp	6:fb11b746ceb5	3848	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3849	p_ranging_measurement_data->RangeStatus = pal_range_status;}
sepp_nepp	6:fb11b746ceb5	3850
sepp_nepp	6:fb11b746ceb5	3851	}
sepp_nepp	6:fb11b746ceb5	3852
sepp_nepp	6:fb11b746ceb5	3853	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3854	/* Copy last read data into Device buffer */
sepp_nepp	7:3a1115c2556b	3855	last_range_data_buffer = PALDevDataGet( LastRangeMeasure);
sepp_nepp	6:fb11b746ceb5	3856
sepp_nepp	6:fb11b746ceb5	3857	last_range_data_buffer.RangeMilliMeter =
sepp_nepp	6:fb11b746ceb5	3858	p_ranging_measurement_data->RangeMilliMeter;
sepp_nepp	6:fb11b746ceb5	3859	last_range_data_buffer.RangeFractionalPart =
sepp_nepp	6:fb11b746ceb5	3860	p_ranging_measurement_data->RangeFractionalPart;
sepp_nepp	6:fb11b746ceb5	3861	last_range_data_buffer.RangeDMaxMilliMeter =
sepp_nepp	6:fb11b746ceb5	3862	p_ranging_measurement_data->RangeDMaxMilliMeter;
sepp_nepp	6:fb11b746ceb5	3863	last_range_data_buffer.SignalRateRtnMegaCps =
sepp_nepp	6:fb11b746ceb5	3864	p_ranging_measurement_data->SignalRateRtnMegaCps;
sepp_nepp	6:fb11b746ceb5	3865	last_range_data_buffer.AmbientRateRtnMegaCps =
sepp_nepp	6:fb11b746ceb5	3866	p_ranging_measurement_data->AmbientRateRtnMegaCps;
sepp_nepp	6:fb11b746ceb5	3867	last_range_data_buffer.EffectiveSpadRtnCount =
sepp_nepp	6:fb11b746ceb5	3868	p_ranging_measurement_data->EffectiveSpadRtnCount;
sepp_nepp	6:fb11b746ceb5	3869	last_range_data_buffer.RangeStatus =
sepp_nepp	6:fb11b746ceb5	3870	p_ranging_measurement_data->RangeStatus;
sepp_nepp	6:fb11b746ceb5	3871
sepp_nepp	7:3a1115c2556b	3872	PALDevDataSet( LastRangeMeasure, last_range_data_buffer);
sepp_nepp	6:fb11b746ceb5	3873	}
sepp_nepp	6:fb11b746ceb5	3874
sepp_nepp	6:fb11b746ceb5	3875
sepp_nepp	6:fb11b746ceb5	3876	return status;
sepp_nepp	6:fb11b746ceb5	3877	}
sepp_nepp	6:fb11b746ceb5	3878
sepp_nepp	7:3a1115c2556b	3879	VL53L0X_Error VL53L0X::VL53L0X_perform_single_ranging_measurement(
sepp_nepp	6:fb11b746ceb5	3880	VL53L0X_RangingMeasurementData_t *p_ranging_measurement_data)
sepp_nepp	6:fb11b746ceb5	3881	{
sepp_nepp	6:fb11b746ceb5	3882	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3883
sepp_nepp	6:fb11b746ceb5	3884
sepp_nepp	6:fb11b746ceb5	3885
sepp_nepp	6:fb11b746ceb5	3886	/* This function will do a complete single ranging
sepp_nepp	6:fb11b746ceb5	3887	* Here we fix the mode! */
sepp_nepp	7:3a1115c2556b	3888	status = VL53L0X_set_device_mode( VL53L0X_DEVICEMODE_SINGLE_RANGING);
sepp_nepp	6:fb11b746ceb5	3889
sepp_nepp	6:fb11b746ceb5	3890	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3891	status = VL53L0X_perform_single_measurement();
sepp_nepp	6:fb11b746ceb5	3892	}
sepp_nepp	6:fb11b746ceb5	3893
sepp_nepp	6:fb11b746ceb5	3894	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3895	status = VL53L0X_get_ranging_measurement_data(
sepp_nepp	6:fb11b746ceb5	3896	p_ranging_measurement_data);
sepp_nepp	6:fb11b746ceb5	3897	}
sepp_nepp	6:fb11b746ceb5	3898
sepp_nepp	6:fb11b746ceb5	3899	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3900	status = VL53L0X_clear_interrupt_mask( 0);
sepp_nepp	6:fb11b746ceb5	3901	}
sepp_nepp	6:fb11b746ceb5	3902
sepp_nepp	6:fb11b746ceb5	3903
sepp_nepp	6:fb11b746ceb5	3904	return status;
sepp_nepp	6:fb11b746ceb5	3905	}
sepp_nepp	6:fb11b746ceb5	3906
sepp_nepp	7:3a1115c2556b	3907	VL53L0X_Error VL53L0X::perform_ref_signal_measurement(
sepp_nepp	6:fb11b746ceb5	3908	uint16_t *p_ref_signal_rate)
sepp_nepp	6:fb11b746ceb5	3909	{
sepp_nepp	6:fb11b746ceb5	3910	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3911	VL53L0X_RangingMeasurementData_t ranging_measurement_data;
sepp_nepp	6:fb11b746ceb5	3912
sepp_nepp	6:fb11b746ceb5	3913	uint8_t sequence_config = 0;
sepp_nepp	6:fb11b746ceb5	3914
sepp_nepp	6:fb11b746ceb5	3915	/* store the value of the sequence config,
sepp_nepp	6:fb11b746ceb5	3916	* this will be reset before the end of the function
sepp_nepp	6:fb11b746ceb5	3917	*/
sepp_nepp	6:fb11b746ceb5	3918
sepp_nepp	7:3a1115c2556b	3919	sequence_config = PALDevDataGet( SequenceConfig);
sepp_nepp	6:fb11b746ceb5	3920
sepp_nepp	6:fb11b746ceb5	3921	/*
sepp_nepp	6:fb11b746ceb5	3922	* This function performs a reference signal rate measurement.
sepp_nepp	6:fb11b746ceb5	3923	*/
sepp_nepp	6:fb11b746ceb5	3924	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3925	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	3926	VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, 0xC0);
sepp_nepp	6:fb11b746ceb5	3927	}
sepp_nepp	6:fb11b746ceb5	3928
sepp_nepp	6:fb11b746ceb5	3929	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3930	status = VL53L0X_perform_single_ranging_measurement(
sepp_nepp	6:fb11b746ceb5	3931	&ranging_measurement_data);
sepp_nepp	6:fb11b746ceb5	3932	}
sepp_nepp	6:fb11b746ceb5	3933
sepp_nepp	6:fb11b746ceb5	3934	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3935	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	6:fb11b746ceb5	3936	}
sepp_nepp	6:fb11b746ceb5	3937
sepp_nepp	6:fb11b746ceb5	3938	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3939	status = VL53L0X_read_word(
sepp_nepp	6:fb11b746ceb5	3940	VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF,
sepp_nepp	6:fb11b746ceb5	3941	p_ref_signal_rate);
sepp_nepp	6:fb11b746ceb5	3942	}
sepp_nepp	6:fb11b746ceb5	3943
sepp_nepp	6:fb11b746ceb5	3944	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3945	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	3946	}
sepp_nepp	6:fb11b746ceb5	3947
sepp_nepp	6:fb11b746ceb5	3948	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	3949	/* restore the previous Sequence Config */
sepp_nepp	7:3a1115c2556b	3950	status = VL53L0X_write_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,
sepp_nepp	6:fb11b746ceb5	3951	sequence_config);
sepp_nepp	6:fb11b746ceb5	3952	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	3953	PALDevDataSet( SequenceConfig, sequence_config);
sepp_nepp	6:fb11b746ceb5	3954	}
sepp_nepp	6:fb11b746ceb5	3955	}
sepp_nepp	6:fb11b746ceb5	3956
sepp_nepp	6:fb11b746ceb5	3957	return status;
sepp_nepp	6:fb11b746ceb5	3958	}
sepp_nepp	6:fb11b746ceb5	3959
sepp_nepp	7:3a1115c2556b	3960	VL53L0X_Error VL53L0X::wrapped_VL53L0X_perform_ref_spad_management(
sepp_nepp	6:fb11b746ceb5	3961	uint32_t *ref_spad_count,
sepp_nepp	6:fb11b746ceb5	3962	uint8_t *is_aperture_spads)
sepp_nepp	6:fb11b746ceb5	3963	{
sepp_nepp	6:fb11b746ceb5	3964	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	3965	uint8_t last_spad_array[6];
sepp_nepp	6:fb11b746ceb5	3966	uint8_t start_select = 0xB4;
sepp_nepp	6:fb11b746ceb5	3967	uint32_t minimum_spad_count = 3;
sepp_nepp	6:fb11b746ceb5	3968	uint32_t max_spad_count = 44;
sepp_nepp	6:fb11b746ceb5	3969	uint32_t current_spad_index = 0;
sepp_nepp	6:fb11b746ceb5	3970	uint32_t last_spad_index = 0;
sepp_nepp	6:fb11b746ceb5	3971	int32_t next_good_spad = 0;
sepp_nepp	6:fb11b746ceb5	3972	uint16_t target_ref_rate = 0x0A00; /* 20 MCPS in 9:7 format */
sepp_nepp	6:fb11b746ceb5	3973	uint16_t peak_signal_rate_ref;
sepp_nepp	6:fb11b746ceb5	3974	uint32_t need_apt_spads = 0;
sepp_nepp	6:fb11b746ceb5	3975	uint32_t index = 0;
sepp_nepp	6:fb11b746ceb5	3976	uint32_t spad_array_size = 6;
sepp_nepp	6:fb11b746ceb5	3977	uint32_t signal_rate_diff = 0;
sepp_nepp	6:fb11b746ceb5	3978	uint32_t last_signal_rate_diff = 0;
sepp_nepp	6:fb11b746ceb5	3979	uint8_t complete = 0;
sepp_nepp	6:fb11b746ceb5	3980	uint8_t vhv_settings = 0;
sepp_nepp	6:fb11b746ceb5	3981	uint8_t phase_cal = 0;
sepp_nepp	6:fb11b746ceb5	3982	uint32_t ref_spad_count_int = 0;
sepp_nepp	6:fb11b746ceb5	3983	uint8_t is_aperture_spads_int = 0;
sepp_nepp	6:fb11b746ceb5	3984
sepp_nepp	6:fb11b746ceb5	3985	/*
sepp_nepp	6:fb11b746ceb5	3986	* The reference SPAD initialization procedure determines the minimum
sepp_nepp	6:fb11b746ceb5	3987	* amount of reference spads to be enables to achieve a target reference
sepp_nepp	6:fb11b746ceb5	3988	* signal rate and should be performed once during initialization.
sepp_nepp	6:fb11b746ceb5	3989	*
sepp_nepp	6:fb11b746ceb5	3990	* Either aperture or non-aperture spads are applied but never both.
sepp_nepp	6:fb11b746ceb5	3991	* Firstly non-aperture spads are set, begining with 5 spads, and
sepp_nepp	6:fb11b746ceb5	3992	* increased one spad at a time until the closest measurement to the
sepp_nepp	6:fb11b746ceb5	3993	* target rate is achieved.
sepp_nepp	6:fb11b746ceb5	3994	*
sepp_nepp	6:fb11b746ceb5	3995	* If the target rate is exceeded when 5 non-aperture spads are enabled,
sepp_nepp	6:fb11b746ceb5	3996	* initialization is performed instead with aperture spads.
sepp_nepp	6:fb11b746ceb5	3997	*
sepp_nepp	6:fb11b746ceb5	3998	* When setting spads, a 'Good Spad Map' is applied.
sepp_nepp	6:fb11b746ceb5	3999	*
sepp_nepp	6:fb11b746ceb5	4000	* This procedure operates within a SPAD window of interest of a maximum
sepp_nepp	6:fb11b746ceb5	4001	* 44 spads.
sepp_nepp	6:fb11b746ceb5	4002	* The start point is currently fixed to 180, which lies towards the end
sepp_nepp	6:fb11b746ceb5	4003	* of the non-aperture quadrant and runs in to the adjacent aperture
sepp_nepp	6:fb11b746ceb5	4004	* quadrant.
sepp_nepp	6:fb11b746ceb5	4005	*/
sepp_nepp	7:3a1115c2556b	4006	target_ref_rate = PALDevDataGet( targetRefRate);
sepp_nepp	6:fb11b746ceb5	4007
sepp_nepp	6:fb11b746ceb5	4008	/*
sepp_nepp	6:fb11b746ceb5	4009	* Initialize Spad arrays.
sepp_nepp	6:fb11b746ceb5	4010	* Currently the good spad map is initialised to 'All good'.
sepp_nepp	6:fb11b746ceb5	4011	* This is a short term implementation. The good spad map will be
sepp_nepp	6:fb11b746ceb5	4012	* provided as an input.
sepp_nepp	6:fb11b746ceb5	4013	* Note that there are 6 bytes. Only the first 44 bits will be used to
sepp_nepp	6:fb11b746ceb5	4014	* represent spads.
sepp_nepp	6:fb11b746ceb5	4015	*/
sepp_nepp	6:fb11b746ceb5	4016	for (index = 0; index < spad_array_size; index++) {
sepp_nepp	7:3a1115c2556b	4017	Data.SpadData.RefSpadEnables[index] = 0;
sepp_nepp	6:fb11b746ceb5	4018	}
sepp_nepp	6:fb11b746ceb5	4019
sepp_nepp	6:fb11b746ceb5	4020
sepp_nepp	7:3a1115c2556b	4021	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	6:fb11b746ceb5	4022
sepp_nepp	6:fb11b746ceb5	4023	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4024	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	4025	VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET, 0x00);
sepp_nepp	6:fb11b746ceb5	4026	}
sepp_nepp	6:fb11b746ceb5	4027
sepp_nepp	6:fb11b746ceb5	4028	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4029	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	4030	VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD, 0x2C);
sepp_nepp	6:fb11b746ceb5	4031	}
sepp_nepp	6:fb11b746ceb5	4032
sepp_nepp	6:fb11b746ceb5	4033	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4034	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	4035	}
sepp_nepp	6:fb11b746ceb5	4036
sepp_nepp	6:fb11b746ceb5	4037	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4038	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	4039	VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT,
sepp_nepp	6:fb11b746ceb5	4040	start_select);
sepp_nepp	6:fb11b746ceb5	4041	}
sepp_nepp	6:fb11b746ceb5	4042
sepp_nepp	6:fb11b746ceb5	4043	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4044	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	4045	VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE, 0);
sepp_nepp	6:fb11b746ceb5	4046	}
sepp_nepp	6:fb11b746ceb5	4047
sepp_nepp	6:fb11b746ceb5	4048	/* Perform ref calibration */
sepp_nepp	6:fb11b746ceb5	4049	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4050	status = VL53L0X_perform_ref_calibration( &vhv_settings,
sepp_nepp	6:fb11b746ceb5	4051	&phase_cal, 0);
sepp_nepp	6:fb11b746ceb5	4052	}
sepp_nepp	6:fb11b746ceb5	4053
sepp_nepp	6:fb11b746ceb5	4054	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4055	/* Enable Minimum NON-APERTURE Spads */
sepp_nepp	6:fb11b746ceb5	4056	current_spad_index = 0;
sepp_nepp	6:fb11b746ceb5	4057	last_spad_index = current_spad_index;
sepp_nepp	6:fb11b746ceb5	4058	need_apt_spads = 0;
sepp_nepp	7:3a1115c2556b	4059	status = enable_ref_spads(
sepp_nepp	6:fb11b746ceb5	4060	need_apt_spads,
sepp_nepp	7:3a1115c2556b	4061	Data.SpadData.RefGoodSpadMap,
sepp_nepp	7:3a1115c2556b	4062	Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4063	spad_array_size,
sepp_nepp	6:fb11b746ceb5	4064	start_select,
sepp_nepp	6:fb11b746ceb5	4065	current_spad_index,
sepp_nepp	6:fb11b746ceb5	4066	minimum_spad_count,
sepp_nepp	6:fb11b746ceb5	4067	&last_spad_index);
sepp_nepp	6:fb11b746ceb5	4068	}
sepp_nepp	6:fb11b746ceb5	4069
sepp_nepp	6:fb11b746ceb5	4070	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4071	current_spad_index = last_spad_index;
sepp_nepp	6:fb11b746ceb5	4072
sepp_nepp	7:3a1115c2556b	4073	status = perform_ref_signal_measurement(
sepp_nepp	6:fb11b746ceb5	4074	&peak_signal_rate_ref);
sepp_nepp	6:fb11b746ceb5	4075	if ((status == VL53L0X_ERROR_NONE) &&
sepp_nepp	6:fb11b746ceb5	4076	(peak_signal_rate_ref > target_ref_rate)) {
sepp_nepp	6:fb11b746ceb5	4077	/* Signal rate measurement too high,
sepp_nepp	6:fb11b746ceb5	4078	* switch to APERTURE SPADs */
sepp_nepp	6:fb11b746ceb5	4079
sepp_nepp	6:fb11b746ceb5	4080	for (index = 0; index < spad_array_size; index++) {
sepp_nepp	7:3a1115c2556b	4081	Data.SpadData.RefSpadEnables[index] = 0;
sepp_nepp	6:fb11b746ceb5	4082	}
sepp_nepp	6:fb11b746ceb5	4083
sepp_nepp	6:fb11b746ceb5	4084
sepp_nepp	6:fb11b746ceb5	4085	/* Increment to the first APERTURE spad */
sepp_nepp	6:fb11b746ceb5	4086	while ((is_aperture(start_select + current_spad_index)
sepp_nepp	6:fb11b746ceb5	4087	== 0) && (current_spad_index < max_spad_count)) {
sepp_nepp	6:fb11b746ceb5	4088	current_spad_index++;
sepp_nepp	6:fb11b746ceb5	4089	}
sepp_nepp	6:fb11b746ceb5	4090
sepp_nepp	6:fb11b746ceb5	4091	need_apt_spads = 1;
sepp_nepp	6:fb11b746ceb5	4092
sepp_nepp	7:3a1115c2556b	4093	status = enable_ref_spads(need_apt_spads,
sepp_nepp	7:3a1115c2556b	4094	Data.SpadData.RefGoodSpadMap,
sepp_nepp	7:3a1115c2556b	4095	Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4096	spad_array_size,
sepp_nepp	6:fb11b746ceb5	4097	start_select,
sepp_nepp	6:fb11b746ceb5	4098	current_spad_index,
sepp_nepp	6:fb11b746ceb5	4099	minimum_spad_count,
sepp_nepp	6:fb11b746ceb5	4100	&last_spad_index);
sepp_nepp	6:fb11b746ceb5	4101
sepp_nepp	6:fb11b746ceb5	4102	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4103	current_spad_index = last_spad_index;
sepp_nepp	7:3a1115c2556b	4104	status = perform_ref_signal_measurement(
sepp_nepp	6:fb11b746ceb5	4105	&peak_signal_rate_ref);
sepp_nepp	6:fb11b746ceb5	4106
sepp_nepp	6:fb11b746ceb5	4107	if ((status == VL53L0X_ERROR_NONE) &&
sepp_nepp	6:fb11b746ceb5	4108	(peak_signal_rate_ref > target_ref_rate)) {
sepp_nepp	6:fb11b746ceb5	4109	/* Signal rate still too high after
sepp_nepp	6:fb11b746ceb5	4110	* setting the minimum number of
sepp_nepp	6:fb11b746ceb5	4111	* APERTURE spads. Can do no more
sepp_nepp	6:fb11b746ceb5	4112	* therefore set the min number of
sepp_nepp	6:fb11b746ceb5	4113	* aperture spads as the result.
sepp_nepp	6:fb11b746ceb5	4114	*/
sepp_nepp	6:fb11b746ceb5	4115	is_aperture_spads_int = 1;
sepp_nepp	6:fb11b746ceb5	4116	ref_spad_count_int = minimum_spad_count;
sepp_nepp	6:fb11b746ceb5	4117	}
sepp_nepp	6:fb11b746ceb5	4118	}
sepp_nepp	6:fb11b746ceb5	4119	} else {
sepp_nepp	6:fb11b746ceb5	4120	need_apt_spads = 0;
sepp_nepp	6:fb11b746ceb5	4121	}
sepp_nepp	6:fb11b746ceb5	4122	}
sepp_nepp	6:fb11b746ceb5	4123
sepp_nepp	6:fb11b746ceb5	4124	if ((status == VL53L0X_ERROR_NONE) &&
sepp_nepp	6:fb11b746ceb5	4125	(peak_signal_rate_ref < target_ref_rate)) {
sepp_nepp	6:fb11b746ceb5	4126	/* At this point, the minimum number of either aperture
sepp_nepp	6:fb11b746ceb5	4127	* or non-aperture spads have been set. Proceed to add
sepp_nepp	6:fb11b746ceb5	4128	* spads and perform measurements until the target
sepp_nepp	6:fb11b746ceb5	4129	* reference is reached.
sepp_nepp	6:fb11b746ceb5	4130	*/
sepp_nepp	6:fb11b746ceb5	4131	is_aperture_spads_int = need_apt_spads;
sepp_nepp	6:fb11b746ceb5	4132	ref_spad_count_int = minimum_spad_count;
sepp_nepp	6:fb11b746ceb5	4133
sepp_nepp	7:3a1115c2556b	4134	memcpy(last_spad_array, Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4135	spad_array_size);
sepp_nepp	6:fb11b746ceb5	4136	last_signal_rate_diff = abs(peak_signal_rate_ref -
sepp_nepp	6:fb11b746ceb5	4137	target_ref_rate);
sepp_nepp	6:fb11b746ceb5	4138	complete = 0;
sepp_nepp	6:fb11b746ceb5	4139
sepp_nepp	6:fb11b746ceb5	4140	while (!complete) {
sepp_nepp	6:fb11b746ceb5	4141	get_next_good_spad(
sepp_nepp	7:3a1115c2556b	4142	Data.SpadData.RefGoodSpadMap,
sepp_nepp	6:fb11b746ceb5	4143	spad_array_size, current_spad_index,
sepp_nepp	6:fb11b746ceb5	4144	&next_good_spad);
sepp_nepp	6:fb11b746ceb5	4145
sepp_nepp	6:fb11b746ceb5	4146	if (next_good_spad == -1) {
sepp_nepp	6:fb11b746ceb5	4147	status = VL53L0X_ERROR_REF_SPAD_INIT;
sepp_nepp	6:fb11b746ceb5	4148	break;
sepp_nepp	6:fb11b746ceb5	4149	}
sepp_nepp	6:fb11b746ceb5	4150
sepp_nepp	6:fb11b746ceb5	4151	/* Cannot combine Aperture and Non-Aperture spads, so
sepp_nepp	6:fb11b746ceb5	4152	* ensure the current spad is of the correct type.
sepp_nepp	6:fb11b746ceb5	4153	*/
sepp_nepp	6:fb11b746ceb5	4154	if (is_aperture((uint32_t)start_select + next_good_spad) !=
sepp_nepp	6:fb11b746ceb5	4155	need_apt_spads) {
sepp_nepp	6:fb11b746ceb5	4156	/* At this point we have enabled the maximum
sepp_nepp	6:fb11b746ceb5	4157	* number of Aperture spads.
sepp_nepp	6:fb11b746ceb5	4158	*/
sepp_nepp	6:fb11b746ceb5	4159	complete = 1;
sepp_nepp	6:fb11b746ceb5	4160	break;
sepp_nepp	6:fb11b746ceb5	4161	}
sepp_nepp	6:fb11b746ceb5	4162
sepp_nepp	6:fb11b746ceb5	4163	(ref_spad_count_int)++;
sepp_nepp	6:fb11b746ceb5	4164
sepp_nepp	6:fb11b746ceb5	4165	current_spad_index = next_good_spad;
sepp_nepp	7:3a1115c2556b	4166	status = enable_spad_bit(Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4167	spad_array_size, current_spad_index);
sepp_nepp	6:fb11b746ceb5	4168
sepp_nepp	6:fb11b746ceb5	4169	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4170	current_spad_index++;
sepp_nepp	6:fb11b746ceb5	4171	/* Proceed to apply the additional spad and
sepp_nepp	6:fb11b746ceb5	4172	* perform measurement. */
sepp_nepp	7:3a1115c2556b	4173	status = set_ref_spad_map(Data.SpadData.RefSpadEnables);
sepp_nepp	6:fb11b746ceb5	4174	}
sepp_nepp	6:fb11b746ceb5	4175
sepp_nepp	6:fb11b746ceb5	4176	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4177	break;
sepp_nepp	6:fb11b746ceb5	4178	}
sepp_nepp	6:fb11b746ceb5	4179
sepp_nepp	7:3a1115c2556b	4180	status = perform_ref_signal_measurement(&peak_signal_rate_ref);
sepp_nepp	6:fb11b746ceb5	4181
sepp_nepp	6:fb11b746ceb5	4182	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4183	break;
sepp_nepp	6:fb11b746ceb5	4184	}
sepp_nepp	6:fb11b746ceb5	4185
sepp_nepp	6:fb11b746ceb5	4186	signal_rate_diff = abs(peak_signal_rate_ref - target_ref_rate);
sepp_nepp	6:fb11b746ceb5	4187
sepp_nepp	6:fb11b746ceb5	4188	if (peak_signal_rate_ref > target_ref_rate) {
sepp_nepp	6:fb11b746ceb5	4189	/* Select the spad map that provides the
sepp_nepp	6:fb11b746ceb5	4190	* measurement closest to the target rate,
sepp_nepp	6:fb11b746ceb5	4191	* either above or below it.
sepp_nepp	6:fb11b746ceb5	4192	*/
sepp_nepp	6:fb11b746ceb5	4193	if (signal_rate_diff > last_signal_rate_diff) {
sepp_nepp	6:fb11b746ceb5	4194	/* Previous spad map produced a closer
sepp_nepp	6:fb11b746ceb5	4195	* measurement, so choose this. */
sepp_nepp	7:3a1115c2556b	4196	status = set_ref_spad_map(last_spad_array);
sepp_nepp	7:3a1115c2556b	4197	memcpy(Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4198	last_spad_array, spad_array_size);
sepp_nepp	6:fb11b746ceb5	4199	(ref_spad_count_int)--;
sepp_nepp	6:fb11b746ceb5	4200	}
sepp_nepp	6:fb11b746ceb5	4201	complete = 1;
sepp_nepp	6:fb11b746ceb5	4202	} else {
sepp_nepp	6:fb11b746ceb5	4203	/* Continue to add spads */
sepp_nepp	6:fb11b746ceb5	4204	last_signal_rate_diff = signal_rate_diff;
sepp_nepp	6:fb11b746ceb5	4205	memcpy(last_spad_array,
sepp_nepp	7:3a1115c2556b	4206	Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4207	spad_array_size);
sepp_nepp	6:fb11b746ceb5	4208	}
sepp_nepp	6:fb11b746ceb5	4209
sepp_nepp	6:fb11b746ceb5	4210	} /* while */
sepp_nepp	6:fb11b746ceb5	4211	}
sepp_nepp	6:fb11b746ceb5	4212
sepp_nepp	6:fb11b746ceb5	4213	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4214	*ref_spad_count = ref_spad_count_int;
sepp_nepp	6:fb11b746ceb5	4215	*is_aperture_spads = is_aperture_spads_int;
sepp_nepp	6:fb11b746ceb5	4216
sepp_nepp	7:3a1115c2556b	4217	VL53L0X_SETDEVICESPECIFICPARAMETER(RefSpadsInitialised, 1);
sepp_nepp	7:3a1115c2556b	4218	VL53L0X_SETDEVICESPECIFICPARAMETER(ReferenceSpadCount, (uint8_t)(*ref_spad_count));
sepp_nepp	7:3a1115c2556b	4219	VL53L0X_SETDEVICESPECIFICPARAMETER(ReferenceSpadType, *is_aperture_spads);
sepp_nepp	6:fb11b746ceb5	4220	}
sepp_nepp	6:fb11b746ceb5	4221
sepp_nepp	6:fb11b746ceb5	4222	return status;
sepp_nepp	6:fb11b746ceb5	4223	}
sepp_nepp	6:fb11b746ceb5	4224
sepp_nepp	7:3a1115c2556b	4225	VL53L0X_Error VL53L0X::VL53L0X_set_reference_spads(
sepp_nepp	6:fb11b746ceb5	4226	uint32_t count, uint8_t is_aperture_spads)
sepp_nepp	6:fb11b746ceb5	4227	{
sepp_nepp	6:fb11b746ceb5	4228	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4229	uint32_t current_spad_index = 0;
sepp_nepp	6:fb11b746ceb5	4230	uint8_t start_select = 0xB4;
sepp_nepp	6:fb11b746ceb5	4231	uint32_t spad_array_size = 6;
sepp_nepp	6:fb11b746ceb5	4232	uint32_t max_spad_count = 44;
sepp_nepp	6:fb11b746ceb5	4233	uint32_t last_spad_index;
sepp_nepp	6:fb11b746ceb5	4234	uint32_t index;
sepp_nepp	6:fb11b746ceb5	4235
sepp_nepp	6:fb11b746ceb5	4236	/*
sepp_nepp	6:fb11b746ceb5	4237	* This function applies a requested number of reference spads, either
sepp_nepp	6:fb11b746ceb5	4238	* aperture or
sepp_nepp	6:fb11b746ceb5	4239	* non-aperture, as requested.
sepp_nepp	6:fb11b746ceb5	4240	* The good spad map will be applied.
sepp_nepp	6:fb11b746ceb5	4241	*/
sepp_nepp	6:fb11b746ceb5	4242
sepp_nepp	7:3a1115c2556b	4243	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	6:fb11b746ceb5	4244
sepp_nepp	6:fb11b746ceb5	4245	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4246	status = VL53L0X_write_byte(
sepp_nepp	6:fb11b746ceb5	4247	VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET, 0x00);
sepp_nepp	6:fb11b746ceb5	4248	}
sepp_nepp	6:fb11b746ceb5	4249
sepp_nepp	6:fb11b746ceb5	4250	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4251	status = VL53L0X_write_byte( VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD, 0x2C);
sepp_nepp	6:fb11b746ceb5	4252	}
sepp_nepp	6:fb11b746ceb5	4253
sepp_nepp	6:fb11b746ceb5	4254	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4255	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	4256	}
sepp_nepp	6:fb11b746ceb5	4257
sepp_nepp	6:fb11b746ceb5	4258	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4259	status = VL53L0X_write_byte(VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT,
sepp_nepp	6:fb11b746ceb5	4260	start_select);
sepp_nepp	6:fb11b746ceb5	4261	}
sepp_nepp	6:fb11b746ceb5	4262
sepp_nepp	6:fb11b746ceb5	4263	for (index = 0; index < spad_array_size; index++) {
sepp_nepp	7:3a1115c2556b	4264	Data.SpadData.RefSpadEnables[index] = 0;
sepp_nepp	6:fb11b746ceb5	4265	}
sepp_nepp	6:fb11b746ceb5	4266
sepp_nepp	6:fb11b746ceb5	4267	if (is_aperture_spads) {
sepp_nepp	6:fb11b746ceb5	4268	/* Increment to the first APERTURE spad */
sepp_nepp	6:fb11b746ceb5	4269	while ((is_aperture(start_select + current_spad_index) == 0) &&
sepp_nepp	6:fb11b746ceb5	4270	(current_spad_index < max_spad_count)) {
sepp_nepp	6:fb11b746ceb5	4271	current_spad_index++;
sepp_nepp	6:fb11b746ceb5	4272	}
sepp_nepp	6:fb11b746ceb5	4273	}
sepp_nepp	7:3a1115c2556b	4274	status = enable_ref_spads(is_aperture_spads,
sepp_nepp	7:3a1115c2556b	4275	Data.SpadData.RefGoodSpadMap,
sepp_nepp	7:3a1115c2556b	4276	Data.SpadData.RefSpadEnables,
sepp_nepp	6:fb11b746ceb5	4277	spad_array_size,
sepp_nepp	6:fb11b746ceb5	4278	start_select,
sepp_nepp	6:fb11b746ceb5	4279	current_spad_index,
sepp_nepp	6:fb11b746ceb5	4280	count,
sepp_nepp	6:fb11b746ceb5	4281	&last_spad_index);
sepp_nepp	6:fb11b746ceb5	4282
sepp_nepp	6:fb11b746ceb5	4283	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4284	VL53L0X_SETDEVICESPECIFICPARAMETER(RefSpadsInitialised, 1);
sepp_nepp	7:3a1115c2556b	4285	VL53L0X_SETDEVICESPECIFICPARAMETER(ReferenceSpadCount, (uint8_t)(count));
sepp_nepp	7:3a1115c2556b	4286	VL53L0X_SETDEVICESPECIFICPARAMETER(ReferenceSpadType, is_aperture_spads);
sepp_nepp	6:fb11b746ceb5	4287	}
sepp_nepp	6:fb11b746ceb5	4288
sepp_nepp	6:fb11b746ceb5	4289	return status;
sepp_nepp	6:fb11b746ceb5	4290	}
sepp_nepp	6:fb11b746ceb5	4291
sepp_nepp	7:3a1115c2556b	4292	VL53L0X_Error VL53L0X::VL53L0X_perform_ref_calibration( uint8_t *p_vhv_settings,
sepp_nepp	6:fb11b746ceb5	4293	uint8_t *p_phase_cal)
sepp_nepp	6:fb11b746ceb5	4294	{
sepp_nepp	6:fb11b746ceb5	4295	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4296
sepp_nepp	7:3a1115c2556b	4297	status = VL53L0X_perform_ref_calibration( p_vhv_settings, p_phase_cal, 1);
sepp_nepp	6:fb11b746ceb5	4298
sepp_nepp	6:fb11b746ceb5	4299	return status;
sepp_nepp	6:fb11b746ceb5	4300	}
sepp_nepp	6:fb11b746ceb5	4301
sepp_nepp	7:3a1115c2556b	4302	VL53L0X_Error VL53L0X::VL53L0X_perform_ref_spad_management(
sepp_nepp	6:fb11b746ceb5	4303	uint32_t ref_spad_count, uint8_t is_aperture_spads)
sepp_nepp	6:fb11b746ceb5	4304	{
sepp_nepp	6:fb11b746ceb5	4305	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4306
sepp_nepp	7:3a1115c2556b	4307	status = wrapped_VL53L0X_perform_ref_spad_management( ref_spad_count,
sepp_nepp	6:fb11b746ceb5	4308	is_aperture_spads);
sepp_nepp	6:fb11b746ceb5	4309
sepp_nepp	6:fb11b746ceb5	4310	return status;
sepp_nepp	6:fb11b746ceb5	4311	}
sepp_nepp	6:fb11b746ceb5	4312
sepp_nepp	6:fb11b746ceb5	4313	/* Group PAL Init Functions */
sepp_nepp	7:3a1115c2556b	4314	VL53L0X_Error VL53L0X::VL53L0X_set_device_address( uint8_t device_address)
sepp_nepp	7:3a1115c2556b	4315	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4316
sepp_nepp	7:3a1115c2556b	4317	status = VL53L0X_write_byte( VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS,
sepp_nepp	6:fb11b746ceb5	4318	device_address / 2);
sepp_nepp	6:fb11b746ceb5	4319	return status;
sepp_nepp	6:fb11b746ceb5	4320	}
sepp_nepp	6:fb11b746ceb5	4321
sepp_nepp	7:3a1115c2556b	4322	VL53L0X_Error VL53L0X::VL53L0X_set_gpio_config( uint8_t pin,
sepp_nepp	6:fb11b746ceb5	4323	VL53L0X_DeviceModes device_mode, VL53L0X_GpioFunctionality functionality,
sepp_nepp	6:fb11b746ceb5	4324	VL53L0X_InterruptPolarity polarity)
sepp_nepp	7:3a1115c2556b	4325	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4326	uint8_t data;
sepp_nepp	6:fb11b746ceb5	4327
sepp_nepp	6:fb11b746ceb5	4328	if (pin != 0) {
sepp_nepp	6:fb11b746ceb5	4329	status = VL53L0X_ERROR_GPIO_NOT_EXISTING;
sepp_nepp	6:fb11b746ceb5	4330	} else if (device_mode == VL53L0X_DEVICEMODE_GPIO_DRIVE) {
sepp_nepp	6:fb11b746ceb5	4331	if (polarity == VL53L0X_INTERRUPTPOLARITY_LOW) {
sepp_nepp	6:fb11b746ceb5	4332	data = 0x10;
sepp_nepp	7:3a1115c2556b	4333	} else {data = 1;}
sepp_nepp	7:3a1115c2556b	4334
sepp_nepp	7:3a1115c2556b	4335	status = VL53L0X_write_byte(VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH, data);
sepp_nepp	6:fb11b746ceb5	4336
sepp_nepp	6:fb11b746ceb5	4337	} else {
sepp_nepp	6:fb11b746ceb5	4338	if (device_mode == VL53L0X_DEVICEMODE_GPIO_OSC) {
sepp_nepp	6:fb11b746ceb5	4339
sepp_nepp	7:3a1115c2556b	4340	status \|= VL53L0X_write_byte( 0xff, 0x01);
sepp_nepp	7:3a1115c2556b	4341	status \|= VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	4342	status \|= VL53L0X_write_byte( 0xff, 0x00);
sepp_nepp	7:3a1115c2556b	4343	status \|= VL53L0X_write_byte( 0x80, 0x01);
sepp_nepp	7:3a1115c2556b	4344	status \|= VL53L0X_write_byte( 0x85, 0x02);
sepp_nepp	7:3a1115c2556b	4345	status \|= VL53L0X_write_byte( 0xff, 0x04);
sepp_nepp	7:3a1115c2556b	4346	status \|= VL53L0X_write_byte( 0xcd, 0x00);
sepp_nepp	7:3a1115c2556b	4347	status \|= VL53L0X_write_byte( 0xcc, 0x11);
sepp_nepp	7:3a1115c2556b	4348	status \|= VL53L0X_write_byte( 0xff, 0x07);
sepp_nepp	7:3a1115c2556b	4349	status \|= VL53L0X_write_byte( 0xbe, 0x00);
sepp_nepp	7:3a1115c2556b	4350	status \|= VL53L0X_write_byte( 0xff, 0x06);
sepp_nepp	7:3a1115c2556b	4351	status \|= VL53L0X_write_byte( 0xcc, 0x09);
sepp_nepp	7:3a1115c2556b	4352	status \|= VL53L0X_write_byte( 0xff, 0x00);
sepp_nepp	7:3a1115c2556b	4353	status \|= VL53L0X_write_byte( 0xff, 0x01);
sepp_nepp	7:3a1115c2556b	4354	status \|= VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	6:fb11b746ceb5	4355
sepp_nepp	6:fb11b746ceb5	4356	} else {
sepp_nepp	6:fb11b746ceb5	4357
sepp_nepp	6:fb11b746ceb5	4358	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4359	switch (functionality) {
sepp_nepp	6:fb11b746ceb5	4360	case VL53L0X_GPIOFUNCTIONALITY_OFF:
sepp_nepp	6:fb11b746ceb5	4361	data = 0x00;
sepp_nepp	6:fb11b746ceb5	4362	break;
sepp_nepp	6:fb11b746ceb5	4363	case VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW:
sepp_nepp	6:fb11b746ceb5	4364	data = 0x01;
sepp_nepp	6:fb11b746ceb5	4365	break;
sepp_nepp	6:fb11b746ceb5	4366	case VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH:
sepp_nepp	6:fb11b746ceb5	4367	data = 0x02;
sepp_nepp	6:fb11b746ceb5	4368	break;
sepp_nepp	6:fb11b746ceb5	4369	case VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT:
sepp_nepp	6:fb11b746ceb5	4370	data = 0x03;
sepp_nepp	6:fb11b746ceb5	4371	break;
sepp_nepp	6:fb11b746ceb5	4372	case VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY:
sepp_nepp	6:fb11b746ceb5	4373	data = 0x04;
sepp_nepp	6:fb11b746ceb5	4374	break;
sepp_nepp	6:fb11b746ceb5	4375	default:
sepp_nepp	6:fb11b746ceb5	4376	status =
sepp_nepp	6:fb11b746ceb5	4377	VL53L0X_ERROR_GPIO_FUNCTIONALITY_NOT_SUPPORTED;
sepp_nepp	6:fb11b746ceb5	4378	}
sepp_nepp	6:fb11b746ceb5	4379	}
sepp_nepp	6:fb11b746ceb5	4380
sepp_nepp	6:fb11b746ceb5	4381	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4382	status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO, data);
sepp_nepp	6:fb11b746ceb5	4383	}
sepp_nepp	6:fb11b746ceb5	4384
sepp_nepp	6:fb11b746ceb5	4385	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4386	if (polarity == VL53L0X_INTERRUPTPOLARITY_LOW) {
sepp_nepp	6:fb11b746ceb5	4387	data = 0;
sepp_nepp	7:3a1115c2556b	4388	} else { data = (uint8_t)(1 << 4); }
sepp_nepp	7:3a1115c2556b	4389	status = VL53L0X_update_byte(VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH, 0xEF, data);
sepp_nepp	6:fb11b746ceb5	4390	}
sepp_nepp	6:fb11b746ceb5	4391
sepp_nepp	6:fb11b746ceb5	4392	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4393	VL53L0X_SETDEVICESPECIFICPARAMETER(Pin0GpioFunctionality, functionality); }
sepp_nepp	7:3a1115c2556b	4394
sepp_nepp	7:3a1115c2556b	4395	if (status == VL53L0X_ERROR_NONE) { status = VL53L0X_clear_interrupt_mask( 0); }
sepp_nepp	6:fb11b746ceb5	4396	}
sepp_nepp	6:fb11b746ceb5	4397	}
sepp_nepp	6:fb11b746ceb5	4398
sepp_nepp	6:fb11b746ceb5	4399	return status;
sepp_nepp	6:fb11b746ceb5	4400	}
sepp_nepp	6:fb11b746ceb5	4401
sepp_nepp	7:3a1115c2556b	4402	VL53L0X_Error VL53L0X::VL53L0X_get_fraction_enable( uint8_t *p_enabled)
sepp_nepp	6:fb11b746ceb5	4403	{
sepp_nepp	6:fb11b746ceb5	4404	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4405
sepp_nepp	7:3a1115c2556b	4406	status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_RANGE_CONFIG, p_enabled);
sepp_nepp	7:3a1115c2556b	4407
sepp_nepp	7:3a1115c2556b	4408	if (status == VL53L0X_ERROR_NONE) { p_enabled = (p_enabled & 1); }
sepp_nepp	6:fb11b746ceb5	4409
sepp_nepp	6:fb11b746ceb5	4410	return status;
sepp_nepp	6:fb11b746ceb5	4411	}
sepp_nepp	6:fb11b746ceb5	4412
sepp_nepp	6:fb11b746ceb5	4413	uint16_t VL53L0X::VL53L0X_encode_timeout(uint32_t timeout_macro_clks)
sepp_nepp	7:3a1115c2556b	4414	{ /!Encode timeout in macro periods in (LSByte 2^MSByte) + 1 format*/
sepp_nepp	6:fb11b746ceb5	4415
sepp_nepp	6:fb11b746ceb5	4416	uint16_t encoded_timeout = 0;
sepp_nepp	6:fb11b746ceb5	4417	uint32_t ls_byte = 0;
sepp_nepp	6:fb11b746ceb5	4418	uint16_t ms_byte = 0;
sepp_nepp	6:fb11b746ceb5	4419
sepp_nepp	6:fb11b746ceb5	4420	if (timeout_macro_clks > 0) {
sepp_nepp	6:fb11b746ceb5	4421	ls_byte = timeout_macro_clks - 1;
sepp_nepp	6:fb11b746ceb5	4422
sepp_nepp	6:fb11b746ceb5	4423	while ((ls_byte & 0xFFFFFF00) > 0) {
sepp_nepp	6:fb11b746ceb5	4424	ls_byte = ls_byte >> 1;
sepp_nepp	6:fb11b746ceb5	4425	ms_byte++;
sepp_nepp	6:fb11b746ceb5	4426	}
sepp_nepp	7:3a1115c2556b	4427	encoded_timeout = (ms_byte << 8) + (uint16_t)(ls_byte & 0x000000FF);
sepp_nepp	6:fb11b746ceb5	4428	}
sepp_nepp	6:fb11b746ceb5	4429
sepp_nepp	6:fb11b746ceb5	4430	return encoded_timeout;
sepp_nepp	6:fb11b746ceb5	4431	}
sepp_nepp	6:fb11b746ceb5	4432
sepp_nepp	7:3a1115c2556b	4433	VL53L0X_Error VL53L0X::set_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	4434	VL53L0X_SequenceStepId sequence_step_id,
sepp_nepp	6:fb11b746ceb5	4435	uint32_t timeout_micro_secs)
sepp_nepp	6:fb11b746ceb5	4436	{
sepp_nepp	6:fb11b746ceb5	4437	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4438	uint8_t current_vcsel_pulse_period_p_clk;
sepp_nepp	6:fb11b746ceb5	4439	uint8_t msrc_encoded_time_out;
sepp_nepp	6:fb11b746ceb5	4440	uint16_t pre_range_encoded_time_out;
sepp_nepp	6:fb11b746ceb5	4441	uint16_t pre_range_time_out_m_clks;
sepp_nepp	6:fb11b746ceb5	4442	uint16_t msrc_range_time_out_m_clks;
sepp_nepp	6:fb11b746ceb5	4443	uint32_t final_range_time_out_m_clks;
sepp_nepp	6:fb11b746ceb5	4444	uint16_t final_range_encoded_time_out;
sepp_nepp	6:fb11b746ceb5	4445	VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps;
sepp_nepp	6:fb11b746ceb5	4446
sepp_nepp	6:fb11b746ceb5	4447	if ((sequence_step_id == VL53L0X_SEQUENCESTEP_TCC) \|\|
sepp_nepp	6:fb11b746ceb5	4448	(sequence_step_id == VL53L0X_SEQUENCESTEP_DSS) \|\|
sepp_nepp	6:fb11b746ceb5	4449	(sequence_step_id == VL53L0X_SEQUENCESTEP_MSRC)) {
sepp_nepp	6:fb11b746ceb5	4450
sepp_nepp	7:3a1115c2556b	4451	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	4452	VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	4453	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4454
sepp_nepp	6:fb11b746ceb5	4455	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4456	msrc_range_time_out_m_clks = VL53L0X_calc_timeout_mclks(
sepp_nepp	6:fb11b746ceb5	4457	timeout_micro_secs,
sepp_nepp	6:fb11b746ceb5	4458	(uint8_t)current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4459
sepp_nepp	6:fb11b746ceb5	4460	if (msrc_range_time_out_m_clks > 256) {
sepp_nepp	6:fb11b746ceb5	4461	msrc_encoded_time_out = 255;
sepp_nepp	6:fb11b746ceb5	4462	} else {
sepp_nepp	6:fb11b746ceb5	4463	msrc_encoded_time_out =
sepp_nepp	6:fb11b746ceb5	4464	(uint8_t)msrc_range_time_out_m_clks - 1;
sepp_nepp	6:fb11b746ceb5	4465	}
sepp_nepp	7:3a1115c2556b	4466	VL53L0X_SETDEVICESPECIFICPARAMETER(LastEncodedTimeout,msrc_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4467	}
sepp_nepp	6:fb11b746ceb5	4468
sepp_nepp	6:fb11b746ceb5	4469	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4470	status = VL53L0X_write_byte(VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP,
sepp_nepp	6:fb11b746ceb5	4471	msrc_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4472	}
sepp_nepp	6:fb11b746ceb5	4473	} else {
sepp_nepp	6:fb11b746ceb5	4474
sepp_nepp	6:fb11b746ceb5	4475	if (sequence_step_id == VL53L0X_SEQUENCESTEP_PRE_RANGE) {
sepp_nepp	6:fb11b746ceb5	4476
sepp_nepp	6:fb11b746ceb5	4477	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4478	status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	4479	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4480	pre_range_time_out_m_clks =
sepp_nepp	7:3a1115c2556b	4481	VL53L0X_calc_timeout_mclks(timeout_micro_secs,
sepp_nepp	6:fb11b746ceb5	4482	(uint8_t)current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4483	pre_range_encoded_time_out = VL53L0X_encode_timeout(
sepp_nepp	6:fb11b746ceb5	4484	pre_range_time_out_m_clks);
sepp_nepp	6:fb11b746ceb5	4485
sepp_nepp	7:3a1115c2556b	4486	VL53L0X_SETDEVICESPECIFICPARAMETER(LastEncodedTimeout,pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4487	}
sepp_nepp	6:fb11b746ceb5	4488
sepp_nepp	6:fb11b746ceb5	4489	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4490	status = VL53L0X_write_word(VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI,
sepp_nepp	6:fb11b746ceb5	4491	pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4492	}
sepp_nepp	6:fb11b746ceb5	4493
sepp_nepp	6:fb11b746ceb5	4494	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4495	VL53L0X_SETDEVICESPECIFICPARAMETER(PreRangeTimeoutMicroSecs,timeout_micro_secs);
sepp_nepp	6:fb11b746ceb5	4496	}
sepp_nepp	6:fb11b746ceb5	4497	} else if (sequence_step_id == VL53L0X_SEQUENCESTEP_FINAL_RANGE) {
sepp_nepp	6:fb11b746ceb5	4498
sepp_nepp	6:fb11b746ceb5	4499	/* For the final range timeout, the pre-range timeout
sepp_nepp	6:fb11b746ceb5	4500	* must be added. To do this both final and pre-range
sepp_nepp	6:fb11b746ceb5	4501	* timeouts must be expressed in macro periods MClks
sepp_nepp	6:fb11b746ceb5	4502	* because they have different vcsel periods.
sepp_nepp	6:fb11b746ceb5	4503	*/
sepp_nepp	6:fb11b746ceb5	4504
sepp_nepp	7:3a1115c2556b	4505	VL53L0X_get_sequence_step_enables(&scheduler_sequence_steps);
sepp_nepp	6:fb11b746ceb5	4506	pre_range_time_out_m_clks = 0;
sepp_nepp	6:fb11b746ceb5	4507	if (scheduler_sequence_steps.PreRangeOn) {
sepp_nepp	6:fb11b746ceb5	4508
sepp_nepp	6:fb11b746ceb5	4509	/* Retrieve PRE-RANGE VCSEL Period */
sepp_nepp	7:3a1115c2556b	4510	status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	4511	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4512
sepp_nepp	6:fb11b746ceb5	4513	/* Retrieve PRE-RANGE Timeout in Macro periods
sepp_nepp	6:fb11b746ceb5	4514	* (MCLKS) */
sepp_nepp	6:fb11b746ceb5	4515	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4516	status = VL53L0X_read_word( 0x51, &pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4517	pre_range_time_out_m_clks =
sepp_nepp	7:3a1115c2556b	4518	VL53L0X_decode_timeout( pre_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4519	}
sepp_nepp	6:fb11b746ceb5	4520	}
sepp_nepp	6:fb11b746ceb5	4521
sepp_nepp	6:fb11b746ceb5	4522	/* Calculate FINAL RANGE Timeout in Macro Periods
sepp_nepp	6:fb11b746ceb5	4523	* (MCLKS) and add PRE-RANGE value
sepp_nepp	6:fb11b746ceb5	4524	*/
sepp_nepp	6:fb11b746ceb5	4525	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4526	status = VL53L0X_get_vcsel_pulse_period( VL53L0X_VCSEL_PERIOD_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	4527	&current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4528	}
sepp_nepp	6:fb11b746ceb5	4529	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4530	final_range_time_out_m_clks =
sepp_nepp	7:3a1115c2556b	4531	VL53L0X_calc_timeout_mclks( timeout_micro_secs,
sepp_nepp	6:fb11b746ceb5	4532	(uint8_t) current_vcsel_pulse_period_p_clk);
sepp_nepp	6:fb11b746ceb5	4533
sepp_nepp	6:fb11b746ceb5	4534	final_range_time_out_m_clks += pre_range_time_out_m_clks;
sepp_nepp	6:fb11b746ceb5	4535
sepp_nepp	6:fb11b746ceb5	4536	final_range_encoded_time_out =
sepp_nepp	6:fb11b746ceb5	4537	VL53L0X_encode_timeout(final_range_time_out_m_clks);
sepp_nepp	6:fb11b746ceb5	4538
sepp_nepp	6:fb11b746ceb5	4539	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4540	status = VL53L0X_write_word( 0x71, final_range_encoded_time_out);
sepp_nepp	6:fb11b746ceb5	4541	}
sepp_nepp	6:fb11b746ceb5	4542
sepp_nepp	6:fb11b746ceb5	4543	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4544	VL53L0X_SETDEVICESPECIFICPARAMETER(FinalRangeTimeoutMicroSecs,timeout_micro_secs);
sepp_nepp	6:fb11b746ceb5	4545	}
sepp_nepp	6:fb11b746ceb5	4546	}
sepp_nepp	6:fb11b746ceb5	4547	} else {
sepp_nepp	6:fb11b746ceb5	4548	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4549	}
sepp_nepp	6:fb11b746ceb5	4550
sepp_nepp	6:fb11b746ceb5	4551	}
sepp_nepp	6:fb11b746ceb5	4552	return status;
sepp_nepp	6:fb11b746ceb5	4553	}
sepp_nepp	6:fb11b746ceb5	4554
sepp_nepp	7:3a1115c2556b	4555	VL53L0X_Error VL53L0X::wrapped_VL53L0X_set_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	4556	uint32_t measurement_timing_budget_micro_seconds)
sepp_nepp	6:fb11b746ceb5	4557	{
sepp_nepp	6:fb11b746ceb5	4558	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4559	uint32_t final_range_timing_budget_micro_seconds;
sepp_nepp	6:fb11b746ceb5	4560	VL53L0X_SchedulerSequenceSteps_t scheduler_sequence_steps;
sepp_nepp	6:fb11b746ceb5	4561	uint32_t msrc_dcc_tcc_timeout_micro_seconds = 2000;
sepp_nepp	6:fb11b746ceb5	4562	uint32_t start_overhead_micro_seconds = 1910;
sepp_nepp	6:fb11b746ceb5	4563	uint32_t end_overhead_micro_seconds = 960;
sepp_nepp	6:fb11b746ceb5	4564	uint32_t msrc_overhead_micro_seconds = 660;
sepp_nepp	6:fb11b746ceb5	4565	uint32_t tcc_overhead_micro_seconds = 590;
sepp_nepp	6:fb11b746ceb5	4566	uint32_t dss_overhead_micro_seconds = 690;
sepp_nepp	6:fb11b746ceb5	4567	uint32_t pre_range_overhead_micro_seconds = 660;
sepp_nepp	6:fb11b746ceb5	4568	uint32_t final_range_overhead_micro_seconds = 550;
sepp_nepp	6:fb11b746ceb5	4569	uint32_t pre_range_timeout_micro_seconds = 0;
sepp_nepp	6:fb11b746ceb5	4570	uint32_t c_min_timing_budget_micro_seconds = 20000;
sepp_nepp	6:fb11b746ceb5	4571	uint32_t sub_timeout = 0;
sepp_nepp	6:fb11b746ceb5	4572
sepp_nepp	7:3a1115c2556b	4573	if (measurement_timing_budget_micro_seconds < c_min_timing_budget_micro_seconds)
sepp_nepp	7:3a1115c2556b	4574	{ status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	7:3a1115c2556b	4575	return status;
sepp_nepp	7:3a1115c2556b	4576	}
sepp_nepp	6:fb11b746ceb5	4577
sepp_nepp	6:fb11b746ceb5	4578	final_range_timing_budget_micro_seconds =
sepp_nepp	6:fb11b746ceb5	4579	measurement_timing_budget_micro_seconds -
sepp_nepp	6:fb11b746ceb5	4580	(start_overhead_micro_seconds + end_overhead_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4581
sepp_nepp	7:3a1115c2556b	4582	status = VL53L0X_get_sequence_step_enables( &scheduler_sequence_steps);
sepp_nepp	6:fb11b746ceb5	4583
sepp_nepp	6:fb11b746ceb5	4584	if (status == VL53L0X_ERROR_NONE &&
sepp_nepp	6:fb11b746ceb5	4585	(scheduler_sequence_steps.TccOn \|\|
sepp_nepp	6:fb11b746ceb5	4586	scheduler_sequence_steps.MsrcOn \|\|
sepp_nepp	6:fb11b746ceb5	4587	scheduler_sequence_steps.DssOn)) {
sepp_nepp	6:fb11b746ceb5	4588
sepp_nepp	6:fb11b746ceb5	4589	/* TCC, MSRC and DSS all share the same timeout */
sepp_nepp	7:3a1115c2556b	4590	status = get_sequence_step_timeout( VL53L0X_SEQUENCESTEP_MSRC,
sepp_nepp	6:fb11b746ceb5	4591	&msrc_dcc_tcc_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4592
sepp_nepp	6:fb11b746ceb5	4593	/* Subtract the TCC, MSRC and DSS timeouts if they are
sepp_nepp	6:fb11b746ceb5	4594	* enabled. */
sepp_nepp	6:fb11b746ceb5	4595
sepp_nepp	6:fb11b746ceb5	4596	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4597	return status;
sepp_nepp	6:fb11b746ceb5	4598	}
sepp_nepp	6:fb11b746ceb5	4599
sepp_nepp	6:fb11b746ceb5	4600	/* TCC */
sepp_nepp	6:fb11b746ceb5	4601	if (scheduler_sequence_steps.TccOn) {
sepp_nepp	6:fb11b746ceb5	4602
sepp_nepp	6:fb11b746ceb5	4603	sub_timeout = msrc_dcc_tcc_timeout_micro_seconds
sepp_nepp	6:fb11b746ceb5	4604	+ tcc_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	4605
sepp_nepp	6:fb11b746ceb5	4606	if (sub_timeout <
sepp_nepp	6:fb11b746ceb5	4607	final_range_timing_budget_micro_seconds) {
sepp_nepp	6:fb11b746ceb5	4608	final_range_timing_budget_micro_seconds -=
sepp_nepp	6:fb11b746ceb5	4609	sub_timeout;
sepp_nepp	6:fb11b746ceb5	4610	} else {
sepp_nepp	6:fb11b746ceb5	4611	/* Requested timeout too big. */
sepp_nepp	6:fb11b746ceb5	4612	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4613	}
sepp_nepp	6:fb11b746ceb5	4614	}
sepp_nepp	6:fb11b746ceb5	4615
sepp_nepp	7:3a1115c2556b	4616	if (status != VL53L0X_ERROR_NONE) {return status;}
sepp_nepp	6:fb11b746ceb5	4617
sepp_nepp	6:fb11b746ceb5	4618	/* DSS */
sepp_nepp	6:fb11b746ceb5	4619	if (scheduler_sequence_steps.DssOn) {
sepp_nepp	6:fb11b746ceb5	4620
sepp_nepp	6:fb11b746ceb5	4621	sub_timeout = 2 * (msrc_dcc_tcc_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	4622	dss_overhead_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4623
sepp_nepp	6:fb11b746ceb5	4624	if (sub_timeout < final_range_timing_budget_micro_seconds) {
sepp_nepp	6:fb11b746ceb5	4625	final_range_timing_budget_micro_seconds
sepp_nepp	6:fb11b746ceb5	4626	-= sub_timeout;
sepp_nepp	6:fb11b746ceb5	4627	} else {
sepp_nepp	6:fb11b746ceb5	4628	/* Requested timeout too big. */
sepp_nepp	6:fb11b746ceb5	4629	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4630	}
sepp_nepp	6:fb11b746ceb5	4631	} else if (scheduler_sequence_steps.MsrcOn) {
sepp_nepp	6:fb11b746ceb5	4632	/* MSRC */
sepp_nepp	6:fb11b746ceb5	4633	sub_timeout = msrc_dcc_tcc_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	4634	msrc_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	4635
sepp_nepp	6:fb11b746ceb5	4636	if (sub_timeout < final_range_timing_budget_micro_seconds) {
sepp_nepp	6:fb11b746ceb5	4637	final_range_timing_budget_micro_seconds
sepp_nepp	6:fb11b746ceb5	4638	-= sub_timeout;
sepp_nepp	6:fb11b746ceb5	4639	} else {
sepp_nepp	6:fb11b746ceb5	4640	/* Requested timeout too big. */
sepp_nepp	6:fb11b746ceb5	4641	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4642	}
sepp_nepp	6:fb11b746ceb5	4643	}
sepp_nepp	6:fb11b746ceb5	4644
sepp_nepp	6:fb11b746ceb5	4645	}
sepp_nepp	6:fb11b746ceb5	4646
sepp_nepp	6:fb11b746ceb5	4647	if (status != VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4648
sepp_nepp	6:fb11b746ceb5	4649	return status;
sepp_nepp	6:fb11b746ceb5	4650	}
sepp_nepp	6:fb11b746ceb5	4651
sepp_nepp	6:fb11b746ceb5	4652	if (scheduler_sequence_steps.PreRangeOn) {
sepp_nepp	6:fb11b746ceb5	4653
sepp_nepp	6:fb11b746ceb5	4654	/* Subtract the Pre-range timeout if enabled. */
sepp_nepp	6:fb11b746ceb5	4655
sepp_nepp	7:3a1115c2556b	4656	status = get_sequence_step_timeout(
sepp_nepp	6:fb11b746ceb5	4657	VL53L0X_SEQUENCESTEP_PRE_RANGE,
sepp_nepp	6:fb11b746ceb5	4658	&pre_range_timeout_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4659
sepp_nepp	6:fb11b746ceb5	4660	sub_timeout = pre_range_timeout_micro_seconds +
sepp_nepp	6:fb11b746ceb5	4661	pre_range_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	4662
sepp_nepp	6:fb11b746ceb5	4663	if (sub_timeout < final_range_timing_budget_micro_seconds) {
sepp_nepp	6:fb11b746ceb5	4664	final_range_timing_budget_micro_seconds -= sub_timeout;
sepp_nepp	6:fb11b746ceb5	4665	} else {
sepp_nepp	6:fb11b746ceb5	4666	/* Requested timeout too big. */
sepp_nepp	6:fb11b746ceb5	4667	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4668	}
sepp_nepp	6:fb11b746ceb5	4669	}
sepp_nepp	6:fb11b746ceb5	4670
sepp_nepp	6:fb11b746ceb5	4671
sepp_nepp	6:fb11b746ceb5	4672	if (status == VL53L0X_ERROR_NONE &&
sepp_nepp	6:fb11b746ceb5	4673	scheduler_sequence_steps.FinalRangeOn) {
sepp_nepp	6:fb11b746ceb5	4674
sepp_nepp	6:fb11b746ceb5	4675	final_range_timing_budget_micro_seconds -=
sepp_nepp	6:fb11b746ceb5	4676	final_range_overhead_micro_seconds;
sepp_nepp	6:fb11b746ceb5	4677
sepp_nepp	6:fb11b746ceb5	4678	/* Final Range Timeout
sepp_nepp	6:fb11b746ceb5	4679	* Note that the final range timeout is determined by the timing
sepp_nepp	6:fb11b746ceb5	4680	* budget and the sum of all other timeouts within the sequence.
sepp_nepp	6:fb11b746ceb5	4681	* If there is no room for the final range timeout, then an error
sepp_nepp	6:fb11b746ceb5	4682	* will be set. Otherwise the remaining time will be applied to
sepp_nepp	6:fb11b746ceb5	4683	* the final range.
sepp_nepp	6:fb11b746ceb5	4684	*/
sepp_nepp	7:3a1115c2556b	4685	status = set_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	4686	final_range_timing_budget_micro_seconds);
sepp_nepp	7:3a1115c2556b	4687	VL53L0X_SETPARAMETERFIELD(MeasurementTimingBudgetMicroSeconds,
sepp_nepp	6:fb11b746ceb5	4688	measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4689	}
sepp_nepp	6:fb11b746ceb5	4690
sepp_nepp	6:fb11b746ceb5	4691	return status;
sepp_nepp	6:fb11b746ceb5	4692	}
sepp_nepp	6:fb11b746ceb5	4693
sepp_nepp	7:3a1115c2556b	4694	VL53L0X_Error VL53L0X::VL53L0X_set_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	4695	uint32_t measurement_timing_budget_micro_seconds)
sepp_nepp	7:3a1115c2556b	4696	{ VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	7:3a1115c2556b	4697
sepp_nepp	7:3a1115c2556b	4698	status = wrapped_VL53L0X_set_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	4699	measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4700
sepp_nepp	6:fb11b746ceb5	4701	return status;
sepp_nepp	6:fb11b746ceb5	4702	}
sepp_nepp	6:fb11b746ceb5	4703
sepp_nepp	7:3a1115c2556b	4704	VL53L0X_Error VL53L0X::VL53L0X_set_sequence_step_enable(
sepp_nepp	6:fb11b746ceb5	4705	VL53L0X_SequenceStepId sequence_step_id, uint8_t sequence_step_enabled)
sepp_nepp	6:fb11b746ceb5	4706	{
sepp_nepp	6:fb11b746ceb5	4707	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4708	uint8_t sequence_config = 0;
sepp_nepp	6:fb11b746ceb5	4709	uint8_t sequence_config_new = 0;
sepp_nepp	6:fb11b746ceb5	4710	uint32_t measurement_timing_budget_micro_seconds;
sepp_nepp	6:fb11b746ceb5	4711
sepp_nepp	7:3a1115c2556b	4712	status = VL53L0X_read_byte( VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, &sequence_config);
sepp_nepp	6:fb11b746ceb5	4713
sepp_nepp	6:fb11b746ceb5	4714	sequence_config_new = sequence_config;
sepp_nepp	6:fb11b746ceb5	4715
sepp_nepp	6:fb11b746ceb5	4716	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4717	if (sequence_step_enabled == 1) {
sepp_nepp	6:fb11b746ceb5	4718
sepp_nepp	6:fb11b746ceb5	4719	/* Enable requested sequence step
sepp_nepp	6:fb11b746ceb5	4720	*/
sepp_nepp	6:fb11b746ceb5	4721	switch (sequence_step_id) {
sepp_nepp	6:fb11b746ceb5	4722	case VL53L0X_SEQUENCESTEP_TCC:
sepp_nepp	6:fb11b746ceb5	4723	sequence_config_new \|= 0x10;
sepp_nepp	6:fb11b746ceb5	4724	break;
sepp_nepp	6:fb11b746ceb5	4725	case VL53L0X_SEQUENCESTEP_DSS:
sepp_nepp	6:fb11b746ceb5	4726	sequence_config_new \|= 0x28;
sepp_nepp	6:fb11b746ceb5	4727	break;
sepp_nepp	6:fb11b746ceb5	4728	case VL53L0X_SEQUENCESTEP_MSRC:
sepp_nepp	6:fb11b746ceb5	4729	sequence_config_new \|= 0x04;
sepp_nepp	6:fb11b746ceb5	4730	break;
sepp_nepp	6:fb11b746ceb5	4731	case VL53L0X_SEQUENCESTEP_PRE_RANGE:
sepp_nepp	6:fb11b746ceb5	4732	sequence_config_new \|= 0x40;
sepp_nepp	6:fb11b746ceb5	4733	break;
sepp_nepp	6:fb11b746ceb5	4734	case VL53L0X_SEQUENCESTEP_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	4735	sequence_config_new \|= 0x80;
sepp_nepp	6:fb11b746ceb5	4736	break;
sepp_nepp	6:fb11b746ceb5	4737	default:
sepp_nepp	6:fb11b746ceb5	4738	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4739	}
sepp_nepp	6:fb11b746ceb5	4740	} else {
sepp_nepp	7:3a1115c2556b	4741	/* Disable requested sequence step */
sepp_nepp	6:fb11b746ceb5	4742	switch (sequence_step_id) {
sepp_nepp	6:fb11b746ceb5	4743	case VL53L0X_SEQUENCESTEP_TCC:
sepp_nepp	6:fb11b746ceb5	4744	sequence_config_new &= 0xef;
sepp_nepp	6:fb11b746ceb5	4745	break;
sepp_nepp	6:fb11b746ceb5	4746	case VL53L0X_SEQUENCESTEP_DSS:
sepp_nepp	6:fb11b746ceb5	4747	sequence_config_new &= 0xd7;
sepp_nepp	6:fb11b746ceb5	4748	break;
sepp_nepp	6:fb11b746ceb5	4749	case VL53L0X_SEQUENCESTEP_MSRC:
sepp_nepp	6:fb11b746ceb5	4750	sequence_config_new &= 0xfb;
sepp_nepp	6:fb11b746ceb5	4751	break;
sepp_nepp	6:fb11b746ceb5	4752	case VL53L0X_SEQUENCESTEP_PRE_RANGE:
sepp_nepp	6:fb11b746ceb5	4753	sequence_config_new &= 0xbf;
sepp_nepp	6:fb11b746ceb5	4754	break;
sepp_nepp	6:fb11b746ceb5	4755	case VL53L0X_SEQUENCESTEP_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	4756	sequence_config_new &= 0x7f;
sepp_nepp	6:fb11b746ceb5	4757	break;
sepp_nepp	6:fb11b746ceb5	4758	default:
sepp_nepp	6:fb11b746ceb5	4759	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4760	}
sepp_nepp	6:fb11b746ceb5	4761	}
sepp_nepp	6:fb11b746ceb5	4762	}
sepp_nepp	6:fb11b746ceb5	4763
sepp_nepp	6:fb11b746ceb5	4764	if (sequence_config_new != sequence_config) {
sepp_nepp	6:fb11b746ceb5	4765	/* Apply New Setting */
sepp_nepp	6:fb11b746ceb5	4766	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4767	status = VL53L0X_write_byte(VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, sequence_config_new);
sepp_nepp	6:fb11b746ceb5	4768	}
sepp_nepp	6:fb11b746ceb5	4769	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4770	PALDevDataSet( SequenceConfig, sequence_config_new);}
sepp_nepp	6:fb11b746ceb5	4771
sepp_nepp	6:fb11b746ceb5	4772	/* Recalculate timing budget */
sepp_nepp	6:fb11b746ceb5	4773	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4774	VL53L0X_GETPARAMETERFIELD(MeasurementTimingBudgetMicroSeconds,
sepp_nepp	6:fb11b746ceb5	4775	measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4776
sepp_nepp	7:3a1115c2556b	4777	VL53L0X_set_measurement_timing_budget_micro_seconds(
sepp_nepp	6:fb11b746ceb5	4778	measurement_timing_budget_micro_seconds);
sepp_nepp	6:fb11b746ceb5	4779	}
sepp_nepp	6:fb11b746ceb5	4780	}
sepp_nepp	6:fb11b746ceb5	4781
sepp_nepp	6:fb11b746ceb5	4782	return status;
sepp_nepp	6:fb11b746ceb5	4783	}
sepp_nepp	6:fb11b746ceb5	4784
sepp_nepp	7:3a1115c2556b	4785	VL53L0X_Error VL53L0X::VL53L0X_set_limit_check_enable( uint16_t limit_check_id,
sepp_nepp	6:fb11b746ceb5	4786	uint8_t limit_check_enable)
sepp_nepp	6:fb11b746ceb5	4787	{
sepp_nepp	6:fb11b746ceb5	4788	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4789	FixPoint1616_t temp_fix1616 = 0;
sepp_nepp	6:fb11b746ceb5	4790	uint8_t limit_check_enable_int = 0;
sepp_nepp	6:fb11b746ceb5	4791	uint8_t limit_check_disable = 0;
sepp_nepp	6:fb11b746ceb5	4792	uint8_t temp8;
sepp_nepp	6:fb11b746ceb5	4793
sepp_nepp	6:fb11b746ceb5	4794	if (limit_check_id >= VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS) {
sepp_nepp	6:fb11b746ceb5	4795	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4796	} else {
sepp_nepp	6:fb11b746ceb5	4797	if (limit_check_enable == 0) {
sepp_nepp	6:fb11b746ceb5	4798	temp_fix1616 = 0;
sepp_nepp	6:fb11b746ceb5	4799	limit_check_enable_int = 0;
sepp_nepp	6:fb11b746ceb5	4800	limit_check_disable = 1;
sepp_nepp	6:fb11b746ceb5	4801	} else {
sepp_nepp	7:3a1115c2556b	4802	VL53L0X_GETARRAYPARAMETERFIELD( LimitChecksValue,
sepp_nepp	6:fb11b746ceb5	4803	limit_check_id, temp_fix1616);
sepp_nepp	6:fb11b746ceb5	4804	limit_check_disable = 0;
sepp_nepp	6:fb11b746ceb5	4805	/* this to be sure to have either 0 or 1 */
sepp_nepp	6:fb11b746ceb5	4806	limit_check_enable_int = 1;
sepp_nepp	6:fb11b746ceb5	4807	}
sepp_nepp	6:fb11b746ceb5	4808
sepp_nepp	6:fb11b746ceb5	4809	switch (limit_check_id) {
sepp_nepp	6:fb11b746ceb5	4810
sepp_nepp	6:fb11b746ceb5	4811	case VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE:
sepp_nepp	6:fb11b746ceb5	4812	/* internal computation: */
sepp_nepp	7:3a1115c2556b	4813	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksEnable,
sepp_nepp	6:fb11b746ceb5	4814	VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	4815	limit_check_enable_int);
sepp_nepp	6:fb11b746ceb5	4816	break;
sepp_nepp	6:fb11b746ceb5	4817
sepp_nepp	6:fb11b746ceb5	4818	case VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE:
sepp_nepp	7:3a1115c2556b	4819	status = VL53L0X_write_word( VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT,
sepp_nepp	6:fb11b746ceb5	4820	VL53L0X_FIXPOINT1616TOFIXPOINT97(temp_fix1616));
sepp_nepp	6:fb11b746ceb5	4821	break;
sepp_nepp	6:fb11b746ceb5	4822
sepp_nepp	7:3a1115c2556b	4823	case VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP:/* internal computation: */
sepp_nepp	7:3a1115c2556b	4824	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksEnable,
sepp_nepp	6:fb11b746ceb5	4825	VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP,
sepp_nepp	6:fb11b746ceb5	4826	limit_check_enable_int);
sepp_nepp	6:fb11b746ceb5	4827	break;
sepp_nepp	6:fb11b746ceb5	4828
sepp_nepp	7:3a1115c2556b	4829	case VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD:/* internal computation: */
sepp_nepp	7:3a1115c2556b	4830	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksEnable,
sepp_nepp	6:fb11b746ceb5	4831	VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD,
sepp_nepp	6:fb11b746ceb5	4832	limit_check_enable_int);
sepp_nepp	6:fb11b746ceb5	4833	break;
sepp_nepp	6:fb11b746ceb5	4834
sepp_nepp	6:fb11b746ceb5	4835	case VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC:
sepp_nepp	6:fb11b746ceb5	4836	temp8 = (uint8_t)(limit_check_disable << 1);
sepp_nepp	7:3a1115c2556b	4837	status = VL53L0X_update_byte(VL53L0X_REG_MSRC_CONFIG_CONTROL,
sepp_nepp	6:fb11b746ceb5	4838	0xFE, temp8);
sepp_nepp	6:fb11b746ceb5	4839	break;
sepp_nepp	6:fb11b746ceb5	4840
sepp_nepp	6:fb11b746ceb5	4841	case VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE:
sepp_nepp	6:fb11b746ceb5	4842
sepp_nepp	6:fb11b746ceb5	4843	temp8 = (uint8_t)(limit_check_disable << 4);
sepp_nepp	7:3a1115c2556b	4844	status = VL53L0X_update_byte(VL53L0X_REG_MSRC_CONFIG_CONTROL,
sepp_nepp	6:fb11b746ceb5	4845	0xEF, temp8);
sepp_nepp	6:fb11b746ceb5	4846	break;
sepp_nepp	6:fb11b746ceb5	4847
sepp_nepp	6:fb11b746ceb5	4848	default:
sepp_nepp	6:fb11b746ceb5	4849	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	4850	}
sepp_nepp	6:fb11b746ceb5	4851	}
sepp_nepp	6:fb11b746ceb5	4852
sepp_nepp	6:fb11b746ceb5	4853	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	4854	if (limit_check_enable == 0) {
sepp_nepp	7:3a1115c2556b	4855	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksEnable,limit_check_id, 0);
sepp_nepp	6:fb11b746ceb5	4856	} else {
sepp_nepp	7:3a1115c2556b	4857	VL53L0X_SETARRAYPARAMETERFIELD( LimitChecksEnable,limit_check_id, 1);
sepp_nepp	6:fb11b746ceb5	4858	}
sepp_nepp	6:fb11b746ceb5	4859	}
sepp_nepp	6:fb11b746ceb5	4860	return status;
sepp_nepp	6:fb11b746ceb5	4861	}
sepp_nepp	6:fb11b746ceb5	4862
sepp_nepp	7:3a1115c2556b	4863	VL53L0X_Error VL53L0X::VL53L0X_static_init(void)
sepp_nepp	6:fb11b746ceb5	4864	{
sepp_nepp	6:fb11b746ceb5	4865	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	4866	VL53L0X_DeviceParameters_t current_parameters = {0};
sepp_nepp	6:fb11b746ceb5	4867	uint8_t *p_tuning_setting_buffer;
sepp_nepp	6:fb11b746ceb5	4868	uint16_t tempword = 0;
sepp_nepp	6:fb11b746ceb5	4869	uint8_t tempbyte = 0;
sepp_nepp	6:fb11b746ceb5	4870	uint8_t use_internal_tuning_settings = 0;
sepp_nepp	6:fb11b746ceb5	4871	uint32_t count = 0;
sepp_nepp	6:fb11b746ceb5	4872	uint8_t is_aperture_spads = 0;
sepp_nepp	6:fb11b746ceb5	4873	uint32_t ref_spad_count = 0;
sepp_nepp	6:fb11b746ceb5	4874	uint8_t aperture_spads = 0;
sepp_nepp	6:fb11b746ceb5	4875	uint8_t vcsel_pulse_period_pclk;
sepp_nepp	6:fb11b746ceb5	4876	uint32_t seq_timeout_micro_secs;
sepp_nepp	6:fb11b746ceb5	4877
sepp_nepp	7:3a1115c2556b	4878	status = VL53L0X_get_info_from_device( 1);
sepp_nepp	6:fb11b746ceb5	4879
sepp_nepp	6:fb11b746ceb5	4880	/* set the ref spad from NVM */
sepp_nepp	7:3a1115c2556b	4881	count = (uint32_t)VL53L0X_GETDEVICESPECIFICPARAMETER(ReferenceSpadCount);
sepp_nepp	7:3a1115c2556b	4882	aperture_spads = VL53L0X_GETDEVICESPECIFICPARAMETER(ReferenceSpadType);
sepp_nepp	6:fb11b746ceb5	4883
sepp_nepp	6:fb11b746ceb5	4884	/* NVM value invalid */
sepp_nepp	6:fb11b746ceb5	4885	if ((aperture_spads > 1) \|\|
sepp_nepp	6:fb11b746ceb5	4886	((aperture_spads == 1) && (count > 32)) \|\|
sepp_nepp	6:fb11b746ceb5	4887	((aperture_spads == 0) && (count > 12))) {
sepp_nepp	7:3a1115c2556b	4888	status = wrapped_VL53L0X_perform_ref_spad_management( &ref_spad_count,
sepp_nepp	6:fb11b746ceb5	4889	&is_aperture_spads);
sepp_nepp	6:fb11b746ceb5	4890	} else {
sepp_nepp	7:3a1115c2556b	4891	status = VL53L0X_set_reference_spads( count, aperture_spads);
sepp_nepp	6:fb11b746ceb5	4892	}
sepp_nepp	6:fb11b746ceb5	4893
sepp_nepp	6:fb11b746ceb5	4894
sepp_nepp	6:fb11b746ceb5	4895	/* Initialize tuning settings buffer to prevent compiler warning. */
sepp_nepp	6:fb11b746ceb5	4896	p_tuning_setting_buffer = DefaultTuningSettings;
sepp_nepp	6:fb11b746ceb5	4897
sepp_nepp	6:fb11b746ceb5	4898	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4899	use_internal_tuning_settings = PALDevDataGet( UseInternalTuningSettings);
sepp_nepp	6:fb11b746ceb5	4900
sepp_nepp	6:fb11b746ceb5	4901	if (use_internal_tuning_settings == 0) {
sepp_nepp	7:3a1115c2556b	4902	p_tuning_setting_buffer = PALDevDataGet(pTuningSettingsPointer); }
sepp_nepp	7:3a1115c2556b	4903	else { p_tuning_setting_buffer = DefaultTuningSettings; }
sepp_nepp	6:fb11b746ceb5	4904
sepp_nepp	6:fb11b746ceb5	4905	}
sepp_nepp	6:fb11b746ceb5	4906
sepp_nepp	6:fb11b746ceb5	4907	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4908	status = VL53L0X_load_tuning_settings( p_tuning_setting_buffer); }
sepp_nepp	6:fb11b746ceb5	4909
sepp_nepp	6:fb11b746ceb5	4910
sepp_nepp	6:fb11b746ceb5	4911	/* Set interrupt config to new sample ready */
sepp_nepp	6:fb11b746ceb5	4912	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4913	status = VL53L0X_set_gpio_config( 0, 0,
sepp_nepp	6:fb11b746ceb5	4914	VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY,
sepp_nepp	6:fb11b746ceb5	4915	VL53L0X_INTERRUPTPOLARITY_LOW);
sepp_nepp	6:fb11b746ceb5	4916	}
sepp_nepp	6:fb11b746ceb5	4917
sepp_nepp	6:fb11b746ceb5	4918	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4919	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	4920	status \|= VL53L0X_read_word ( 0x84, &tempword);
sepp_nepp	7:3a1115c2556b	4921	status \|= VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	4922	}
sepp_nepp	6:fb11b746ceb5	4923
sepp_nepp	6:fb11b746ceb5	4924	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4925	VL53L0X_SETDEVICESPECIFICPARAMETER( OscFrequencyMHz,VL53L0X_FIXPOINT412TOFIXPOINT1616(tempword));
sepp_nepp	6:fb11b746ceb5	4926	}
sepp_nepp	6:fb11b746ceb5	4927
sepp_nepp	6:fb11b746ceb5	4928	/* After static init, some device parameters may be changed,
sepp_nepp	6:fb11b746ceb5	4929	* so update them */
sepp_nepp	6:fb11b746ceb5	4930	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4931	status = VL53L0X_get_device_parameters( &current_parameters);
sepp_nepp	6:fb11b746ceb5	4932	}
sepp_nepp	6:fb11b746ceb5	4933
sepp_nepp	6:fb11b746ceb5	4934
sepp_nepp	6:fb11b746ceb5	4935	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4936	status = VL53L0X_get_fraction_enable( &tempbyte);
sepp_nepp	6:fb11b746ceb5	4937	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4938	PALDevDataSet( RangeFractionalEnable, tempbyte);
sepp_nepp	6:fb11b746ceb5	4939	}
sepp_nepp	6:fb11b746ceb5	4940	}
sepp_nepp	6:fb11b746ceb5	4941
sepp_nepp	6:fb11b746ceb5	4942	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4943	PALDevDataSet( CurrentParameters, current_parameters);
sepp_nepp	6:fb11b746ceb5	4944	}
sepp_nepp	6:fb11b746ceb5	4945
sepp_nepp	6:fb11b746ceb5	4946
sepp_nepp	6:fb11b746ceb5	4947	/* read the sequence config and save it */
sepp_nepp	6:fb11b746ceb5	4948	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4949	status = VL53L0X_read_byte(
sepp_nepp	6:fb11b746ceb5	4950	VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG, &tempbyte);
sepp_nepp	6:fb11b746ceb5	4951	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4952	PALDevDataSet( SequenceConfig, tempbyte);
sepp_nepp	6:fb11b746ceb5	4953	}
sepp_nepp	6:fb11b746ceb5	4954	}
sepp_nepp	6:fb11b746ceb5	4955
sepp_nepp	6:fb11b746ceb5	4956	/* Disable MSRC and TCC by default */
sepp_nepp	6:fb11b746ceb5	4957	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4958	status = VL53L0X_set_sequence_step_enable(
sepp_nepp	6:fb11b746ceb5	4959	VL53L0X_SEQUENCESTEP_TCC, 0);
sepp_nepp	6:fb11b746ceb5	4960	}
sepp_nepp	6:fb11b746ceb5	4961
sepp_nepp	6:fb11b746ceb5	4962	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4963	status = VL53L0X_set_sequence_step_enable(
sepp_nepp	6:fb11b746ceb5	4964	VL53L0X_SEQUENCESTEP_MSRC, 0);
sepp_nepp	6:fb11b746ceb5	4965	}
sepp_nepp	6:fb11b746ceb5	4966
sepp_nepp	6:fb11b746ceb5	4967	/* Set PAL State to standby */
sepp_nepp	6:fb11b746ceb5	4968	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4969	PALDevDataSet( PalState, VL53L0X_STATE_IDLE);
sepp_nepp	6:fb11b746ceb5	4970	}
sepp_nepp	6:fb11b746ceb5	4971
sepp_nepp	6:fb11b746ceb5	4972	/* Store pre-range vcsel period */
sepp_nepp	6:fb11b746ceb5	4973	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4974	status = VL53L0X_get_vcsel_pulse_period(VL53L0X_VCSEL_PERIOD_PRE_RANGE,&vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	4975	}
sepp_nepp	6:fb11b746ceb5	4976
sepp_nepp	6:fb11b746ceb5	4977	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4978	VL53L0X_SETDEVICESPECIFICPARAMETER(PreRangeVcselPulsePeriod,vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	4979	}
sepp_nepp	6:fb11b746ceb5	4980
sepp_nepp	6:fb11b746ceb5	4981	/* Store final-range vcsel period */
sepp_nepp	6:fb11b746ceb5	4982	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4983	status = VL53L0X_get_vcsel_pulse_period(
sepp_nepp	6:fb11b746ceb5	4984	VL53L0X_VCSEL_PERIOD_FINAL_RANGE,
sepp_nepp	6:fb11b746ceb5	4985	&vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	4986	}
sepp_nepp	6:fb11b746ceb5	4987
sepp_nepp	6:fb11b746ceb5	4988	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4989	VL53L0X_SETDEVICESPECIFICPARAMETER(FinalRangeVcselPulsePeriod,vcsel_pulse_period_pclk);
sepp_nepp	6:fb11b746ceb5	4990	}
sepp_nepp	6:fb11b746ceb5	4991
sepp_nepp	6:fb11b746ceb5	4992	/* Store pre-range timeout */
sepp_nepp	6:fb11b746ceb5	4993	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4994	status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_PRE_RANGE,&seq_timeout_micro_secs);
sepp_nepp	6:fb11b746ceb5	4995	}
sepp_nepp	6:fb11b746ceb5	4996
sepp_nepp	6:fb11b746ceb5	4997	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	4998	VL53L0X_SETDEVICESPECIFICPARAMETER(PreRangeTimeoutMicroSecs,seq_timeout_micro_secs);
sepp_nepp	6:fb11b746ceb5	4999	}
sepp_nepp	6:fb11b746ceb5	5000
sepp_nepp	6:fb11b746ceb5	5001	/* Store final-range timeout */
sepp_nepp	6:fb11b746ceb5	5002	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	5003	status = get_sequence_step_timeout(VL53L0X_SEQUENCESTEP_FINAL_RANGE,&seq_timeout_micro_secs);
sepp_nepp	6:fb11b746ceb5	5004	}
sepp_nepp	6:fb11b746ceb5	5005
sepp_nepp	6:fb11b746ceb5	5006	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	5007	VL53L0X_SETDEVICESPECIFICPARAMETER(FinalRangeTimeoutMicroSecs,seq_timeout_micro_secs);
sepp_nepp	6:fb11b746ceb5	5008	}
sepp_nepp	6:fb11b746ceb5	5009	return status;
sepp_nepp	6:fb11b746ceb5	5010	}
sepp_nepp	6:fb11b746ceb5	5011
sepp_nepp	6:fb11b746ceb5	5012
sepp_nepp	7:3a1115c2556b	5013	VL53L0X_Error VL53L0X::VL53L0X_stop_measurement(void)
sepp_nepp	6:fb11b746ceb5	5014	{
sepp_nepp	6:fb11b746ceb5	5015	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	5016
sepp_nepp	6:fb11b746ceb5	5017
sepp_nepp	7:3a1115c2556b	5018	status = VL53L0X_write_byte( VL53L0X_REG_SYSRANGE_START,
sepp_nepp	6:fb11b746ceb5	5019	VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT);
sepp_nepp	6:fb11b746ceb5	5020
sepp_nepp	7:3a1115c2556b	5021	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	5022	status = VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	5023	status = VL53L0X_write_byte( 0x91, 0x00);
sepp_nepp	7:3a1115c2556b	5024	status = VL53L0X_write_byte( 0x00, 0x01);
sepp_nepp	7:3a1115c2556b	5025	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	6:fb11b746ceb5	5026
sepp_nepp	6:fb11b746ceb5	5027	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	6:fb11b746ceb5	5028	/* Set PAL State to Idle */
sepp_nepp	7:3a1115c2556b	5029	PALDevDataSet( PalState, VL53L0X_STATE_IDLE);
sepp_nepp	6:fb11b746ceb5	5030	}
sepp_nepp	6:fb11b746ceb5	5031
sepp_nepp	6:fb11b746ceb5	5032	/* Check if need to apply interrupt settings */
sepp_nepp	6:fb11b746ceb5	5033	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	5034	status = VL53L0X_check_and_load_interrupt_settings( 0);
sepp_nepp	6:fb11b746ceb5	5035	}
sepp_nepp	6:fb11b746ceb5	5036
sepp_nepp	6:fb11b746ceb5	5037
sepp_nepp	6:fb11b746ceb5	5038	return status;
sepp_nepp	6:fb11b746ceb5	5039	}
sepp_nepp	6:fb11b746ceb5	5040
sepp_nepp	7:3a1115c2556b	5041	VL53L0X_Error VL53L0X::VL53L0X_get_stop_completed_status(
sepp_nepp	6:fb11b746ceb5	5042	uint32_t *p_stop_status)
sepp_nepp	6:fb11b746ceb5	5043	{
sepp_nepp	6:fb11b746ceb5	5044	VL53L0X_Error status = VL53L0X_ERROR_NONE;
sepp_nepp	6:fb11b746ceb5	5045	uint8_t byte = 0;
sepp_nepp	6:fb11b746ceb5	5046
sepp_nepp	6:fb11b746ceb5	5047
sepp_nepp	7:3a1115c2556b	5048	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	6:fb11b746ceb5	5049
sepp_nepp	6:fb11b746ceb5	5050	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	5051	status = VL53L0X_read_byte( 0x04, &byte);
sepp_nepp	6:fb11b746ceb5	5052	}
sepp_nepp	6:fb11b746ceb5	5053
sepp_nepp	6:fb11b746ceb5	5054	if (status == VL53L0X_ERROR_NONE) {
sepp_nepp	7:3a1115c2556b	5055	status = VL53L0X_write_byte( 0xFF, 0x0);
sepp_nepp	6:fb11b746ceb5	5056	}
sepp_nepp	6:fb11b746ceb5	5057
sepp_nepp	6:fb11b746ceb5	5058	*p_stop_status = byte;
sepp_nepp	6:fb11b746ceb5	5059
sepp_nepp	6:fb11b746ceb5	5060	if (byte == 0) {
sepp_nepp	7:3a1115c2556b	5061	status = VL53L0X_write_byte( 0x80, 0x01);
sepp_nepp	7:3a1115c2556b	5062	status = VL53L0X_write_byte( 0xFF, 0x01);
sepp_nepp	7:3a1115c2556b	5063	status = VL53L0X_write_byte( 0x00, 0x00);
sepp_nepp	7:3a1115c2556b	5064	status = VL53L0X_write_byte( 0x91,
sepp_nepp	7:3a1115c2556b	5065	PALDevDataGet( StopVariable));
sepp_nepp	7:3a1115c2556b	5066	status = VL53L0X_write_byte( 0x00, 0x01);
sepp_nepp	7:3a1115c2556b	5067	status = VL53L0X_write_byte( 0xFF, 0x00);
sepp_nepp	7:3a1115c2556b	5068	status = VL53L0X_write_byte( 0x80, 0x00);
sepp_nepp	6:fb11b746ceb5	5069	}
sepp_nepp	6:fb11b746ceb5	5070
sepp_nepp	6:fb11b746ceb5	5071
sepp_nepp	6:fb11b746ceb5	5072	return status;
sepp_nepp	6:fb11b746ceb5	5073	}
sepp_nepp	6:fb11b746ceb5	5074
sepp_nepp	6:fb11b746ceb5	5075
sepp_nepp	6:fb11b746ceb5	5076
sepp_nepp	6:fb11b746ceb5	5077	/******************************************************************************/
sepp_nepp	6:fb11b746ceb5	5078
sepp_nepp	6:fb11b746ceb5	5079	/**************** Write and read functions from I2C ***********************/
sepp_nepp	6:fb11b746ceb5	5080
sepp_nepp	7:3a1115c2556b	5081	VL53L0X_Error VL53L0X::VL53L0X_write_multi( uint8_t index, uint8_t *p_data, uint32_t count)
sepp_nepp	6:fb11b746ceb5	5082	{
sepp_nepp	6:fb11b746ceb5	5083	int status;
sepp_nepp	6:fb11b746ceb5	5084
sepp_nepp	7:3a1115c2556b	5085	status = VL53L0X_i2c_write(index, p_data, (uint16_t)count);
sepp_nepp	6:fb11b746ceb5	5086	return status;
sepp_nepp	6:fb11b746ceb5	5087	}
sepp_nepp	6:fb11b746ceb5	5088
sepp_nepp	7:3a1115c2556b	5089	VL53L0X_Error VL53L0X::VL53L0X_read_multi( uint8_t index, uint8_t *p_data, uint32_t count)
sepp_nepp	6:fb11b746ceb5	5090	{
sepp_nepp	6:fb11b746ceb5	5091	int status;
sepp_nepp	6:fb11b746ceb5	5092
sepp_nepp	6:fb11b746ceb5	5093	if (count >= VL53L0X_MAX_I2C_XFER_SIZE) {
sepp_nepp	6:fb11b746ceb5	5094	status = VL53L0X_ERROR_INVALID_PARAMS;
sepp_nepp	6:fb11b746ceb5	5095	}
sepp_nepp	6:fb11b746ceb5	5096
sepp_nepp	7:3a1115c2556b	5097	status = VL53L0X_i2c_read(index, p_data, (uint16_t)count);
sepp_nepp	6:fb11b746ceb5	5098
sepp_nepp	6:fb11b746ceb5	5099	return status;
sepp_nepp	6:fb11b746ceb5	5100	}
sepp_nepp	6:fb11b746ceb5	5101
sepp_nepp	6:fb11b746ceb5	5102
sepp_nepp	7:3a1115c2556b	5103	VL53L0X_Error VL53L0X::VL53L0X_write_byte( uint8_t index, uint8_t data)
sepp_nepp	6:fb11b746ceb5	5104	{
sepp_nepp	6:fb11b746ceb5	5105	int status;
sepp_nepp	6:fb11b746ceb5	5106
sepp_nepp	7:3a1115c2556b	5107	status = VL53L0X_i2c_write(index, &data, 1);
sepp_nepp	6:fb11b746ceb5	5108	return status;
sepp_nepp	6:fb11b746ceb5	5109	}
sepp_nepp	6:fb11b746ceb5	5110
sepp_nepp	7:3a1115c2556b	5111	VL53L0X_Error VL53L0X::VL53L0X_write_word( uint8_t index, uint16_t data)
sepp_nepp	6:fb11b746ceb5	5112	{
sepp_nepp	6:fb11b746ceb5	5113	int status;
sepp_nepp	6:fb11b746ceb5	5114	uint8_t buffer[2];
sepp_nepp	6:fb11b746ceb5	5115
sepp_nepp	6:fb11b746ceb5	5116	buffer[0] = data >> 8;
sepp_nepp	6:fb11b746ceb5	5117	buffer[1] = data & 0x00FF;
sepp_nepp	7:3a1115c2556b	5118	status = VL53L0X_i2c_write(index, (uint8_t *)buffer, 2);
sepp_nepp	6:fb11b746ceb5	5119	return status;
sepp_nepp	6:fb11b746ceb5	5120	}
sepp_nepp	6:fb11b746ceb5	5121
sepp_nepp	7:3a1115c2556b	5122	VL53L0X_Error VL53L0X::VL53L0X_write_dword( uint8_t index, uint32_t data)
sepp_nepp	6:fb11b746ceb5	5123	{
sepp_nepp	6:fb11b746ceb5	5124	int status;
sepp_nepp	6:fb11b746ceb5	5125	uint8_t buffer[4];
sepp_nepp	6:fb11b746ceb5	5126
sepp_nepp	6:fb11b746ceb5	5127	buffer[0] = (data >> 24) & 0xFF;
sepp_nepp	6:fb11b746ceb5	5128	buffer[1] = (data >> 16) & 0xFF;
sepp_nepp	6:fb11b746ceb5	5129	buffer[2] = (data >> 8) & 0xFF;
sepp_nepp	6:fb11b746ceb5	5130	buffer[3] = (data >> 0) & 0xFF;
sepp_nepp	7:3a1115c2556b	5131	status = VL53L0X_i2c_write(index, (uint8_t *)buffer, 4);
sepp_nepp	6:fb11b746ceb5	5132	return status;
sepp_nepp	6:fb11b746ceb5	5133	}
sepp_nepp	6:fb11b746ceb5	5134
sepp_nepp	6:fb11b746ceb5	5135
sepp_nepp	7:3a1115c2556b	5136	VL53L0X_Error VL53L0X::VL53L0X_read_byte( uint8_t index, uint8_t *p_data)
sepp_nepp	6:fb11b746ceb5	5137	{
sepp_nepp	6:fb11b746ceb5	5138	int status;
sepp_nepp	6:fb11b746ceb5	5139
sepp_nepp	7:3a1115c2556b	5140	status = VL53L0X_i2c_read(index, p_data, 1);
sepp_nepp	6:fb11b746ceb5	5141
sepp_nepp	6:fb11b746ceb5	5142	if (status) {
sepp_nepp	6:fb11b746ceb5	5143	return -1;
sepp_nepp	6:fb11b746ceb5	5144	}
sepp_nepp	6:fb11b746ceb5	5145
sepp_nepp	6:fb11b746ceb5	5146	return 0;
sepp_nepp	6:fb11b746ceb5	5147	}
sepp_nepp	6:fb11b746ceb5	5148
sepp_nepp	7:3a1115c2556b	5149	VL53L0X_Error VL53L0X::VL53L0X_read_word( uint8_t index, uint16_t *p_data)
sepp_nepp	6:fb11b746ceb5	5150	{
sepp_nepp	6:fb11b746ceb5	5151	int status;
sepp_nepp	6:fb11b746ceb5	5152	uint8_t buffer[2] = {0, 0};
sepp_nepp	6:fb11b746ceb5	5153
sepp_nepp	7:3a1115c2556b	5154	status = VL53L0X_i2c_read(index, buffer, 2);
sepp_nepp	6:fb11b746ceb5	5155	if (!status) {
sepp_nepp	6:fb11b746ceb5	5156	*p_data = (buffer[0] << 8) + buffer[1];
sepp_nepp	6:fb11b746ceb5	5157	}
sepp_nepp	6:fb11b746ceb5	5158	return status;
sepp_nepp	6:fb11b746ceb5	5159
sepp_nepp	6:fb11b746ceb5	5160	}
sepp_nepp	6:fb11b746ceb5	5161
sepp_nepp	7:3a1115c2556b	5162	VL53L0X_Error VL53L0X::VL53L0X_read_dword( uint8_t index, uint32_t *p_data)
sepp_nepp	6:fb11b746ceb5	5163	{
sepp_nepp	6:fb11b746ceb5	5164	int status;
sepp_nepp	6:fb11b746ceb5	5165	uint8_t buffer[4] = {0, 0, 0, 0};
sepp_nepp	6:fb11b746ceb5	5166
sepp_nepp	7:3a1115c2556b	5167	status = VL53L0X_i2c_read(index, buffer, 4);
sepp_nepp	6:fb11b746ceb5	5168	if (!status) {
sepp_nepp	6:fb11b746ceb5	5169	*p_data = (buffer[0] << 24) + (buffer[1] << 16) + (buffer[2] << 8) + buffer[3];
sepp_nepp	6:fb11b746ceb5	5170	}
sepp_nepp	6:fb11b746ceb5	5171	return status;
sepp_nepp	6:fb11b746ceb5	5172
sepp_nepp	6:fb11b746ceb5	5173	}
sepp_nepp	6:fb11b746ceb5	5174
sepp_nepp	7:3a1115c2556b	5175	VL53L0X_Error VL53L0X::VL53L0X_update_byte( uint8_t index, uint8_t and_data, uint8_t or_data)
sepp_nepp	6:fb11b746ceb5	5176	{
sepp_nepp	6:fb11b746ceb5	5177	int status;
sepp_nepp	6:fb11b746ceb5	5178	uint8_t buffer = 0;
sepp_nepp	6:fb11b746ceb5	5179
sepp_nepp	6:fb11b746ceb5	5180	/* read data direct onto buffer */
sepp_nepp	7:3a1115c2556b	5181	status = VL53L0X_i2c_read(index, &buffer, 1);
sepp_nepp	6:fb11b746ceb5	5182	if (!status) {
sepp_nepp	6:fb11b746ceb5	5183	buffer = (buffer & and_data) \| or_data;
sepp_nepp	7:3a1115c2556b	5184	status = VL53L0X_i2c_write(index, &buffer, (uint8_t)1);
sepp_nepp	6:fb11b746ceb5	5185	}
sepp_nepp	6:fb11b746ceb5	5186	return status;
sepp_nepp	6:fb11b746ceb5	5187	}
sepp_nepp	6:fb11b746ceb5	5188
sepp_nepp	7:3a1115c2556b	5189	VL53L0X_Error VL53L0X::VL53L0X_i2c_write(uint8_t RegisterAddr, uint8_t *p_data,
sepp_nepp	6:fb11b746ceb5	5190	uint16_t NumByteToWrite)
sepp_nepp	6:fb11b746ceb5	5191	{
sepp_nepp	6:fb11b746ceb5	5192	int ret;
sepp_nepp	6:fb11b746ceb5	5193
sepp_nepp	7:3a1115c2556b	5194	ret = i2c_write(p_data, I2cDevAddr, RegisterAddr, NumByteToWrite);
sepp_nepp	6:fb11b746ceb5	5195
sepp_nepp	6:fb11b746ceb5	5196	if (ret) {
sepp_nepp	6:fb11b746ceb5	5197	return -1;
sepp_nepp	6:fb11b746ceb5	5198	}
sepp_nepp	6:fb11b746ceb5	5199	return 0;
sepp_nepp	6:fb11b746ceb5	5200	}
sepp_nepp	6:fb11b746ceb5	5201
sepp_nepp	7:3a1115c2556b	5202	VL53L0X_Error VL53L0X::VL53L0X_i2c_read(uint8_t RegisterAddr, uint8_t *p_data,
sepp_nepp	6:fb11b746ceb5	5203	uint16_t NumByteToRead)
sepp_nepp	6:fb11b746ceb5	5204	{
sepp_nepp	6:fb11b746ceb5	5205	int ret;
sepp_nepp	6:fb11b746ceb5	5206
sepp_nepp	7:3a1115c2556b	5207	ret = i2c_read(p_data, I2cDevAddr, RegisterAddr, NumByteToRead);
sepp_nepp	6:fb11b746ceb5	5208
sepp_nepp	6:fb11b746ceb5	5209	if (ret) {
sepp_nepp	6:fb11b746ceb5	5210	return -1;
sepp_nepp	6:fb11b746ceb5	5211	}
sepp_nepp	6:fb11b746ceb5	5212	return 0;
sepp_nepp	6:fb11b746ceb5	5213	}
sepp_nepp	6:fb11b746ceb5	5214
sepp_nepp	6:fb11b746ceb5	5215	/** Writes a buffer towards the I2C peripheral device. */
sepp_nepp	6:fb11b746ceb5	5216	int VL53L0X::i2c_write(uint8_t* pBuffer, uint8_t DeviceAddr, uint8_t RegisterAddr,
sepp_nepp	6:fb11b746ceb5	5217	uint16_t NumByteToWrite)
sepp_nepp	6:fb11b746ceb5	5218	{
sepp_nepp	6:fb11b746ceb5	5219	int ret;
sepp_nepp	6:fb11b746ceb5	5220	uint8_t tmp[VL53L0X_MAX_I2C_XFER_SIZE];
sepp_nepp	6:fb11b746ceb5	5221
sepp_nepp	6:fb11b746ceb5	5222	if(NumByteToWrite >= VL53L0X_MAX_I2C_XFER_SIZE) return -2;
sepp_nepp	6:fb11b746ceb5	5223
sepp_nepp	6:fb11b746ceb5	5224	/* First, send device address. Then, send data and STOP condition */
sepp_nepp	6:fb11b746ceb5	5225	tmp[0] = RegisterAddr;
sepp_nepp	6:fb11b746ceb5	5226	memcpy(tmp+1, pBuffer, NumByteToWrite);
sepp_nepp	6:fb11b746ceb5	5227
sepp_nepp	6:fb11b746ceb5	5228	ret = _dev_i2c->write(DeviceAddr, (const char*)tmp, NumByteToWrite+1, false);
sepp_nepp	6:fb11b746ceb5	5229
sepp_nepp	6:fb11b746ceb5	5230	if (ret != 0 ){ return -1; }
sepp_nepp	6:fb11b746ceb5	5231	return 0;
sepp_nepp	6:fb11b746ceb5	5232	}
sepp_nepp	6:fb11b746ceb5	5233
sepp_nepp	6:fb11b746ceb5	5234	/** Reads a buffer from the I2C peripheral device. */
sepp_nepp	6:fb11b746ceb5	5235	int VL53L0X::i2c_read(uint8_t* pBuffer, uint8_t DeviceAddr, uint8_t RegisterAddr,
sepp_nepp	6:fb11b746ceb5	5236	uint16_t NumByteToRead)
sepp_nepp	6:fb11b746ceb5	5237	{ int ret;
sepp_nepp	6:fb11b746ceb5	5238
sepp_nepp	6:fb11b746ceb5	5239	/* Send device address, with no STOP condition */
sepp_nepp	6:fb11b746ceb5	5240	ret = _dev_i2c->write(DeviceAddr, (const char*)&RegisterAddr, 1, true);
sepp_nepp	6:fb11b746ceb5	5241	if(!ret) { /* Read data, with STOP condition */
sepp_nepp	6:fb11b746ceb5	5242	ret = _dev_i2c->read(DeviceAddr, (char*)pBuffer, NumByteToRead, false); }
sepp_nepp	6:fb11b746ceb5	5243
sepp_nepp	6:fb11b746ceb5	5244	if (ret != 0 ){ return -1; }
sepp_nepp	6:fb11b746ceb5	5245	return 0;
sepp_nepp	6:fb11b746ceb5	5246	}

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Type:	Library
Created:	20 Jun 2019
Imports:	2
Forks:	0
Commits:	14
Dependents:	0
Dependencies:	0
Followers:	1

VL53L0X.cpp@7:3a1115c2556b, 2019-06-20 (annotated)

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