Sinan Divarci / Mbed OS max4146x_comp

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Dependencies:   MAX14690

USBDevice/USBDevice/TARGET_RENESAS/TARGET_RZ_A1H/usb0/inc/usb0_function_dmacdrv.h@0:0061165683ee, 2020-10-25 (annotated)

Committer:
sdivarci
Date:
Sun Oct 25 20:10:02 2020 +0000
Revision:
0:0061165683ee
sdivarci

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sdivarci 0:0061165683ee 1 /*******************************************************************************
sdivarci 0:0061165683ee 2 * DISCLAIMER
sdivarci 0:0061165683ee 3 * This software is supplied by Renesas Electronics Corporation and is only
sdivarci 0:0061165683ee 4 * intended for use with Renesas products. No other uses are authorized. This
sdivarci 0:0061165683ee 5 * software is owned by Renesas Electronics Corporation and is protected under
sdivarci 0:0061165683ee 6 * all applicable laws, including copyright laws.
sdivarci 0:0061165683ee 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
sdivarci 0:0061165683ee 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
sdivarci 0:0061165683ee 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
sdivarci 0:0061165683ee 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
sdivarci 0:0061165683ee 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
sdivarci 0:0061165683ee 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
sdivarci 0:0061165683ee 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
sdivarci 0:0061165683ee 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
sdivarci 0:0061165683ee 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
sdivarci 0:0061165683ee 16 * Renesas reserves the right, without notice, to make changes to this software
sdivarci 0:0061165683ee 17 * and to discontinue the availability of this software. By using this software,
sdivarci 0:0061165683ee 18 * you agree to the additional terms and conditions found by accessing the
sdivarci 0:0061165683ee 19 * following link:
sdivarci 0:0061165683ee 20 * http://www.renesas.com/disclaimer
sdivarci 0:0061165683ee 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
sdivarci 0:0061165683ee 22 *******************************************************************************/
sdivarci 0:0061165683ee 23 /*******************************************************************************
sdivarci 0:0061165683ee 24 * File Name : usb0_function_dmacdrv.h
sdivarci 0:0061165683ee 25 * $Rev: 1116 $
sdivarci 0:0061165683ee 26 * $Date:: 2014-07-09 16:29:19 +0900#$
sdivarci 0:0061165683ee 27 * Description : RZ/A1H R7S72100 USB Sample Program
sdivarci 0:0061165683ee 28 *******************************************************************************/
sdivarci 0:0061165683ee 29 #ifndef USB0_FUNCTION_DMACDRV_H
sdivarci 0:0061165683ee 30 #define USB0_FUNCTION_DMACDRV_H
sdivarci 0:0061165683ee 31
sdivarci 0:0061165683ee 32
sdivarci 0:0061165683ee 33 /*******************************************************************************
sdivarci 0:0061165683ee 34 Includes <System Includes> , "Project Includes"
sdivarci 0:0061165683ee 35 *******************************************************************************/
sdivarci 0:0061165683ee 36
sdivarci 0:0061165683ee 37
sdivarci 0:0061165683ee 38 #ifdef __cplusplus
sdivarci 0:0061165683ee 39 extern "C" {
sdivarci 0:0061165683ee 40 #endif
sdivarci 0:0061165683ee 41
sdivarci 0:0061165683ee 42 /*******************************************************************************
sdivarci 0:0061165683ee 43 Typedef definitions
sdivarci 0:0061165683ee 44 *******************************************************************************/
sdivarci 0:0061165683ee 45 typedef struct dmac_transinfo
sdivarci 0:0061165683ee 46 {
sdivarci 0:0061165683ee 47 uint32_t src_addr; /* Transfer source address */
sdivarci 0:0061165683ee 48 uint32_t dst_addr; /* Transfer destination address */
sdivarci 0:0061165683ee 49 uint32_t count; /* Transfer byte count */
sdivarci 0:0061165683ee 50 uint32_t src_size; /* Transfer source data size */
sdivarci 0:0061165683ee 51 uint32_t dst_size; /* Transfer destination data size */
sdivarci 0:0061165683ee 52 uint32_t saddr_dir; /* Transfer source address direction */
sdivarci 0:0061165683ee 53 uint32_t daddr_dir; /* Transfer destination address direction */
sdivarci 0:0061165683ee 54 } dmac_transinfo_t;
sdivarci 0:0061165683ee 55
sdivarci 0:0061165683ee 56
sdivarci 0:0061165683ee 57 /*******************************************************************************
sdivarci 0:0061165683ee 58 Macro definitions
sdivarci 0:0061165683ee 59 *******************************************************************************/
sdivarci 0:0061165683ee 60 /* ==== Transfer specification of the sample program ==== */
sdivarci 0:0061165683ee 61 #define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
sdivarci 0:0061165683ee 62 #define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
sdivarci 0:0061165683ee 63
sdivarci 0:0061165683ee 64 /* ==== DMA modes ==== */
sdivarci 0:0061165683ee 65 #define DMAC_MODE_REGISTER (0) /* Register mode */
sdivarci 0:0061165683ee 66 #define DMAC_MODE_LINK (1) /* Link mode */
sdivarci 0:0061165683ee 67
sdivarci 0:0061165683ee 68 /* ==== Transfer requests ==== */
sdivarci 0:0061165683ee 69 #define DMAC_REQ_MODE_EXT (0) /* External request */
sdivarci 0:0061165683ee 70 #define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
sdivarci 0:0061165683ee 71 #define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
sdivarci 0:0061165683ee 72
sdivarci 0:0061165683ee 73 /* ==== DMAC transfer sizes ==== */
sdivarci 0:0061165683ee 74 #define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
sdivarci 0:0061165683ee 75 #define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
sdivarci 0:0061165683ee 76 #define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
sdivarci 0:0061165683ee 77 #define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
sdivarci 0:0061165683ee 78 #define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
sdivarci 0:0061165683ee 79 #define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
sdivarci 0:0061165683ee 80 #define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
sdivarci 0:0061165683ee 81 #define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
sdivarci 0:0061165683ee 82
sdivarci 0:0061165683ee 83 /* ==== Address increment for transferring ==== */
sdivarci 0:0061165683ee 84 #define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
sdivarci 0:0061165683ee 85 #define DMAC_TRANS_ADR_INC (0) /* Increment */
sdivarci 0:0061165683ee 86
sdivarci 0:0061165683ee 87 /* ==== Method for detecting DMA request ==== */
sdivarci 0:0061165683ee 88 #define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
sdivarci 0:0061165683ee 89 #define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
sdivarci 0:0061165683ee 90 #define DMAC_REQ_DET_LOW (2) /* Low level detection */
sdivarci 0:0061165683ee 91 #define DMAC_REQ_DET_HIGH (3) /* High level detection */
sdivarci 0:0061165683ee 92
sdivarci 0:0061165683ee 93 /* ==== Request Direction ==== */
sdivarci 0:0061165683ee 94 #define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
sdivarci 0:0061165683ee 95 #define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
sdivarci 0:0061165683ee 96
sdivarci 0:0061165683ee 97 /* ==== Descriptors ==== */
sdivarci 0:0061165683ee 98 #define DMAC_DESC_HEADER (0) /* Header */
sdivarci 0:0061165683ee 99 #define DMAC_DESC_SRC_ADDR (1) /* Source Address */
sdivarci 0:0061165683ee 100 #define DMAC_DESC_DST_ADDR (2) /* Destination Address */
sdivarci 0:0061165683ee 101 #define DMAC_DESC_COUNT (3) /* Transaction Byte */
sdivarci 0:0061165683ee 102 #define DMAC_DESC_CHCFG (4) /* Channel Confg */
sdivarci 0:0061165683ee 103 #define DMAC_DESC_CHITVL (5) /* Channel Interval */
sdivarci 0:0061165683ee 104 #define DMAC_DESC_CHEXT (6) /* Channel Extension */
sdivarci 0:0061165683ee 105 #define DMAC_DESC_LINK_ADDR (7) /* Link Address */
sdivarci 0:0061165683ee 106
sdivarci 0:0061165683ee 107 /* ==== On-chip peripheral module requests ===== */
sdivarci 0:0061165683ee 108 typedef enum dmac_request_factor
sdivarci 0:0061165683ee 109 {
sdivarci 0:0061165683ee 110 DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
sdivarci 0:0061165683ee 111 DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
sdivarci 0:0061165683ee 112 DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
sdivarci 0:0061165683ee 113 DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
sdivarci 0:0061165683ee 114 DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
sdivarci 0:0061165683ee 115 DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
sdivarci 0:0061165683ee 116 DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
sdivarci 0:0061165683ee 117 DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
sdivarci 0:0061165683ee 118 } dmac_request_factor_t;
sdivarci 0:0061165683ee 119
sdivarci 0:0061165683ee 120
sdivarci 0:0061165683ee 121 /*******************************************************************************
sdivarci 0:0061165683ee 122 Exported global variables and functions (to be accessed by other files)
sdivarci 0:0061165683ee 123 *******************************************************************************/
sdivarci 0:0061165683ee 124 void usb0_function_DMAC1_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
sdivarci 0:0061165683ee 125 uint32_t request_factor, uint32_t req_direction);
sdivarci 0:0061165683ee 126 int32_t usb0_function_DMAC1_Open(uint32_t req);
sdivarci 0:0061165683ee 127 void usb0_function_DMAC1_Close(uint32_t *remain);
sdivarci 0:0061165683ee 128 void usb0_function_DMAC1_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
sdivarci 0:0061165683ee 129
sdivarci 0:0061165683ee 130 void usb0_function_DMAC2_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
sdivarci 0:0061165683ee 131 uint32_t request_factor, uint32_t req_direction);
sdivarci 0:0061165683ee 132 int32_t usb0_function_DMAC2_Open(uint32_t req);
sdivarci 0:0061165683ee 133 void usb0_function_DMAC2_Close(uint32_t *remain);
sdivarci 0:0061165683ee 134 void usb0_function_DMAC2_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
sdivarci 0:0061165683ee 135
sdivarci 0:0061165683ee 136 #ifdef __cplusplus
sdivarci 0:0061165683ee 137 }
sdivarci 0:0061165683ee 138 #endif
sdivarci 0:0061165683ee 139
sdivarci 0:0061165683ee 140 #endif /* USB0_FUNCTION_DMACDRV_H */
sdivarci 0:0061165683ee 141
sdivarci 0:0061165683ee 142 /* End of File */