S Classen
/
nrf51-sdk
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Fork of
nrf51-sdk
by 
Nordic Semiconductor
Diff: source/nordic_sdk/components/device/nrf51_bitfields.h
- Revision:
- 31:c05fa48ed560
- Parent:
- 29:286940b7ee5a
- Child:
- 32:6335323e4327
--- a/source/nordic_sdk/components/device/nrf51_bitfields.h Thu Apr 07 17:38:02 2016 +0100 +++ b/source/nordic_sdk/components/device/nrf51_bitfields.h Thu Apr 07 17:38:04 2016 +0100 @@ -5962,13 +5962,6 @@ #define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Interrupt enabled. */ #define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable interrupt on write. */ -/* Bit 4 : enable interrupt on ENDRX event. */ -#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable interrupt on write. */ - /* Bit 1 : Enable interrupt on END event. */ #define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ #define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ @@ -5986,13 +5979,6 @@ #define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Interrupt enabled. */ #define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable interrupt on write. */ -/* Bit 4 : Disable interrupt on ENDRX event. */ -#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable interrupt on write. */ - /* Bit 1 : Disable interrupt on END event. */ #define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ #define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */