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parallel.h
00001 /* 00002 * parallel.h 00003 * 00004 * ParPort driver interface 00005 * 00006 * This file is part of the w32api package. 00007 * 00008 * Contributors: 00009 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net> 00010 * 00011 * THIS SOFTWARE IS NOT COPYRIGHTED 00012 * 00013 * This source code is offered for use in the public domain. You may 00014 * use, modify or distribute it freely. 00015 * 00016 * This code is distributed in the hope that it will be useful but 00017 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY 00018 * DISCLAIMED. This includes but is not limited to warranties of 00019 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 00020 * 00021 */ 00022 00023 #ifndef __PARALLEL_H 00024 #define __PARALLEL_H 00025 00026 #if __GNUC__ >=3 00027 #pragma GCC system_header 00028 #endif 00029 00030 #ifdef __cplusplus 00031 extern "C" { 00032 #endif 00033 00034 #include "ntddk.h" 00035 #include "ntddpar.h" 00036 00037 #define DD_PARALLEL_PORT_BASE_NAME "ParallelPort" 00038 #define DD_PARALLEL_PORT_BASE_NAME_U L"ParallelPort" 00039 00040 #define IOCTL_INTERNAL_DESELECT_DEVICE \ 00041 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS) 00042 #define IOCTL_INTERNAL_GET_MORE_PARALLEL_PORT_INFO \ 00043 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS) 00044 #define IOCTL_INTERNAL_GET_PARALLEL_PNP_INFO \ 00045 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS) 00046 #define IOCTL_INTERNAL_GET_PARALLEL_PORT_INFO \ 00047 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS) 00048 #define IOCTL_INTERNAL_INIT_1284_3_BUS \ 00049 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS) 00050 #define IOCTL_INTERNAL_PARALLEL_CLEAR_CHIP_MODE \ 00051 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS) 00052 #define IOCTL_INTERNAL_PARALLEL_CONNECT_INTERRUPT \ 00053 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS) 00054 #define IOCTL_INTERNAL_PARALLEL_DISCONNECT_INTERRUPT \ 00055 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS) 00056 #define IOCTL_INTERNAL_PARALLEL_PORT_ALLOCATE \ 00057 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS) 00058 #define IOCTL_INTERNAL_PARALLEL_PORT_FREE \ 00059 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 40, METHOD_BUFFERED, FILE_ANY_ACCESS) 00060 #define IOCTL_INTERNAL_PARALLEL_SET_CHIP_MODE \ 00061 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS) 00062 #define IOCTL_INTERNAL_RELEASE_PARALLEL_PORT_INFO \ 00063 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS) 00064 #define IOCTL_INTERNAL_SELECT_DEVICE \ 00065 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS) 00066 00067 00068 typedef struct _PARALLEL_1284_COMMAND { 00069 UCHAR ID; 00070 UCHAR Port; 00071 ULONG CommandFlags; 00072 } PARALLEL_1284_COMMAND, *PPARALLEL_1284_COMMAND; 00073 00074 /* PARALLEL_1284_COMMAND.CommandFlags */ 00075 #define PAR_END_OF_CHAIN_DEVICE 0x00000001 00076 #define PAR_HAVE_PORT_KEEP_PORT 0x00000002 00077 00078 typedef struct _MORE_PARALLEL_PORT_INFORMATION { 00079 INTERFACE_TYPE InterfaceType; 00080 ULONG BusNumber; 00081 ULONG InterruptLevel; 00082 ULONG InterruptVector; 00083 KAFFINITY InterruptAffinity; 00084 KINTERRUPT_MODE InterruptMode; 00085 } MORE_PARALLEL_PORT_INFORMATION, *PMORE_PARALLEL_PORT_INFORMATION; 00086 00087 typedef NTSTATUS DDKAPI 00088 (*PPARALLEL_SET_CHIP_MODE)( 00089 /*IN*/ PVOID SetChipContext, 00090 /*IN*/ UCHAR ChipMode); 00091 00092 typedef NTSTATUS DDKAPI 00093 (*PPARALLEL_CLEAR_CHIP_MODE)( 00094 /*IN*/ PVOID ClearChipContext, 00095 /*IN*/ UCHAR ChipMode); 00096 00097 typedef NTSTATUS DDKAPI 00098 (*PPARCHIP_CLEAR_CHIP_MODE)( 00099 /*IN*/ PVOID ClearChipContext, 00100 /*IN*/ UCHAR ChipMode); 00101 00102 typedef NTSTATUS DDKAPI 00103 (*PPARALLEL_TRY_SELECT_ROUTINE)( 00104 /*IN*/ PVOID TrySelectContext, 00105 /*IN*/ PVOID TrySelectCommand); 00106 00107 typedef NTSTATUS DDKAPI 00108 (*PPARALLEL_DESELECT_ROUTINE)( 00109 /*IN*/ PVOID DeselectContext, 00110 /*IN*/ PVOID DeselectCommand); 00111 00112 /* PARALLEL_PNP_INFORMATION.HardwareCapabilities */ 00113 #define PPT_NO_HARDWARE_PRESENT 0x00000000 00114 #define PPT_ECP_PRESENT 0x00000001 00115 #define PPT_EPP_PRESENT 0x00000002 00116 #define PPT_EPP_32_PRESENT 0x00000004 00117 #define PPT_BYTE_PRESENT 0x00000008 00118 #define PPT_BIDI_PRESENT 0x00000008 00119 #define PPT_1284_3_PRESENT 0x00000010 00120 00121 typedef struct _PARALLEL_PNP_INFORMATION { 00122 PHYSICAL_ADDRESS OriginalEcpController; 00123 PUCHAR EcpController; 00124 ULONG SpanOfEcpController; 00125 ULONG PortNumber; 00126 ULONG HardwareCapabilities; 00127 PPARALLEL_SET_CHIP_MODE TrySetChipMode; 00128 PPARALLEL_CLEAR_CHIP_MODE ClearChipMode; 00129 ULONG FifoDepth; 00130 ULONG FifoWidth; 00131 PHYSICAL_ADDRESS EppControllerPhysicalAddress; 00132 ULONG SpanOfEppController; 00133 ULONG Ieee1284_3DeviceCount; 00134 PPARALLEL_TRY_SELECT_ROUTINE TrySelectDevice; 00135 PPARALLEL_DESELECT_ROUTINE DeselectDevice; 00136 PVOID Context; 00137 ULONG CurrentMode; 00138 PWSTR PortName; 00139 } PARALLEL_PNP_INFORMATION, *PPARALLEL_PNP_INFORMATION; 00140 00141 typedef BOOLEAN DDKAPI 00142 (*PPARALLEL_TRY_ALLOCATE_ROUTINE)( 00143 /*IN*/ PVOID TryAllocateContext); 00144 00145 typedef VOID DDKAPI 00146 (*PPARALLEL_FREE_ROUTINE)( 00147 /*IN*/ PVOID FreeContext); 00148 00149 typedef ULONG DDKAPI 00150 (*PPARALLEL_QUERY_WAITERS_ROUTINE)( 00151 /*IN*/ PVOID QueryAllocsContext); 00152 00153 typedef struct _PARALLEL_PORT_INFORMATION { 00154 PHYSICAL_ADDRESS OriginalController; 00155 PUCHAR Controller; 00156 ULONG SpanOfController; 00157 PPARALLEL_TRY_ALLOCATE_ROUTINE TryAllocatePort; 00158 PPARALLEL_FREE_ROUTINE FreePort; 00159 PPARALLEL_QUERY_WAITERS_ROUTINE QueryNumWaiters; 00160 PVOID Context; 00161 } PARALLEL_PORT_INFORMATION, *PPARALLEL_PORT_INFORMATION; 00162 00163 /* PARALLEL_CHIP_MODE.ModeFlags */ 00164 #define INITIAL_MODE 0x00 00165 #define PARCHIP_ECR_ARBITRATOR 0x01 00166 00167 typedef struct _PARALLEL_CHIP_MODE { 00168 UCHAR ModeFlags; 00169 BOOLEAN success; 00170 } PARALLEL_CHIP_MODE, *PPARALLEL_CHIP_MODE; 00171 00172 typedef VOID DDKAPI 00173 (*PPARALLEL_DEFERRED_ROUTINE)( 00174 /*IN*/ PVOID DeferredContext); 00175 00176 typedef struct _PARALLEL_INTERRUPT_SERVICE_ROUTINE { 00177 PKSERVICE_ROUTINE InterruptServiceRoutine; 00178 PVOID InterruptServiceContext; 00179 PPARALLEL_DEFERRED_ROUTINE DeferredPortCheckRoutine; 00180 PVOID DeferredPortCheckContext; 00181 } PARALLEL_INTERRUPT_SERVICE_ROUTINE, *PPARALLEL_INTERRUPT_SERVICE_ROUTINE; 00182 00183 00184 #define IOCTL_INTERNAL_DISCONNECT_IDLE \ 00185 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS) 00186 #define IOCTL_INTERNAL_LOCK_PORT \ 00187 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS) 00188 #define IOCTL_INTERNAL_LOCK_PORT_NO_SELECT \ 00189 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 52, METHOD_BUFFERED, FILE_ANY_ACCESS) 00190 #define IOCTL_INTERNAL_PARCLASS_CONNECT \ 00191 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS) 00192 #define IOCTL_INTERNAL_PARCLASS_DISCONNECT \ 00193 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS) 00194 #define IOCTL_INTERNAL_UNLOCK_PORT \ 00195 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS) 00196 #define IOCTL_INTERNAL_UNLOCK_PORT_NO_DESELECT \ 00197 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 53, METHOD_BUFFERED, FILE_ANY_ACCESS) 00198 00199 typedef USHORT DDKAPI 00200 (*PDETERMINE_IEEE_MODES)( 00201 /*IN*/ PVOID Context); 00202 00203 typedef enum _PARALLEL_SAFETY { 00204 SAFE_MODE, 00205 UNSAFE_MODE 00206 } PARALLEL_SAFETY; 00207 00208 typedef NTSTATUS DDKAPI 00209 (*PNEGOTIATE_IEEE_MODE)( 00210 /*IN*/ PVOID Context, 00211 /*IN*/ USHORT ModeMaskFwd, 00212 /*IN*/ USHORT ModeMaskRev, 00213 /*IN*/ PARALLEL_SAFETY ModeSafety, 00214 /*IN*/ BOOLEAN IsForward); 00215 00216 typedef NTSTATUS DDKAPI 00217 (*PTERMINATE_IEEE_MODE)( 00218 /*IN*/ PVOID Context); 00219 00220 typedef NTSTATUS DDKAPI 00221 (*PPARALLEL_IEEE_FWD_TO_REV)( 00222 /*IN*/ PVOID Context); 00223 00224 typedef NTSTATUS DDKAPI 00225 (*PPARALLEL_IEEE_REV_TO_FWD)( 00226 /*IN*/ PVOID Context); 00227 00228 typedef NTSTATUS DDKAPI 00229 (*PPARALLEL_READ)( 00230 /*IN*/ PVOID Context, 00231 /*OUT*/ PVOID Buffer, 00232 /*IN*/ ULONG NumBytesToRead, 00233 /*OUT*/ PULONG NumBytesRead, 00234 /*IN*/ UCHAR Channel); 00235 00236 typedef NTSTATUS DDKAPI 00237 (*PPARALLEL_WRITE)( 00238 /*IN*/ PVOID Context, 00239 /*OUT*/ PVOID Buffer, 00240 /*IN*/ ULONG NumBytesToWrite, 00241 /*OUT*/ PULONG NumBytesWritten, 00242 /*IN*/ UCHAR Channel); 00243 00244 typedef NTSTATUS DDKAPI 00245 (*PPARALLEL_TRYSELECT_DEVICE)( 00246 /*IN*/ PVOID Context, 00247 /*IN*/ PARALLEL_1284_COMMAND Command); 00248 00249 typedef NTSTATUS DDKAPI 00250 (*PPARALLEL_DESELECT_DEVICE)( 00251 /*IN*/ PVOID Context, 00252 /*IN*/ PARALLEL_1284_COMMAND Command); 00253 00254 typedef struct _PARCLASS_INFORMATION { 00255 PUCHAR Controller; 00256 PUCHAR EcrController; 00257 ULONG SpanOfController; 00258 PDETERMINE_IEEE_MODES DetermineIeeeModes; 00259 PNEGOTIATE_IEEE_MODE NegotiateIeeeMode; 00260 PTERMINATE_IEEE_MODE TerminateIeeeMode; 00261 PPARALLEL_IEEE_FWD_TO_REV IeeeFwdToRevMode; 00262 PPARALLEL_IEEE_REV_TO_FWD IeeeRevToFwdMode; 00263 PPARALLEL_READ ParallelRead; 00264 PPARALLEL_WRITE ParallelWrite; 00265 PVOID ParclassContext; 00266 ULONG HardwareCapabilities; 00267 ULONG FifoDepth; 00268 ULONG FifoWidth; 00269 PPARALLEL_TRYSELECT_DEVICE ParallelTryselect; 00270 PPARALLEL_DESELECT_DEVICE ParallelDeSelect; 00271 } PARCLASS_INFORMATION, *PPARCLASS_INFORMATION; 00272 00273 #ifdef __cplusplus 00274 } 00275 #endif 00276 00277 #endif /* __PARALLEL_H */
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