File content as of revision 139:78c21d98cff6:

#include "mbed.h"
#include <stdlib.h>
#include <string.h>


RawSerial pc(PA_2, PA_3, 115200);

void USART2_init(void);
void DMA1_init(void);
void DMA1_Stream6_setup(unsigned int src, unsigned int dst, int len);

int done = 1;

void send_DMA1_STEAM6_CH4(char str[], int len)
{

    char message[80];
    int i;

    USART2_init();
    DMA1_init();

    /* prepare the message for transfer */
    for (i = 0; i < len; i++)
        message[i] = str[i];

    /* send the message out by USART2 using DMA */
    while (done == 0) {}    /* wait until DMA data transfer is done */
    done = 0;               /* clear done flag */
    DMA1_Stream6_setup((unsigned int)message, (unsigned int)&USART2->DR, len);

}


int main (void)
{
    while (1) {
        int size = 0;
        char* buf = (char*)malloc(sizeof(char)*8);
        pc.printf("Enter Fibonacci number n: \r\n");
        while(true) {
            if (pc.readable()) {
                int ch = pc.getc();
                pc.putc(ch);
                if (ch == 0x0D) {
                    while(!pc.writeable());
                    pc.putc(0x0A);
                    break;
                }
                buf[size] = ch;
                size++;
            }
        }
        int val = atoi(buf);

        if(val < 0 || val > 40) {
            pc.printf("ERROR: n(%d) must be satisfied with '0 <= n <= 40'\r\n",val);
            continue;
        }

        size = val;
        int *arr = (int*)malloc(sizeof(int)*size);
        arr[0] = 0;
        arr[1] = 1;

        for(int i = 2; i < size; i++) {

            arr[i] = arr[i-1] + arr[i-2];
        }
        free(buf);

        buf = (char*)malloc(sizeof(char)*256);

        for(int i = 0; i < size; i ++) {

            char temp[64];
            sprintf(temp, "%d ", arr[i]);
            strcat(buf, temp);

            if(i%5 == 0) {
                strcat(buf, "\r\n");
            }
        }
        strcat(buf, "\r\n");

        pc.printf("buf\r\n");

        pc.printf("%s\r\n",buf);
        pc.printf("\\buf\r\n");

        char sub[8];
        int s_size = 0;
        for(int i = 0; i < strlen(buf); i++) {
            
            sub[s_size] = buf[i];
            s_size++;
            
            if(s_size % 8 == 7) {
                pc.printf("sub-buf\r\n");
                pc.printf("%s\r\n",sub);
                pc.printf("\\sub-buf\r\n");
//                send_DMA1_STEAM6_CH4(sub,s_size);
                strcpy(sub,"");
                s_size = 0;
            }
        }

        if(s_size > 0) {
                pc.printf("sub-buf\r\n");
                pc.printf("%s\r\n",sub);
                pc.printf("\\sub-buf\r\n");
//            send_DMA1_STEAM6_CH4(sub,s_size);
        }

        free(sub);
        free(buf);
        free(arr);
    }
}
void USART2_init (void)
{
    RCC->AHB1ENR |= 1;          /* enable GPIOA clock */
    RCC->APB1ENR |= 0x20000;    /* enable USART2 clock */

    /* Configure PA2 for USART2_TX */
    GPIOA->AFR[0] &= ~0x0F00;
    GPIOA->AFR[0] |=  0x0700;   /* alt7 for USART2 */
    GPIOA->MODER  &= ~0x0030;
    GPIOA->MODER  |=  0x0020;   /* enable alternate function for PA2 */

    USART2->BRR = 434;       /* 9600 baud @ 16 MHz */
    USART2->CR1 = 0x0008;       /* enable Tx, 8-bit data */
    USART2->CR2 = 0x0000;       /* 1 stop bit */
    USART2->CR3 = 0x0000;       /* no flow control */
    USART2->CR1 |= 0x2000;      /* enable USART2 */

    USART2->SR = ~0x40;         /* clear TC flag */
    USART2->CR1 |= 0x0040;      /* enable transmit complete interrupt */

    NVIC_EnableIRQ(USART2_IRQn);    /* USART2 interrupt enable at NVIC */
}

void DMA1_init(void)
{
    RCC->AHB1ENR |= 0x00200000;     /* DMA controller clock enable */
    DMA1->HIFCR = 0x003F0000;       /* clear all interrupt flags of Stream 6 */
    NVIC_EnableIRQ(DMA1_Stream6_IRQn);  /* DMA interrupt enable at NVIC */
}

void DMA1_Stream6_setup(unsigned int src, unsigned int dst, int len)
{
    DMA1_Stream6->CR &= ~1;         /* disable DMA1 Stream 6 */
    while (DMA1_Stream6->CR & 1) {} /* wait until DMA1 Stream 6 is disabled */
    DMA1->HIFCR = 0x003F0000;       /* clear all interrupt flags of Stream 6 */
    DMA1_Stream6->PAR = dst;
    DMA1_Stream6->M0AR = src;
    DMA1_Stream6->NDTR = len;
    DMA1_Stream6->CR = 0x08000000;  /* USART2_TX on DMA1 Stream6 Channel 4 */
    DMA1_Stream6->CR |= 0x00000440; /* data size byte, mem incr, mem-to-peripheral */
    DMA1_Stream6->CR |= 0x16;       /* enable interrupts DMA_IT_TC | DMA_IT_TE | DMA_IT_DME */
    DMA1_Stream6->FCR  = 0;         /* direct mode, no FIFO */
    DMA1_Stream6->CR |= 1;          /* enable DMA1 Stream 6 */

    USART2->SR &= ~0x0040;          /* clear UART transmit complete interrupt flag */
    USART2->CR3 |= 0x80;            /* enable USART2 transmitter DMA */
}

void DMA1_Stream6_IRQHandler(void)
{
    if (DMA1->HISR & 0x000C0000)    /* if an error occurred */
        while(1) {}                 /* substitute this by error handling */
    DMA1->HIFCR = 0x003F0000;       /* clear all interrupt flags of Stream 6 */
    DMA1_Stream6->CR &= ~0x10;      /* disable DMA1 Stream 6 TCIE */
}

void USART2_IRQHandler(void)
{
    USART2->SR &= ~0x0040;          /* clear transmit complete interrupt flag */
    done = 1;                       /* set the done flag */
}