z ysaito / Mbed 2 deprecated CPro_DemoB1B2_4_ResAnaCtrl

2018.08.03 1st commit of demo main res ctrl

Dependencies:   QEI mbed

mcchk.h@1:85e8e2c8f283, 2018-08-03 (annotated)

Committer:
sayzyas
Date:
Fri Aug 03 02:28:22 2018 +0000
Revision:
1:85e8e2c8f283
Parent:
0:f8373bf202a6 
2018.08.03

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sayzyas 0:f8373bf202a6 1 class mcchk
sayzyas 0:f8373bf202a6 2 {
sayzyas 0:f8373bf202a6 3 private:
sayzyas 0:f8373bf202a6 4 float m_LBCRW_center_value;
sayzyas 0:f8373bf202a6 5 float m_RFCRW_center_value;
sayzyas 0:f8373bf202a6 6 float m_LBTFM_center_value;
sayzyas 0:f8373bf202a6 7 float m_RFTFM_center_value;
sayzyas 0:f8373bf202a6 8 float m_WINCH_center_value;
sayzyas 0:f8373bf202a6 9 float m_CMPAN_center_value;
sayzyas 0:f8373bf202a6 10 float m_CTILT_center_value;
sayzyas 0:f8373bf202a6 11
sayzyas 0:f8373bf202a6 12 int8_t flg_mclock_LBCRW; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 13 int8_t flg_mclock_RFCRW; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 14 int8_t flg_mclock_LBTFM; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 15 int8_t flg_mclock_RFTFM; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 16 int8_t flg_mclock_CMPAN; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 17 int8_t flg_mclock_CTILT; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 18 int8_t flg_mclock_WINCH; // bit0: forward, bit1: reverse
sayzyas 0:f8373bf202a6 19
sayzyas 0:f8373bf202a6 20 public:
sayzyas 0:f8373bf202a6 21
sayzyas 0:f8373bf202a6 22 int8_t cnt_mclock_LBCRW_f; // motor lock counter
sayzyas 0:f8373bf202a6 23 int8_t cnt_mclock_LBCRW_r; // motor lock counter
sayzyas 0:f8373bf202a6 24 int8_t cnt_mclock_RFCRW_f; // motor lock counter
sayzyas 0:f8373bf202a6 25 int8_t cnt_mclock_RFCRW_r; // motor lock counter
sayzyas 0:f8373bf202a6 26 int8_t cnt_mclock_LBTFM_f; // motor lock counter
sayzyas 0:f8373bf202a6 27 int8_t cnt_mclock_LBTFM_r; // motor lock counter
sayzyas 0:f8373bf202a6 28 int8_t cnt_mclock_RFTFM_f; // motor lock counter
sayzyas 0:f8373bf202a6 29 int8_t cnt_mclock_RFTFM_r; // motor lock counter
sayzyas 0:f8373bf202a6 30 int8_t cnt_mclock_CMPAN_f; // motor lock counter
sayzyas 0:f8373bf202a6 31 int8_t cnt_mclock_CMPAN_r; // motor lock counter
sayzyas 0:f8373bf202a6 32 int8_t cnt_mclock_CTILT_f; // motor lock counter
sayzyas 0:f8373bf202a6 33 int8_t cnt_mclock_CTILT_r; // motor lock counter
sayzyas 0:f8373bf202a6 34 int8_t cnt_mclock_WINCH_f; // motor lock counter
sayzyas 0:f8373bf202a6 35 int8_t cnt_mclock_WINCH_r; // motor lock counter
sayzyas 0:f8373bf202a6 36
sayzyas 0:f8373bf202a6 37
sayzyas 0:f8373bf202a6 38 int16_t mc_th_LBCRW_f;
sayzyas 0:f8373bf202a6 39 int16_t mc_th_LBCRW_r;
sayzyas 0:f8373bf202a6 40 int16_t mc_th_RFCRW_f;
sayzyas 0:f8373bf202a6 41 int16_t mc_th_RFCRW_r;
sayzyas 0:f8373bf202a6 42 int16_t mc_th_LBTFM_f;
sayzyas 0:f8373bf202a6 43 int16_t mc_th_LBTFM_r;
sayzyas 0:f8373bf202a6 44 int16_t mc_th_RFTFM_f;
sayzyas 0:f8373bf202a6 45 int16_t mc_th_RFTFM_r;
sayzyas 0:f8373bf202a6 46 int16_t mc_th_WINCH_f;
sayzyas 0:f8373bf202a6 47 int16_t mc_th_WINCH_r;
sayzyas 0:f8373bf202a6 48 int16_t mc_th_CMPAN_f;
sayzyas 0:f8373bf202a6 49 int16_t mc_th_CMPAN_r;
sayzyas 0:f8373bf202a6 50 int16_t mc_th_CTILT_f;
sayzyas 0:f8373bf202a6 51 int16_t mc_th_CTILT_r;
sayzyas 0:f8373bf202a6 52
sayzyas 0:f8373bf202a6 53 int32_t mc_abs_pct;
sayzyas 0:f8373bf202a6 54
sayzyas 0:f8373bf202a6 55 float _cnt_now;
sayzyas 0:f8373bf202a6 56 float _cnt_center;
sayzyas 0:f8373bf202a6 57 int _cnt_th;
sayzyas 0:f8373bf202a6 58
sayzyas 0:f8373bf202a6 59 bool motor_lock_flg;
sayzyas 0:f8373bf202a6 60
sayzyas 0:f8373bf202a6 61 mcchk();
sayzyas 0:f8373bf202a6 62 void set_init_mc( int );
sayzyas 0:f8373bf202a6 63 bool rdnchk_motorCurrent( int8_t, int8_t, int8_t );
sayzyas 0:f8373bf202a6 64 bool chk_motor_lock( float, float, int );
sayzyas 0:f8373bf202a6 65 float mcchk::rd_motorCurrent( int no );
sayzyas 0:f8373bf202a6 66 };