OV7670 + 23LC1024 + Bluetooth
Dependencies: FastPWM MODSERIAL mbed
spi_ram/spi_ram.cpp@2:a7f5fa80a385, 2013-07-23 (annotated)
- Committer:
- sampullman
- Date:
- Tue Jul 23 06:36:50 2013 +0000
- Revision:
- 2:a7f5fa80a385
- Parent:
- 1:6e4d2cff76e8
Fixed OV7670.cpp file name
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sampullman | 1:6e4d2cff76e8 | 1 | #include "spi_ram.h" |
sampullman | 1:6e4d2cff76e8 | 2 | |
sampullman | 1:6e4d2cff76e8 | 3 | SRAM::SRAM(SPI& spiDef, PinName csiPin) : spi(spiDef), csi(csiPin) { |
sampullman | 1:6e4d2cff76e8 | 4 | deselect(); |
sampullman | 1:6e4d2cff76e8 | 5 | } |
sampullman | 1:6e4d2cff76e8 | 6 | |
sampullman | 1:6e4d2cff76e8 | 7 | void SRAM::select() { |
sampullman | 1:6e4d2cff76e8 | 8 | csi = 0; |
sampullman | 1:6e4d2cff76e8 | 9 | } |
sampullman | 1:6e4d2cff76e8 | 10 | |
sampullman | 1:6e4d2cff76e8 | 11 | void SRAM::deselect() { |
sampullman | 1:6e4d2cff76e8 | 12 | csi = 1; |
sampullman | 1:6e4d2cff76e8 | 13 | } |
sampullman | 1:6e4d2cff76e8 | 14 | |
sampullman | 1:6e4d2cff76e8 | 15 | void SRAM::writeStatus(char status) { |
sampullman | 1:6e4d2cff76e8 | 16 | select(); |
sampullman | 1:6e4d2cff76e8 | 17 | spi.write(WRITE_STATUS); |
sampullman | 1:6e4d2cff76e8 | 18 | spi.write(status); |
sampullman | 1:6e4d2cff76e8 | 19 | deselect(); |
sampullman | 1:6e4d2cff76e8 | 20 | } |
sampullman | 1:6e4d2cff76e8 | 21 | |
sampullman | 1:6e4d2cff76e8 | 22 | char SRAM::readStatus() { |
sampullman | 1:6e4d2cff76e8 | 23 | select(); |
sampullman | 1:6e4d2cff76e8 | 24 | spi.write(READ_STATUS); |
sampullman | 1:6e4d2cff76e8 | 25 | char result = (char)spi.write(0); |
sampullman | 1:6e4d2cff76e8 | 26 | deselect(); |
sampullman | 1:6e4d2cff76e8 | 27 | return result; |
sampullman | 1:6e4d2cff76e8 | 28 | } |
sampullman | 1:6e4d2cff76e8 | 29 | |
sampullman | 1:6e4d2cff76e8 | 30 | void SRAM::prepareCommand(char command, int address) { |
sampullman | 1:6e4d2cff76e8 | 31 | select(); |
sampullman | 1:6e4d2cff76e8 | 32 | spi.write(command); |
sampullman | 1:6e4d2cff76e8 | 33 | spi.write(address >> 16); |
sampullman | 1:6e4d2cff76e8 | 34 | spi.write((address >> 8) & 0xFF); |
sampullman | 1:6e4d2cff76e8 | 35 | spi.write(address & 0xFF); |
sampullman | 1:6e4d2cff76e8 | 36 | } |
sampullman | 1:6e4d2cff76e8 | 37 | |
sampullman | 1:6e4d2cff76e8 | 38 | void SRAM::startWriteSequence() { |
sampullman | 1:6e4d2cff76e8 | 39 | select(); |
sampullman | 1:6e4d2cff76e8 | 40 | writeStatus(SEQUENTIAL_MODE); |
sampullman | 1:6e4d2cff76e8 | 41 | prepareCommand(WRITE, 0); |
sampullman | 1:6e4d2cff76e8 | 42 | } |
sampullman | 1:6e4d2cff76e8 | 43 | |
sampullman | 1:6e4d2cff76e8 | 44 | void SRAM::writeSequence0(char c) { |
sampullman | 1:6e4d2cff76e8 | 45 | while (!(LPC_SSP0->SR & TNF)); // While TNF-Bit = 0, wait for FIFO |
sampullman | 1:6e4d2cff76e8 | 46 | LPC_SSP0->DR = c; // Write to FIFO buffer |
sampullman | 1:6e4d2cff76e8 | 47 | while( !(LPC_SSP0->SR & RNE)); |
sampullman | 1:6e4d2cff76e8 | 48 | uint8_t v = LPC_SSP0->DR; |
sampullman | 1:6e4d2cff76e8 | 49 | } |
sampullman | 1:6e4d2cff76e8 | 50 | |
sampullman | 1:6e4d2cff76e8 | 51 | void SRAM::writeSequence1(char c) { |
sampullman | 1:6e4d2cff76e8 | 52 | while (!(LPC_SSP1->SR & TNF)); // While TNF-Bit = 0, wait for FIFO |
sampullman | 1:6e4d2cff76e8 | 53 | LPC_SSP1->DR = c; // Write to FIFO buffer |
sampullman | 1:6e4d2cff76e8 | 54 | while( !(LPC_SSP1->SR & RNE)); |
sampullman | 1:6e4d2cff76e8 | 55 | uint8_t v = LPC_SSP1->DR; |
sampullman | 1:6e4d2cff76e8 | 56 | } |
sampullman | 1:6e4d2cff76e8 | 57 | |
sampullman | 1:6e4d2cff76e8 | 58 | void SRAM::startReadSequence() { |
sampullman | 1:6e4d2cff76e8 | 59 | select(); |
sampullman | 1:6e4d2cff76e8 | 60 | writeStatus(SEQUENTIAL_MODE); |
sampullman | 1:6e4d2cff76e8 | 61 | prepareCommand(READ, 0); |
sampullman | 1:6e4d2cff76e8 | 62 | } |
sampullman | 1:6e4d2cff76e8 | 63 | |
sampullman | 1:6e4d2cff76e8 | 64 | char SRAM::readSequence0() { |
sampullman | 1:6e4d2cff76e8 | 65 | while (!(LPC_SSP0->SR & TNF)); // While TNF-Bit = 0, wait for FIFO |
sampullman | 1:6e4d2cff76e8 | 66 | LPC_SSP0->DR = 0; // Write to FIFO buffer |
sampullman | 1:6e4d2cff76e8 | 67 | while( !(LPC_SSP0->SR & RNE)); |
sampullman | 1:6e4d2cff76e8 | 68 | return LPC_SSP0->DR; |
sampullman | 1:6e4d2cff76e8 | 69 | } |
sampullman | 1:6e4d2cff76e8 | 70 | |
sampullman | 1:6e4d2cff76e8 | 71 | char SRAM::readSequence1() { |
sampullman | 1:6e4d2cff76e8 | 72 | while (!(LPC_SSP1->SR & TNF)); // While TNF-Bit = 0, wait for FIFO |
sampullman | 1:6e4d2cff76e8 | 73 | LPC_SSP1->DR = 0; // Write to FIFO buffer |
sampullman | 1:6e4d2cff76e8 | 74 | while( !(LPC_SSP1->SR & RNE)); |
sampullman | 1:6e4d2cff76e8 | 75 | return LPC_SSP1->DR; |
sampullman | 1:6e4d2cff76e8 | 76 | } |
sampullman | 1:6e4d2cff76e8 | 77 | |
sampullman | 1:6e4d2cff76e8 | 78 | void SRAM::stopSequence() { |
sampullman | 1:6e4d2cff76e8 | 79 | deselect(); |
sampullman | 1:6e4d2cff76e8 | 80 | writeStatus(BYTE_MODE); |
sampullman | 1:6e4d2cff76e8 | 81 | } |