CDMS_CODE_samp_23SEP_DMA_flag

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of CDMS_CODE_samp_23SEP_DMA by iitm sat

Revision:
248:407ab7e337cd
Parent:
235:c127b15409b2
Child:
249:1560c64adffb
--- a/FMS_all.h	Wed Jul 06 08:09:22 2016 +0000
+++ b/FMS_all.h	Fri Jul 08 12:53:24 2016 +0000
@@ -1,4 +1,5 @@
 
+/*===================================================FMS Functions=================================================*/
 //Run processes
 void P_PL_INIT();
 void P_PL_MAIN();
@@ -27,7 +28,7 @@
 void SW_RST_PL_BEE();
 void RST_BAE();
 void RST_PL_BEE();
-void CDMS_INTERNAL_RESET();
+void CDMS_RESET();
 void SYS_PWR_RESET();  // Have to be decided with EPS team.
 void EPS_V_A_EN();
 void EPS_V_C_EN();
@@ -36,7 +37,7 @@
 uint8_t CDMS_RD_SD_HK(uint8_t *);
 void CDMS_RD_RTC(uint64_t *);
 void CDMS_CALIB_RTC();
-void CDMS_RESET();
+void TOTAL_RESET_WITH_CDMS();
 
 
 void P_PL_INIT()
@@ -46,7 +47,7 @@
 
 void P_PL_MAIN()
 {
-   // FCTN_CDMS_PL_MAIN((void *)NULL);
+   FCTN_CDMS_PL_MAIN((void *)NULL);
 }
 
 void P_COM_INIT()
@@ -81,12 +82,23 @@
 
 void CDMS_RTC_ON()
 {
-    
+    //FCTN_CDMS_INIT_RTC();
+    SPI_mutex.lock();
+    gCS_RTC=1;
+    gCS_RTC=0;
+    spi.write(0x81); //register address with write flag
+    spi.write(0x00);//disabling stop bit in the seconds register
+    SPI_mutex.unlock();
 }
 
 void CDMS_RTC_OFF()
 {
-    
+    SPI_mutex.lock();
+    gCS_RTC=1;
+    gCS_RTC=0;
+    spi.write(0x81); //register address with write flag
+    spi.write(0x80);//enabling stop bit in the seconds register
+    SPI_mutex.unlock();
 }
 
 void SW_ON_BAE()
@@ -262,4 +274,16 @@
 {
     
 }
-*/
\ No newline at end of file
+*/
+
+
+/*===================================================MMS Functions=================================================*/
+
+void READ_RAM(uint8_t *);
+void WRITE_TO_FLASH();
+void READ_FLASH();
+
+void READ_RAM(uint8_t *RAM)
+{
+    
+}
\ No newline at end of file