samp Srinivasan / Mbed 2 deprecated CDMS_CODE_FROM13JAN2017

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

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i2c.h

00001 #define tm_len 134
00002 #define tc_len 135
00003 #define tc_test_len 135
00004 
00005 const int addr = 0x20;                                            //slave address 
00006 bool write_ack = false;
00007 bool read_ack = false;
00008 const int addr_pl = 0x20<<1;  //PL address
00009 const int addr_bae = 0x20; ///bae address
00010 //uint8_t rcv_isr = 0;
00011 
00012 int count = 0;
00013 
00014 char PL_I2C_DATA[134];//Payload i2c array
00015 uint8_t PL_TM_SIZE;//size of data to bev read from i2c
00016 uint32_t pdirr1;
00017 uint32_t pdirw1;
00018 
00019 void I2C_busreset()
00020 {
00021     PORTE->PCR[1] &= 0xfffffffb;    //Enabling high slew rates for SDA and SCL lines
00022     PORTE->PCR[0] &= 0xfffffffb;    //Enabling high slew rates for SDA and SCL lines
00023     I2C0->C1 &= 0x7f;               //Disabling I2C module
00024     SIM->SCGC4 &= 0xffffffbf;       //Disabling clock to I2C module
00025     SIM->SCGC4 |= 0x00000040;       //Enabling clock to I2C module
00026     I2C0->C1 |= 0x80;               //Enabling I2C module
00027     PORTE->PCR[1] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
00028     PORTE->PCR[0] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
00029     Thread::wait(1);                //Wait for all I2C registers to be updates to their their values
00030 }
00031 bool FCTN_I2C_READ_PL(char *data,int length)       // Returns 0 for success
00032 {    
00033     PL_I2C_GPIO = 1;
00034     read_ack = master.read(addr_pl|1,data,length);
00035     Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
00036     pdirr1=PTE->PDIR;
00037     uint8_t i2c_count = 0;    
00038     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
00039     {
00040         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
00041         {
00042             Thread::wait(1);
00043             pdirr1=PTE->PDIR;
00044             i2c_count++;
00045         }
00046         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
00047         {    
00048             gPC.printf("\n\rData received from PL");
00049         }
00050         else 
00051         {            
00052             I2C_busreset();
00053             read_ack = 1;
00054         }
00055     }
00056     else if (read_ack == 1)
00057     {
00058         CDMS_I2C_ERR_SPEED_COUNTER++;
00059         I2C_busreset();
00060     }
00061     
00062     PL_I2C_GPIO = 0;
00063     i2c_count = 0;
00064     return read_ack;
00065     
00066     
00067 }
00068 bool FCTN_I2C_WRITE_PL(char *data2,uint8_t tc_len2)       // Returns 0 for success
00069 {
00070     write_ack = master.write(addr_pl|0x00,data2,tc_len2);//address to be defined in payload    
00071     Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
00072     pdirw1=PTE->PDIR;
00073     uint8_t i2c_count = 0;
00074     if(write_ack == 0)
00075     {
00076         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
00077         {
00078             Thread::wait(1);
00079             pdirw1=PTE->PDIR;
00080             i2c_count++;
00081         }
00082         if(((pdirw1 & 0x03000000)==0x03000000))
00083         {
00084             gPC.printf("\n\r Data sent");        
00085         }
00086         else
00087         {
00088             I2C_busreset();
00089             write_ack = 1;
00090         }
00091     }      
00092     if (write_ack == 1)
00093     {
00094         I2C_busreset();
00095         CDMS_I2C_ERR_SPEED_COUNTER++;
00096     }
00097     i2c_count = 0;
00098     return write_ack;
00099 }
00100 bool FCTN_I2C_READ(char *data,int length)       // Returns 0 for success
00101 {   
00102  //   gPC.printf("i2C_rd\r\n");
00103     CDMS_I2C_GPIO = 1;
00104     read_ack = master.read(addr_bae|1,data,length);
00105     Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
00106     pdirr1=PTE->PDIR;
00107     uint8_t i2c_count = 0;    
00108     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
00109     {
00110         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
00111         {
00112             Thread::wait(1);
00113             pdirr1=PTE->PDIR;
00114             i2c_count++;
00115         }
00116         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
00117         {    
00118             //gPC.printf("\n\rData received from BAE");
00119         }
00120         else 
00121         {            
00122             I2C_busreset();
00123             read_ack = 1;
00124         }
00125     }
00126     else if (read_ack == 1)
00127     {
00128         I2C_busreset();
00129         CDMS_I2C_ERR_BAE_COUNTER++;
00130         
00131     }
00132  //  gPC.printf("end_12c_RD_\r\n");
00133     CDMS_I2C_GPIO = 0;
00134     i2c_count = 0;
00135     return read_ack;
00136 }
00137 
00138 bool FCTN_I2C_WRITE(char *data,int tc_len2)       // Returns 0 for success
00139 {    
00140    //  gPC.printf("i2C_wr\r\n");
00141     CDMS_I2C_GPIO = 1;
00142     write_ack = master.write(addr_bae|0x00,data,tc_len2);    
00143     Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
00144     pdirw1=PTE->PDIR;
00145     uint8_t i2c_count = 0;
00146     if(write_ack == 0)
00147     {
00148         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
00149         {
00150             Thread::wait(1);
00151             pdirw1=PTE->PDIR;
00152             i2c_count++;
00153         }
00154         if(((pdirw1 & 0x03000000)==0x03000000))
00155         {
00156             //gPC.printf("\n\r Data sent");        
00157         }
00158         else
00159         {
00160             I2C_busreset();
00161             write_ack = 1;
00162         }
00163     }      
00164     if (write_ack == 1)
00165     {
00166         I2C_busreset();
00167         CDMS_I2C_ERR_BAE_COUNTER++;
00168     }
00169   //   gPC.printf("i2C_wr_end\r\n");
00170     CDMS_I2C_GPIO = 0;
00171     i2c_count = 0;
00172     return write_ack;
00173 }