adf.h

00001 //without reset feature , with state checks.
00002 
00003 #ifndef ADF_H    // To make sure you don't declare the function more than once by including the header multiple times.
00004 #define ADF_H
00005 
00006 InterruptIn IRQ(ADF_IRQ);
00007 //Ticker ticker;
00008 #include "OBSRS.h" 
00009 bool loop_on;
00010 bool ADF_off;
00011 bool buffer_state;
00012 bool finish_write_data;
00013 uint8_t signal = 0x00;
00014 unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xFB,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,/*PA Level Byte*/0x57/*PA Parameters*/,0x08/*GMSK_modulation*/,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x20,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x00,0x10,0x04,0x00,0x00,0x00,0x00,0x00};
00015 bool data_irq_err=0;
00016 bool data_err= false;
00017 unsigned char temp_byte=0x00;
00018 unsigned char data_err1[112];
00019 unsigned char data_err_cnt=0;
00020 unsigned int byte_count =0;
00021 #define DATA_ERR_THRS 20
00022 bool rolling_buffer_settings_error=true;
00023 bool bbram_write_success=true;
00024 int bbram_err_cnt=0;
00025 int rbp_err_cnt=0;
00026 bool reset_flag=false;
00027 #define RBP_THRS 4
00028 bool quit_configuration=false;
00029 bool power_reset_flag=false;
00030 unsigned int power_reset_count=0;
00031 bool Configuration_done=false;
00032 #define HW_THRS 2
00033 bool hw_reset_flag = false;
00034 uint8_t firstbyte;
00035 uint8_t secondbyte;
00036 unsigned char buffer_112[112];
00037 //ADF temperature reading
00038 #define temp_correction_value 0
00039 
00040 #define TRANSMIT_LEN_1 0xFF
00041 #define TRANSMIT_LEN_2 0xFF
00042 /***/
00043 Timer T;
00044  
00045 #define START_ADDRESS 0x020;
00046 #define MISO_PIN PTE3
00047 /**************Defining Counter Limits**************/
00048 #define THRS 20
00049 #define STATE_ERR_THRS 20
00050 #define PHY_OFF_EXEC_TIME 300
00051 #define PHY_ON_EXEC_TIME 300
00052 #define PHY_TX_EXEC_TIME 600
00053 /******DEFINING COMMANDS*********/
00054 #define CMD_HW_RESET 0xC8
00055 #define CMD_PHY_ON 0xB1
00056 #define CMD_PHY_OFF 0xB0
00057 #define CMD_PHY_TX 0xB5
00058 #define CMD_CONFIG_DEV 0xBB
00059 /**STATES**/
00060 //=======================
00061 #define PHY_OFF 0xB1
00062 #define PHY_ON 0xB2
00063 #define PHY_TX 0xB4
00064 #define BUSY 0x00
00065 //===================================================
00066 
00067 #define POWER_RESET_THRS 2
00068 #define HW_RESET_THRS 2
00069 
00070 unsigned int Adf_data_counter=0;
00071 unsigned char status =0;
00072 unsigned int cmd_err_cnt=0;
00073 unsigned int data_length;
00074 unsigned int state_err_cnt=0;
00075 unsigned int miso_err_cnt=0;
00076 unsigned int hw_reset_err_cnt=0;
00077 unsigned int counter =0;
00078 bool temp_return = 0;
00079 bool bcn_flag=0;
00080 bool bbram_flag=0;
00081 bool last_buffer =0;
00082 bool stop_transmission=false;
00083 
00084 #define reset_flags {\
00085 finish_write_data = false;\
00086 buffer_state = true;\
00087 last_buffer = false;\
00088 loop_on = true;\
00089 ADF_off = false;\
00090 buffer_state = true;\
00091 loop_on = true;\
00092 ADF_off = false;\
00093 /*sent_tmfrom_SDcard = false;*/\
00094 Adf_data_counter=0;\
00095 status =0;\
00096 cmd_err_cnt=0;\
00097 data_length;\
00098 state_err_cnt=0;\
00099 miso_err_cnt=0;\
00100 hw_reset_err_cnt=0;\
00101 counter =0;\
00102 bcn_flag=0;\
00103 bbram_flag=0;\
00104 stop_transmission=false;\
00105     }
00106 
00107 
00108 int err_arr[64];
00109 bool bbram_err=false;
00110 int err_idx=-1;
00111 int err[64];
00112 #define bbram_check gCS_ADF=0;\
00113     for(int i=0;i<64;i++){\
00114         err_arr[i]=0;\
00115         }\
00116     for(int i=0;i<64;i++){\
00117         err[i]=0;\
00118         }\
00119     bbram_err=false;\
00120     gCS_ADF=0;\
00121     spi.write(0x39);\
00122     spi.write(0x00);\
00123     spi.write(0xFF);\
00124     for(int i=0;i<64;i++){\
00125         err_arr[i]=spi.write(0xFF);\
00126         if(err_arr[i]!=bbram_buffer[i+2]){\
00127             err[i]=1;\
00128             bbram_err=true;\
00129             }\
00130     }\
00131     gCS_ADF=1;\
00132     if(!bbram_err)\
00133         /*gPC.printf("BBRAM verified \r\n")*/;\
00134     else\
00135         gPC.printf("BBRAM error \r\n");\
00136  
00137 
00138 bool tx_loop=1;
00139 
00140 #define PRNT_ONCE {\
00141     gPC.printf("%d %d lol_ what?\r\n",segment_len,EOS_len);\
00142     }
00143  
00144 #define bbram_write {\
00145     gCS_ADF=0;\
00146     spi.write(0xB0);\
00147     wait_us(300);\
00148     gCS_ADF=1;\
00149     gCS_ADF=0;\
00150     for(int i=0;i<66;i++){\
00151         spi.write(bbram_buffer[i]);\
00152     }\
00153     gCS_ADF=1;\
00154 }
00155 //------------------------------------------------------------------------
00156 // state checking functions
00157 //bool assrt_phy_off( int, int, int);
00158 //bool assrt_phy_on( int,int,int);
00159 //bool assrt_phy_tx(int,int,int);
00160 
00161 #define check_status {\
00162     unsigned char stat=0;\
00163     gCS_ADF=0;\
00164     spi.write(0xFF);\
00165     stat = spi.write(0xFF);\
00166     gCS_ADF=1;\
00167     status = stat;\
00168 }
00169 /***********************/
00170 /**********Restart ADF**************/
00171 
00172 /**************************/
00173 
00174 /*CMD_VAR*/
00175 bool cmd_bit=true;
00176 bool cmd_err_flag=false;
00177 unsigned char command = 0x00;
00178 void CMD(uint8_t command) {
00179     cmd_err_cnt=0;
00180     cmd_err_flag=false;
00181     while(cmd_err_cnt<3) {
00182         check_status;
00183         cmd_bit=status&0x20;
00184         if(cmd_bit) {
00185             gCS_ADF=0;
00186             spi.write(command);
00187             gCS_ADF=1;
00188             break;
00189         } else {
00190             wait_us(5);
00191             cmd_err_cnt++;
00192         }
00193     }
00194     if(cmd_err_cnt==3) {
00195         cmd_err_flag=true;
00196     }
00197 }
00198 
00199 // all three arguments are int
00200 #define assrt_phy_off {\
00201     int state_err_cnt = 0;\
00202     CMD(CMD_PHY_OFF);\
00203     if(cmd_err_flag){\
00204         temp_return=1;\
00205         }\
00206     else{\
00207         for(int i = 0 ; i < 40 ;i++){\
00208             CMD(CMD_PHY_OFF);\
00209             check_status;\
00210             if(status == PHY_OFF){\
00211                 temp_return = 0;\
00212             break;\
00213             }\
00214             else if(state_err_cnt>THRS){\
00215                 temp_return = 1;\
00216             break;\
00217             }\
00218             else {\
00219                 wait_ms(1);\
00220             }\
00221         }\
00222     }\
00223 }
00224 
00225 bool dummy_digitalOut_1=0;
00226 #define power_reset{\
00227     dummy_digitalOut_1=0;\
00228     wait_ms(10);\
00229     dummy_digitalOut_1=1;\
00230     power_reset_flag=false;\
00231     power_reset_count++;\
00232     wait_ms(10);\
00233     }\
00234 
00235 void get_temp_and_txcurr(){
00236 /*ADF Temperature reading*/;
00237                 gCS_ADF=0;
00238                 spi.write(0x1B);
00239                 spi.write(0x24);
00240                 spi.write(0x10);
00241                 gCS_ADF=1;
00242                 gCS_ADF=0;
00243                 spi.write(0x1B);
00244                 spi.write(0x25);
00245                 spi.write(0x02);
00246                 gCS_ADF=1;
00247                 gCS_ADF=0;
00248                 spi.write(0x1B);
00249                 spi.write(0x59);
00250                 spi.write(0x08);
00251                 gCS_ADF=1;
00252 
00253                 gCS_ADF=0;
00254                 spi.write(0x3B);
00255                 spi.write(0x27);
00256                 spi.write(0xFF);
00257                 secondbyte = spi.write(0xFF);
00258                 gCS_ADF=1;
00259                 gCS_ADF=0;
00260                 spi.write(0x3B);
00261                 spi.write(0x28);
00262                 spi.write(0xFF);
00263                 firstbyte = spi.write(0xFF);
00264                 gCS_ADF=1;
00265                 gCS_ADF=0;
00266                 spi.write(0x3B);
00267                 spi.write(0x27);
00268                 spi.write(0xFF);
00269                 secondbyte = spi.write(0xFF);
00270                 gCS_ADF=1;
00271                 
00272                 COM_ADF_TMP = firstbyte & 0x03;
00273                 COM_ADF_TMP |= secondbyte & 0xfc;
00274                 COM_ADF_TMP = 0.9474*(COM_ADF_TMP - 28) +28.2;
00275                 
00276                 gPC.printf("\n\rCOM_ADF_TMP : %d \n",COM_ADF_TMP);
00277                 /*uint8_t txcurr = (3.3*COM_TX_OC_FAULT)/(0.05)*100;*///    ID_current
00278                 
00279                 
00280                 
00281     }
00282     
00283 void get_com_oc_sw_status()
00284 {
00285     COM_OC_SET = 1;
00286     if (COM_TX_OC_FAULT){\
00287          com_oc_sw_status = 0x1;\
00288     }\
00289     else{\
00290         com_oc_sw_status = 0;\
00291     }\
00292 } 
00293 
00294 bool hardware_reset(int bcn_call)
00295 {
00296      if(hw_reset_err_cnt>HW_RESET_THRS){
00297         power_reset_flag=true;
00298         power_reset;
00299         return 0;
00300     }
00301     
00302     for(int i= 0; i < 2 ; i++) {
00303         gCS_ADF=0;
00304         spi.write(CMD_HW_RESET);
00305         gCS_ADF=1;
00306         wait_ms(2);// Typically 1 ms
00307         int count=0;
00308         temp_return = 0;
00309         while(count<10 && miso_err_cnt<10) {
00310             if(MISO_PIN) {
00311 //                assrt_phy_off;
00312 /*asseert_phyoff Starts**/
00313 {\
00314     int state_err_cnt = 0;\
00315     CMD(CMD_PHY_OFF);\
00316     if(cmd_err_flag){\
00317         temp_return=1;\
00318         }\
00319     else{\
00320         for(int i = 0 ; i < 40 ;i++){\
00321             CMD(CMD_PHY_OFF);\
00322             check_status;\
00323             if(status == PHY_OFF){\
00324                 temp_return = 0;\
00325             break;\
00326             }\
00327             else if(state_err_cnt>THRS){\
00328                 temp_return = 1;\
00329             break;\
00330             }\
00331             else {\
00332                 wait_ms(1);\
00333             }\
00334         }\
00335     }\
00336 }\
00337 /*Assert_phy_off_ends*/
00338 
00339 
00340 
00341 
00342 
00343                 if(!temp_return){
00344                     return 0;
00345                 }
00346                 count++;
00347             } else {
00348                 wait_us(50);
00349                 miso_err_cnt++;
00350             }
00351         }
00352     }
00353     return 1;
00354 }
00355 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
00356 //----------------------------------------------------------------------------
00357 unsigned char temp;
00358 bool reg_err;
00359 int reg_err_cnt;
00360 #define REG_ERR_THRS 5
00361 #define reg_check(addr1,addr2,reg_val){\
00362  gCS_ADF=0;\
00363         reg_err=false;\
00364         spi.write(addr1);\
00365         spi.write(addr2);\
00366         spi.write(0xFF);\
00367         temp = spi.write(0xFF);\
00368         if(temp==reg_val)\
00369             reg_err = false;\
00370         else\
00371             reg_err=true;\
00372     gCS_ADF=1;\
00373 }
00374 
00375 #define initiate {\
00376     gCS_ADF=0;\
00377     spi.write(0xFF);\
00378     spi.write(0xFF);\
00379     gCS_ADF=1;\
00380     reg_err=true;\
00381     for(reg_err_cnt=0;reg_err_cnt<REG_ERR_THRS && reg_err;reg_err_cnt++){\
00382         gCS_ADF=0;\
00383         spi.write(0x08);\
00384         spi.write(0x14);\
00385         spi.write(TRANSMIT_LEN_1);\
00386         gCS_ADF=1;\
00387         reg_check(0x28,0x14,TRANSMIT_LEN_1);\
00388     }\
00389     if(reg_err)\
00390         gPC.printf("Reg_err_ignored %x \r\n",(int)temp);\
00391     else\
00392         /*gPC.printf("reg written successful %x \r\n",(int)temp)*/;\
00393     reg_err=true;\
00394     for(reg_err_cnt=0;reg_err_cnt<REG_ERR_THRS && reg_err;reg_err_cnt++){\
00395         gCS_ADF=0;\
00396         spi.write(0x08);\
00397         spi.write(0x15);\
00398         spi.write(TRANSMIT_LEN_2);\
00399         gCS_ADF=1;\
00400         reg_check(0x28,0x15,TRANSMIT_LEN_2);\
00401     }\
00402     if(reg_err)\
00403         gPC.printf("Reg_err_ignored %x \r\n",(int)temp);\
00404     else\
00405         gPC.printf("reg written successful %x \r\n",(int)temp);\
00406 }
00407 
00408 #define write_data {\
00409     counter++;\
00410     if(counter==584){\
00411         finish_write_data=true;\
00412         restart_adf_flag=true;\
00413         counter=0;\
00414         }\
00415     gCS_ADF=0;\
00416         spi.write(0x0B);\
00417         spi.write(0x36);\
00418         spi.write(0xFF);\
00419     gCS_ADF=1;\
00420     data_err_cnt=0;\
00421     data_err=true;\
00422     while(data_err && (data_err_cnt<DATA_ERR_THRS)){\
00423         gCS_ADF=0;\
00424         if(buffer_state){\
00425             spi.write(0x18);\
00426             spi.write(0x20);\
00427             for(unsigned char i=0; i<112;i++){\
00428                     spi.write(buffer_112[i]);\
00429                     /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
00430             }\
00431         }\
00432         else{\
00433             spi.write(0x18);\
00434             spi.write(0x90);\
00435             for(unsigned char i=0; i<112;i++){\
00436                     spi.write(buffer_112[i]);\
00437                 /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
00438             }\
00439         }\
00440         gCS_ADF=1;\
00441         wait_us(5);\
00442         data_err=false;\
00443         gCS_ADF=0;\
00444         spi.write(0x38);\
00445         if(buffer_state){\
00446             spi.write(0x20);\
00447             }\
00448         else{\
00449             spi.write(0x90);\
00450             }\
00451         spi.write(0xFF);\
00452         for(unsigned char i=0; i<112;i++){\
00453             temp_byte=spi.write(0xFF);\
00454             if(buffer_112[i]!=temp_byte){\
00455                 data_err1[i]=1;\
00456                 data_err=true;\
00457                 }\
00458         }\
00459     gCS_ADF=1;\
00460     /*SPI_mutex.unlock();*/\
00461     if(data_err==false){\
00462     buffer_state = !buffer_state;\
00463     }\
00464     data_err_cnt++;\
00465     if(last_buffer){\
00466         finish_write_data = true;\
00467            /*gPC.puts("adf_off\r\n");*/\
00468         }\
00469     }\
00470 }
00471 
00472 #define check {\
00473     check_status;\
00474     /*gPC.printf("I 0x%X\r\n",(int)status);*/\
00475     if(IRQ){\
00476         get_com_oc_sw_status();\
00477         /*gPC.printf("det\r\n");*/\
00478         if(!ADF_off) {\
00479             if(finish_write_data || restart_adf_flag) {\
00480                 write_data;\
00481                 ADF_off=true;\
00482                 T.stop();\
00483                 T.reset();\
00484                 T.start();\
00485                 /*ADF Temperature reading*/;\
00486                 get_temp_and_txcurr();\
00487             } else {\
00488                 T.stop();\
00489                 T.reset();\
00490                 T.start();\
00491                 write_data;\
00492                 if(sent_tmfrom_SDcard)\
00493                 send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00494                 else snd_tm.transmit_data(buffer_112,&last_buffer);\
00495             }\
00496         } else {\
00497             wait_ms(20);\
00498             gCS_ADF=0;\
00499             spi.write(0xB1);\
00500             gCS_ADF=1;\
00501             gPC.puts("transmission done\r\n");\
00502             /*gPC.printf("Time taken by last write_data %f msecs\n", T.read_ms())*/;\
00503             T.stop();\
00504             T.reset();\
00505             loop_on=false;\
00506             if(restart_adf_flag)\
00507             {\
00508                 restart_adf_flag=false;\
00509                 ADF_off=false;\
00510                 send_data;\
00511                 loop_on=true;\
00512                 CMD(CMD_PHY_TX);\
00513                 wait_us(2000);\
00514                 }\
00515         }\
00516     }\
00517     else{\
00518         if(T.read_us()>98000){\
00519                 data_irq_err=true;\
00520                 CMD(CMD_PHY_ON);\
00521                 gPC.printf("Data_error_detected");\
00522                 T.stop();\
00523                 T.reset();\
00524                 }\        
00525         }\
00526 }
00527 
00528 #define send_data {\
00529     gCS_ADF=0;\
00530     spi.write(0xBB);\
00531     gCS_ADF=1;\
00532     gCS_ADF=0;\
00533     spi.write(0xFF);\
00534     spi.write(0xFF);\
00535     gCS_ADF=1;\
00536     if(sent_tmfrom_SDcard){\
00537         send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00538     }else{\
00539         snd_tm.transmit_data(buffer_112,&last_buffer);\
00540     }\
00541     write_data;\
00542     if(sent_tmfrom_SDcard){\
00543         send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00544     }else{\
00545         snd_tm.transmit_data(buffer_112,&last_buffer);\
00546     }\
00547     write_data;\
00548     if(sent_tmfrom_SDcard){\
00549         send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00550     }else{\
00551         snd_tm.transmit_data(buffer_112,&last_buffer);\
00552     }\
00553     gCS_ADF=0;\
00554     spi.write(0xB1);\
00555     gCS_ADF=1;\
00556     wait_us(300);\
00557     gCS_ADF=0;\
00558     spi.write(0xFF);\
00559     spi.write(0xFF);\
00560     gCS_ADF=1;\
00561     gCS_ADF=0;\
00562     spi.write(0xB5);\
00563     gCS_ADF=1;\
00564     wait_us(300);\
00565     gCS_ADF=0;\
00566     spi.write(0xFF);\
00567     spi.write(0xFF);\
00568     gCS_ADF=1;\
00569 }
00570   
00571 #define initial_adf_check {\
00572     bool Configuration_Done=false;\
00573     quit_configuration=false;\
00574     bool reset_flag1 = 0;\
00575     bool flag = false;\
00576     while((hw_reset_err_cnt<HW_THRS)&&(quit_configuration==false)){\
00577         while((bbram_err_cnt<2)&&(quit_configuration==false)){\
00578             /*assrt_phy_off;*/\
00579             /*Assrt_phy_off Begin*/\
00580             {\
00581     int state_err_cnt = 0;\
00582     CMD(CMD_PHY_OFF);\
00583     if(cmd_err_flag){\
00584         temp_return=1;\
00585         }\
00586     else{\
00587         for(int i = 0 ; i < 40 ;i++){\
00588             CMD(CMD_PHY_OFF);\
00589             check_status;\
00590             if(status == PHY_OFF){\
00591                 temp_return = 0;\
00592             break;\
00593             }\
00594             else if(state_err_cnt>THRS){\
00595                 temp_return = 1;\
00596             break;\
00597             }\
00598             else {\
00599                 wait_ms(1);\
00600             }\
00601         }\
00602     }\
00603 }\
00604             /*Assrt_phy_off end*/\
00605             reset_flag1=temp_return;\
00606             if(!reset_flag1){\
00607                 bbram_write;\
00608                 while((rbp_err_cnt<RBP_THRS)&&(quit_configuration==false)){\
00609                     bbram_check;\
00610                     if(bbram_err==0){\
00611                         bbram_write_success=true;\
00612                         bbram_err_cnt=0;\
00613                         initiate;\
00614                         if(reg_err){\
00615                             rbp_err_cnt++;\
00616                             }\
00617                         else{\
00618                             rbp_err_cnt=0;\
00619                             /*gPC.printf("NO Reg err\r\n")*/;\
00620                             CMD(CMD_CONFIG_DEV);\
00621                             if(cmd_err_flag){\
00622                                 reset_flag=1;\
00623                                 gPC.printf("CMD ERR\r\n");\
00624                             }\
00625                             else{\
00626                                 reset_flag=0;\
00627                                 /*gPC.printf("NO CMD ERR CONFIG_DONE\r\n")*/;\
00628                                 quit_configuration=true;\
00629                             }\
00630                         }\
00631                     }\
00632                     else{\
00633                         bbram_write_success=false;\
00634                         bbram_err_cnt++;\
00635                         break;\
00636                     }\
00637                 }\
00638             }\
00639             else{\
00640                 break;\
00641             }\
00642         }\
00643         if(reset_flag1){\
00644             hardware_reset(0);\
00645             hw_reset_err_cnt++;\
00646             gPC.puts("Resetting hardware\r\n");\
00647         }\
00648     }\
00649     if(hw_reset_err_cnt==HW_THRS){\
00650         power_reset_flag=1;\
00651         power_reset_count++;\
00652         }\
00653     else{\
00654         Configuration_Done=true;\
00655         gPC.printf("Configuration_Done\n");\
00656         }\
00657 }
00658 
00659 #define configure_adf {\
00660     reset_flags;\
00661     initial_adf_check;\
00662     gPC.puts("Config_part done\r\n");\
00663 }
00664  
00665 void transmit_adf(){
00666 while(power_reset_count<POWER_RESET_THRS){ 
00667     restart_adf_flag=false;
00668     bool tx_err=false;
00669     configure_adf;
00670     send_data;
00671     /*PA MCR level*/;
00672         gCS_ADF=0;
00673         spi.write(0x1B);
00674         spi.write(0x07);
00675         spi.write(0x35);
00676         gCS_ADF=1;
00677     CMD(CMD_PHY_TX);
00678     wait_us(2000);
00679     T.start();
00680     while(loop_on){
00681         wait_us(20);
00682         check;
00683         if(data_irq_err||tx_err){
00684             hw_reset_err_cnt++;
00685             hw_reset_flag=true;
00686         break;
00687         }
00688     }
00689     if(hw_reset_flag==true){
00690         hardware_reset(0);
00691         }
00692     else{
00693         break;
00694     }
00695     gPC.puts("after while looprn");
00696 }
00697 }
00698 
00699 #endif