FMS_all.h

00001 #ifndef FMS_ALL_INCLUDED
00002 #define FMS_ALL_INCLUDED
00003 
00004 // Includes MMS RAM functions also
00005 
00006 /*===================================================FMS Functions=================================================*/
00007 
00008 
00009 //Run processes
00010 void P_PL_INIT();
00011 void P_PL_MAIN();
00012 void P_COM_INIT();
00013 void P_CDMS_HK_MAIN();
00014 void P_PL_RCV_SC_DATA();
00015 void P_CDMS_INIT_SD();
00016 
00017 // Switch ON/OFF functions
00018 void CDMS_SD_SW_ON();
00019 void CDMS_SD_SW_OFF();
00020 void CDMS_RTC_ON();
00021 void CDMS_RTC_OFF();
00022 void SW_ON_BAE();
00023 void SW_OFF_BAE();
00024 void SW_ON_PL_BEE();
00025 void SW_OFF_PL_BEE();
00026 void SW_ON_PL_EPS();
00027 void SW_OFF_PL_EPS();
00028 void SW_ON_V_A_EN();
00029 void SW_OFF_V_A_EN();
00030 
00031 // RST functions
00032 void RST_SD();
00033 void SW_RST_BAE();
00034 void SW_RST_PL_BEE();
00035 void RST_BAE();
00036 void RST_PL_BEE();
00037 void CDMS_RESET();
00038 void SYS_PWR_RESET();  // Have to be decided with EPS team.
00039 void sys_pwr_reset(void const *args);
00040 void EPS_V_A_EN();
00041 void EPS_V_C_EN();
00042 
00043 void RST_HK_COUNTER();
00044 int8_t CDMS_RD_SD_HK(uint8_t *);
00045 void CDMS_CALIB_RTC(uint8_t *);
00046 void TOTAL_RESET_WITH_CDMS();
00047 
00048 void sys_pwr_reset(void const *args){
00049     SYS_PWR_RESET();
00050 }
00051 
00052 void P_PL_INIT()
00053 {
00054     
00055 }
00056 
00057 void P_PL_MAIN()
00058 {
00059    FCTN_CDMS_PL_MAIN((void *)NULL);
00060 }
00061 
00062 void P_COM_INIT()
00063 {
00064     P_COM_INIT;
00065 }
00066 
00067 void P_CDMS_HK_MAIN()
00068 {
00069     FCTN_CDMS_HK_MAIN((void *)NULL);
00070 }
00071 
00072 void P_PL_RCV_SC_DATA()
00073 {
00074     
00075 }
00076 
00077 void P_CDMS_INIT_SD()
00078 {
00079     FCTN_CDMS_SD_INIT();
00080 }
00081 
00082 void CDMS_SD_SW_ON()
00083 {
00084     SD_SW_EN_DS = 1;
00085     SD_STATUS = DEVICE_POWERED;
00086     FCTN_CDMS_WR_FLASH(2,DEVICE_POWERED);
00087     gPC.printf("sw on sd\n");
00088 }
00089 
00090 void CDMS_SD_SW_OFF()
00091 {
00092     SD_SW_EN_DS = 0;
00093     SD_STATUS = DEVICE_DISABLED;
00094     FCTN_CDMS_WR_FLASH(2,DEVICE_DISABLED);
00095     gPC.printf("sw off sd\n");
00096 }
00097 
00098 void CDMS_RTC_ON()
00099 {
00100     //FCTN_CDMS_INIT_RTC();
00101     SPI_mutex.lock();
00102     gCS_RTC=1;
00103     gCS_RTC=0;
00104     spi.write(0x81); //register address with write flag
00105     spi.write(0x00);//disabling stop bit in the seconds register
00106     SPI_mutex.unlock();
00107     gPC.printf("sw on rtc\n");
00108 }
00109 
00110 void CDMS_RTC_OFF()
00111 {
00112     SPI_mutex.lock();
00113     gCS_RTC=1;
00114     gCS_RTC=0;
00115     spi.write(0x81); //register address with write flag
00116     spi.write(0x80);//enabling stop bit in the seconds register
00117     SPI_mutex.unlock();
00118     gPC.printf("sw off rtc\n");
00119 }
00120 
00121 void SW_ON_BAE()
00122 {
00123     BAE_SW_EN_DS = 1;
00124     BAE_STATUS = DEVICE_POWERED;
00125     FCTN_CDMS_WR_FLASH(1,DEVICE_POWERED);
00126     gPC.printf("sw on bae\n");
00127 }
00128 
00129 void SW_OFF_BAE()
00130 {
00131     BAE_SW_EN_DS = 0;
00132     BAE_STATUS = DEVICE_DISABLED;
00133     FCTN_CDMS_WR_FLASH(1,DEVICE_DISABLED);
00134     gPC.printf("sw off bae\n");
00135 }
00136 
00137 void SW_ON_PL_BEE()
00138 {
00139     PYLD_DFF_CLK = 0;
00140     PYLD_DFF = 1;
00141     wait_us(1);
00142     PYLD_DFF_CLK = 1;
00143     wait_us(1);
00144     PYLD_DFF_CLK = 0;
00145     wait_us(1);
00146     PL_STATUS = DEVICE_POWERED;
00147     FCTN_CDMS_WR_FLASH(3,DEVICE_POWERED);
00148 }
00149 
00150 void SW_OFF_PL_BEE()
00151 {
00152     PYLD_DFF_CLK = 0;
00153     PYLD_DFF = 0;
00154     wait_us(1);
00155     PYLD_DFF_CLK = 1;
00156     wait_us(1);
00157     PYLD_DFF_CLK = 0;
00158     wait_us(1);
00159     PL_STATUS = DEVICE_DISABLED;
00160     FCTN_CDMS_WR_FLASH(3,DEVICE_DISABLED);
00161 }
00162 
00163 void SW_ON_PL_EPS()
00164 {
00165     PYLD_EPS_DFF_PWR_CLK = 0;
00166     PYLD_EPS_DFF_PWR = 1;
00167     wait_us(1);
00168     PYLD_EPS_DFF_PWR_CLK = 1;
00169     wait_us(1);
00170     PYLD_EPS_DFF_PWR_CLK = 0;
00171     wait_us(1);
00172     PL_EPS_LATCH_SW_EN = 1;
00173     FCTN_CDMS_WR_FLASH(4,1);
00174 }
00175 
00176 void SW_OFF_PL_EPS()
00177 {
00178     PYLD_EPS_DFF_PWR_CLK = 0;
00179     PYLD_EPS_DFF_PWR = 0;
00180     wait_us(1);
00181     PYLD_EPS_DFF_PWR_CLK = 1;
00182     wait_us(1);
00183     PYLD_EPS_DFF_PWR_CLK = 0;
00184     wait_us(1);
00185     PL_EPS_LATCH_SW_EN = 0;
00186     FCTN_CDMS_WR_FLASH(4,0);
00187 }
00188 
00189 void SW_ON_V_A_EN()
00190 {
00191     V_A_EN = 1;
00192     EPS_V_A_EN_STATUS = 1;
00193     FCTN_CDMS_WR_FLASH(0,1);
00194 }
00195 
00196 void SW_OFF_V_A_EN()
00197 {
00198     V_A_EN = 0;
00199     EPS_V_A_EN_STATUS = 0;
00200     FCTN_CDMS_WR_FLASH(0,0);
00201 }
00202 
00203 void RST_SD()
00204 {
00205     SD_SW_EN_DS = 0;
00206     wait_ms(10);
00207     SD_SW_EN_DS = 1;
00208     SD_STATUS = DEVICE_POWERED;
00209     FCTN_CDMS_WR_FLASH(2,DEVICE_POWERED);
00210     gPC.printf("rst sd\n");
00211 }
00212 
00213 void SW_RST_BAE()
00214 {
00215     BAE_SW_EN_DS = 0;
00216     wait_ms(10);
00217     BAE_SW_EN_DS = 1;
00218     wait_ms(100);
00219     BAE_STATUS = DEVICE_POWERED;
00220     FCTN_CDMS_WR_FLASH(1,DEVICE_POWERED);
00221     gPC.printf("rst bae\n");
00222 }
00223 
00224 void SW_RST_PL_BEE()
00225 {
00226     PYLD_DFF = 0;
00227     wait_ms(10);
00228     PYLD_DFF = 1;
00229     PL_STATUS = DEVICE_POWERED;
00230     FCTN_CDMS_WR_FLASH(3,DEVICE_POWERED);
00231 }
00232 
00233 void RST_BAE()
00234 {
00235     RESET_TO_BAE = 0;
00236     wait_ms(10);
00237     RESET_TO_BAE = 1;
00238 }
00239 
00240 void RST_PL_BEE()
00241 {
00242     RESET_TO_PYLD = 0;
00243     wait_ms(10);
00244     RESET_TO_PYLD = 1;
00245 }
00246 
00247 void CDMS_INTERNAL_RESET()
00248 {
00249     NVIC_SystemReset();
00250 }
00251 
00252 void SYS_PWR_RESET()  // Have to be decided with EPS team.
00253 {
00254     //sys_pwr_rst = 1;
00255 }
00256 
00257 void EPS_V_A_EN()     // This is a reset function
00258 {
00259     V_A_EN = 0;
00260     wait_ms(10);
00261     V_A_EN = 1;
00262 }
00263 
00264 void EPS_V_C_EN()     // This is a reset function
00265 {
00266     COM_RX_CNTRL = 0;
00267     wait_ms(10);
00268     COM_RX_CNTRL = 1;
00269 }
00270 
00271 void RST_HK_COUNTER()
00272 {
00273     firstCount = true;
00274 }
00275 
00276 int8_t CDMS_RD_SD_HK(uint8_t *sd_statusbits)
00277 {
00278     int8_t p;
00279     if(SD_SW_EN_DS != DEVICE_POWERED)
00280     {
00281         SD_RD_ERROR = 1;
00282         p = 1;
00283     }
00284     else
00285     {
00286         p = disk_read_statusbits(sd_statusbits);
00287     }
00288     return p;
00289 }
00290 
00291 void CDMS_CALIB_RTC(uint64_t time)
00292 {
00293     SPI_mutex.lock();
00294     gCS_RTC=1;
00295     spi.format(8,0);
00296     spi.frequency(1000000);
00297  
00298     gCS_RTC=0;
00299     spi.write(0x82);
00300     spi.write((uint8_t)time);//set minutes
00301     gCS_RTC=1;
00302  
00303     gCS_RTC=0;
00304     spi.write(0x83); 
00305     spi.write((uint8_t)(time>>8) & 0x3F); //set hours
00306     gCS_RTC=1;
00307     
00308     gCS_RTC=0;
00309     spi.write(0x85); 
00310     spi.write((uint8_t)(time>>16) & 0x3F); //set date
00311     gCS_RTC=1;
00312     
00313     gCS_RTC=0;
00314     spi.write(0x86); 
00315     spi.write((uint8_t)(time>>24) & 0x1F); //set month
00316     gCS_RTC=1;
00317     
00318     gCS_RTC=0;
00319     spi.write(0x87); 
00320     spi.write((uint8_t)(time>>32)); //set year to 00(2000)
00321     gCS_RTC=1;
00322     gPC.puts("\n\r rtc initalised \n");
00323     SPI_mutex.unlock();
00324 }
00325 
00326 void CDMS_RESET()
00327 {
00328     NVIC_SystemReset();    
00329 }
00330 
00331 /*
00332 //void CDMS_INTERNAL_RESET()
00333 {
00334     
00335 }
00336 */
00337 
00338 //===============================MMS RAM functions==================================
00339 
00340 void FCTN_CDMS_RD_L_RAM(Base_tm *);
00341 
00342 void FCTN_CDMS_RD_L_RAM(Base_tm *tm_pointer)
00343 {
00344     uint32_t time = FCTN_CDMS_RD_RTC() >> 7;             //Reading Time from RTC
00345     for(int i = 124; i<128; i++)
00346     CDMS_HEALTH_DATA[i] = time >> (127-i)*8;
00347     for(int i=0;i<128;i++)
00348     {
00349         //tm_pointer->TM_string[i] = 0;
00350         tm_pointer->TM_string[i+4] = CDMS_HEALTH_DATA[i];
00351     }
00352     
00353 }
00354 
00355 void FCTN_CDMS_MAX_MIN(Base_tm *tm_pointer)
00356 { 
00357     tm_pointer->TM_string[4] = MAX_COM_ADF_TMP+40;
00358     tm_pointer->TM_string[6] = (uint8_t)(MAX_RSSI_VOLTAGE*10);
00359     
00360     for(int i=0;i<16;i++)
00361     {
00362         //tm_pointer->TM_string[i] = 0;
00363         tm_pointer->TM_string[i+7] = (uint8_t)(min_max_data.temp_max[i]);
00364     }
00365     
00366     tm_pointer->TM_string[23] = MIN_COM_ADF_TMP+40;
00367     tm_pointer->TM_string[25] = (uint8_t)(MIN_RSSI_VOLTAGE*10);
00368     
00369     for(int i=0;i<16;i++)
00370     {
00371         //tm_pointer->TM_string[i] = 0;
00372         tm_pointer->TM_string[i+26] = (uint8_t)(min_max_data.temp_min[i]);
00373     }
00374 
00375     tm_pointer->TM_string[42] = GPIO_STATUS>>8;
00376     tm_pointer->TM_string[43] = (GPIO_STATUS<<3) & 0x00FF;
00377     
00378     TIME_LATEST_RTC= FCTN_CDMS_RD_RTC() >> 7;
00379     for(int i = 0; i<4; i++)
00380         tm_pointer->TM_string[44+i] = TIME_LATEST_RTC >> (3-i)*8; 
00381 }
00382 
00383 #endif