Sam Grove / TLV320AIC1110

Device driver for TI TLV320AIC1110 voice band codec

Work in Progress

TLV320AIC1110.cpp@5:174f94df7624, 2013-05-21 (annotated)

Committer:
sam_grove
Date:
Tue May 21 15:16:44 2013 +0000
Revision:
5:174f94df7624
Parent:
4:470f89e786f9 
added comments

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sam_grove 0:ec233f3b49d8 1 /**
sam_grove 0:ec233f3b49d8 2 * @file TLV320AIC1110.cpp
sam_grove 0:ec233f3b49d8 3 * @brief Device driver - TLV320AIC1110 CODEC
sam_grove 0:ec233f3b49d8 4 * @author sam grove
sam_grove 0:ec233f3b49d8 5 * @version 1.0
sam_grove 0:ec233f3b49d8 6 * @see http://www.ti.com/product/tlv320aic1110
sam_grove 0:ec233f3b49d8 7 *
sam_grove 0:ec233f3b49d8 8 * Copyright (c) 2013
sam_grove 0:ec233f3b49d8 9 *
sam_grove 0:ec233f3b49d8 10 * Licensed under the Apache License, Version 2.0 (the "License");
sam_grove 0:ec233f3b49d8 11 * you may not use this file except in compliance with the License.
sam_grove 0:ec233f3b49d8 12 * You may obtain a copy of the License at
sam_grove 0:ec233f3b49d8 13 *
sam_grove 0:ec233f3b49d8 14 * http://www.apache.org/licenses/LICENSE-2.0
sam_grove 0:ec233f3b49d8 15 *
sam_grove 0:ec233f3b49d8 16 * Unless required by applicable law or agreed to in writing, software
sam_grove 0:ec233f3b49d8 17 * distributed under the License is distributed on an "AS IS" BASIS,
sam_grove 0:ec233f3b49d8 18 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sam_grove 0:ec233f3b49d8 19 * See the License for the specific language governing permissions and
sam_grove 0:ec233f3b49d8 20 * limitations under the License.
sam_grove 0:ec233f3b49d8 21 */
sam_grove 0:ec233f3b49d8 22
sam_grove 0:ec233f3b49d8 23 #include "TLV320AIC1110.h"
sam_grove 1:4d559df5733e 24 #include "LogUtil.h"
sam_grove 0:ec233f3b49d8 25
sam_grove 4:470f89e786f9 26 #define W_ADDRESS 0xE2
sam_grove 4:470f89e786f9 27 #define R_ADDRESS 0xE3
sam_grove 4:470f89e786f9 28
sam_grove 0:ec233f3b49d8 29 TLV320AIC1110::TLV320AIC1110(I2C &i2c)
sam_grove 0:ec233f3b49d8 30 {
sam_grove 0:ec233f3b49d8 31 _i2c = &i2c;
sam_grove 0:ec233f3b49d8 32 _i2c->frequency(400000);
sam_grove 0:ec233f3b49d8 33
sam_grove 0:ec233f3b49d8 34 return;
sam_grove 0:ec233f3b49d8 35 }
sam_grove 0:ec233f3b49d8 36
sam_grove 0:ec233f3b49d8 37 TLV320AIC1110::~TLV320AIC1110()
sam_grove 0:ec233f3b49d8 38 {
sam_grove 0:ec233f3b49d8 39 return;
sam_grove 0:ec233f3b49d8 40 }
sam_grove 0:ec233f3b49d8 41
sam_grove 4:470f89e786f9 42 void TLV320AIC1110::init(void)
sam_grove 0:ec233f3b49d8 43 {
sam_grove 5:174f94df7624 44 writeRegister(POWER_CONTROL, 0x9B); // reg 0
sam_grove 5:174f94df7624 45 writeRegister(MODE_CONTROL, 0x00); // reg 1
sam_grove 5:174f94df7624 46 writeRegister(AUX, 0x81); // reg 6
sam_grove 0:ec233f3b49d8 47
sam_grove 0:ec233f3b49d8 48 return;
sam_grove 0:ec233f3b49d8 49 }
sam_grove 0:ec233f3b49d8 50
sam_grove 4:470f89e786f9 51 void TLV320AIC1110::regDump(void)
sam_grove 1:4d559df5733e 52 {
sam_grove 1:4d559df5733e 53 for(int i=0; i<7; i++)
sam_grove 1:4d559df5733e 54 {
sam_grove 1:4d559df5733e 55 LOG(" Register 0x%02x 0x%02x\n", i, readRegister(i));
sam_grove 1:4d559df5733e 56 }
sam_grove 1:4d559df5733e 57
sam_grove 1:4d559df5733e 58 return;
sam_grove 1:4d559df5733e 59 }
sam_grove 1:4d559df5733e 60
sam_grove 4:470f89e786f9 61 void TLV320AIC1110::writeRegister(const TLV320AIC1110_REGISTERS reg, const uint8_t value)
sam_grove 0:ec233f3b49d8 62 {
sam_grove 4:470f89e786f9 63 char data[2] = {reg, value};
sam_grove 0:ec233f3b49d8 64
sam_grove 1:4d559df5733e 65 __disable_irq();
sam_grove 4:470f89e786f9 66 if (0 != _i2c->write(W_ADDRESS, data, 2))
sam_grove 0:ec233f3b49d8 67 {
sam_grove 1:4d559df5733e 68 ERROR("write failed\n");
sam_grove 0:ec233f3b49d8 69 }
sam_grove 1:4d559df5733e 70 __enable_irq();
sam_grove 1:4d559df5733e 71
sam_grove 0:ec233f3b49d8 72 return;
sam_grove 0:ec233f3b49d8 73 }
sam_grove 0:ec233f3b49d8 74
sam_grove 4:470f89e786f9 75 uint8_t TLV320AIC1110::readRegister(const uint8_t reg)
sam_grove 0:ec233f3b49d8 76 {
sam_grove 2:e7c7c0177dd8 77 char data[1] = {reg};
sam_grove 4:470f89e786f9 78
sam_grove 1:4d559df5733e 79 __disable_irq();
sam_grove 4:470f89e786f9 80 if (0 != _i2c->write(W_ADDRESS, data, 1, 1))
sam_grove 4:470f89e786f9 81 {
sam_grove 4:470f89e786f9 82 ERROR("read failed\n");
sam_grove 4:470f89e786f9 83 }
sam_grove 4:470f89e786f9 84 if (0 != _i2c->read (R_ADDRESS, data, 1))
sam_grove 4:470f89e786f9 85 {
sam_grove 4:470f89e786f9 86 ERROR("read failed\n");
sam_grove 4:470f89e786f9 87 }
sam_grove 1:4d559df5733e 88 __enable_irq();
sam_grove 3:4592d862ef88 89
sam_grove 4:470f89e786f9 90 return data[0];
sam_grove 4:470f89e786f9 91 }
sam_grove 4:470f89e786f9 92
sam_grove 4:470f89e786f9 93 void TLV320AIC1110::mute(const CHANNEL_T ch)
sam_grove 4:470f89e786f9 94 {
sam_grove 4:470f89e786f9 95 uint8_t reg_val = readRegister(POWER_CONTROL);
sam_grove 4:470f89e786f9 96 reg_val |= ch; // write 1's
sam_grove 4:470f89e786f9 97 writeRegister(POWER_CONTROL, reg_val);
sam_grove 4:470f89e786f9 98
sam_grove 4:470f89e786f9 99 return;
sam_grove 4:470f89e786f9 100 }
sam_grove 4:470f89e786f9 101
sam_grove 4:470f89e786f9 102 void TLV320AIC1110::unmute(const CHANNEL_T ch)
sam_grove 4:470f89e786f9 103 {
sam_grove 4:470f89e786f9 104 uint8_t reg_val = readRegister(POWER_CONTROL);
sam_grove 4:470f89e786f9 105 reg_val &= ~ch; // write 0's
sam_grove 4:470f89e786f9 106 writeRegister(POWER_CONTROL, reg_val);
sam_grove 4:470f89e786f9 107
sam_grove 4:470f89e786f9 108 return;
sam_grove 4:470f89e786f9 109 }
sam_grove 4:470f89e786f9 110
sam_grove 4:470f89e786f9 111 uint32_t TLV320AIC1110::txGain(const uint8_t gain)
sam_grove 4:470f89e786f9 112 {
sam_grove 4:470f89e786f9 113 uint32_t retval = 0;
sam_grove 4:470f89e786f9 114 uint8_t normalize = (gain >= 31) ? 42 : 30;
sam_grove 4:470f89e786f9 115 // validate the parameter
sam_grove 4:470f89e786f9 116 if( (gain <= 42) && (gain >= 31) )
sam_grove 4:470f89e786f9 117 {
sam_grove 4:470f89e786f9 118 retval = 1;
sam_grove 4:470f89e786f9 119 // normalize & format the parameter
sam_grove 4:470f89e786f9 120 uint8_t fmt_gain = (normalize - gain) >> 2; // divide by 2 (2db increment)
sam_grove 4:470f89e786f9 121 // read the current register setting (retain sidetone gain)
sam_grove 4:470f89e786f9 122 uint8_t reg = readRegister(TXPGA) & 0x07;
sam_grove 4:470f89e786f9 123 fmt_gain |= (30 == normalize) ? (reg | 0x40) : reg;
sam_grove 4:470f89e786f9 124 writeRegister(TXPGA, fmt_gain);
sam_grove 4:470f89e786f9 125 }
sam_grove 0:ec233f3b49d8 126
sam_grove 4:470f89e786f9 127 return retval;
sam_grove 4:470f89e786f9 128 }
sam_grove 4:470f89e786f9 129
sam_grove 4:470f89e786f9 130 uint32_t TLV320AIC1110::sidetoneGain(const int8_t gain)
sam_grove 4:470f89e786f9 131 {
sam_grove 4:470f89e786f9 132 uint32_t retval = 0;
sam_grove 4:470f89e786f9 133 // validate the parameter
sam_grove 4:470f89e786f9 134 if( (gain <= -12) && (gain >= -24) )
sam_grove 4:470f89e786f9 135 {
sam_grove 4:470f89e786f9 136 retval = 1;
sam_grove 4:470f89e786f9 137 // normalize & format the parameter
sam_grove 4:470f89e786f9 138 uint8_t fmt_gain = (24 - (gain+36)) >> 2; // divide by 2 (2db increment)
sam_grove 4:470f89e786f9 139 // read the current register setting (retain tx gain)
sam_grove 4:470f89e786f9 140 uint8_t reg = readRegister(TXPGA) & 0xf8;
sam_grove 4:470f89e786f9 141 fmt_gain |= (reg << 3);
sam_grove 4:470f89e786f9 142 writeRegister(TXPGA, fmt_gain);
sam_grove 4:470f89e786f9 143 }
sam_grove 4:470f89e786f9 144
sam_grove 4:470f89e786f9 145 return retval;
sam_grove 4:470f89e786f9 146 }
sam_grove 4:470f89e786f9 147
sam_grove 4:470f89e786f9 148 uint32_t TLV320AIC1110::rxGain(const int8_t gain)
sam_grove 4:470f89e786f9 149 {
sam_grove 4:470f89e786f9 150 uint32_t retval = 0;
sam_grove 4:470f89e786f9 151 // validate the parameter
sam_grove 4:470f89e786f9 152 if( (gain <= 6) && (gain >= -6) )
sam_grove 4:470f89e786f9 153 {
sam_grove 4:470f89e786f9 154 retval = 1;
sam_grove 4:470f89e786f9 155 // normalize & format the parameter
sam_grove 4:470f89e786f9 156 uint8_t fmt_gain = (12 - (gain+6)) << 4;
sam_grove 4:470f89e786f9 157 // read the current register setting (retain rx volume control)
sam_grove 4:470f89e786f9 158 uint8_t reg = readRegister(RXPGA) & 0x0f;
sam_grove 4:470f89e786f9 159 fmt_gain |= reg;
sam_grove 4:470f89e786f9 160 writeRegister(RXPGA, fmt_gain);
sam_grove 4:470f89e786f9 161 }
sam_grove 4:470f89e786f9 162
sam_grove 4:470f89e786f9 163 return retval;
sam_grove 4:470f89e786f9 164 }
sam_grove 4:470f89e786f9 165
sam_grove 4:470f89e786f9 166 uint32_t TLV320AIC1110::rxVolume(const int8_t gain)
sam_grove 4:470f89e786f9 167 {
sam_grove 4:470f89e786f9 168 uint32_t retval = 0;
sam_grove 4:470f89e786f9 169 // validate the parameter
sam_grove 4:470f89e786f9 170 if( (gain <= 0) && (gain >= -18) )
sam_grove 4:470f89e786f9 171 {
sam_grove 4:470f89e786f9 172 retval = 1;
sam_grove 4:470f89e786f9 173 // normalize & format the parameter
sam_grove 4:470f89e786f9 174 uint8_t fmt_gain = (18 - (gain+18)) >> 2; // divide by 2 (2db increment)
sam_grove 4:470f89e786f9 175 // read the current register setting (retain rx gain)
sam_grove 4:470f89e786f9 176 uint8_t reg = readRegister(RXPGA) & 0xf0;
sam_grove 4:470f89e786f9 177 fmt_gain |= (reg << 4);
sam_grove 4:470f89e786f9 178 writeRegister(RXPGA, fmt_gain);
sam_grove 4:470f89e786f9 179 }
sam_grove 4:470f89e786f9 180
sam_grove 4:470f89e786f9 181 return retval;
sam_grove 0:ec233f3b49d8 182 }
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