An initial port to the FRDM-K46Z based on the the following: https://developer.mbed.org/users/okini3939/notebook/dmx512/

Dependents:   FRDM-Dowser

Fork of DMX by Suga koubou

Need to update the UART references to the K46Z. The KE02 Sub-Family Reference Manual provides us with the required information.

The modifications are wrapped with the target for the K46: For example, defined(TARGET_KL46Z)

Revision:
18:6303931e4102
Parent:
17:12dd79109ce3
Child:
19:8a86e35e54a9
--- a/DMX.cpp	Fri Mar 13 13:34:53 2015 +0000
+++ b/DMX.cpp	Fri Mar 13 17:36:48 2015 +0000
@@ -38,6 +38,10 @@
       NVIC_SetPriority(UART3_IRQn, 1);
     }
 #elif defined(TARGET_KL46Z)
+/**
+    Need to associate the _uart private variable with the user selected pin.
+    Hook the interrupt pin. 
+*/
     if ((p_rx == PTE21) || (p_rx == PTA1)){
       _uart = (UARTLP_Type *)UART0;
       NVIC_SetPriority(UART0_IRQn, 1);
@@ -109,8 +113,12 @@
         // Break Time
         timeout01.detach();
         #if defined(TARGET_KL46Z)
+        /// Chapter 312  of the Freescale KE02 Sub-Famely Reference
+        /// UARTx_C2 page 553 enable the transmitter and reciever
+        ///  Sending a break we write a one, then write a zero.....  This sets send break bit
             _uart->C2 |= UART_C2_SBK_MASK | UART_C2_TE_MASK | UART_C2_RE_MASK;
         #else
+        /// Bit 6 in the LCR enables the break signal.....
             _uart->LCR |= (1 << 6);
         #endif
         mode_tx = DMX_MODE_BREAK;
@@ -121,6 +129,7 @@
         // Mark After Break
         timeout01.detach();
         #if defined(TARGET_KL46Z)
+        /// This sets the break charcter to zero to send the break.
         _uart->C2 &= ~UART_C2_SBK_MASK;
         #else
         _uart->LCR &= ~(1 << 6);
@@ -139,9 +148,12 @@
         
         
         #if defined(TARGET_KL46Z)
+        /// Check the TDRE (Transmit Data Register Empty) flag... page 555
+        /// The data is placed in D on the Freescale
         while(!(_uart->S1 & UART_S1_TDRE_MASK));
         _uart->D = DMX_START_CODE; // Freescale
         #else
+        /// Bit 5 of the LSR indicates the THR (Transmit Holding Register) is empty
         while(!(_uart->LSR & (1<<5)));
         _uart->THR = DMX_START_CODE;
         #endif
@@ -179,7 +191,8 @@
 void DMX::int_rx () {
     int flg, dat;
     int tmp1,tmp2;
-    #if defined(TARGET_KL46Z)  // looking for (7)errornous data,(3) Framming Error, (4) Break
+    #if defined(TARGET_KL46Z)  
+    /// looking for (7)erroneous data,(3) Framming Error, (4) Break
     tmp1 = (_uart->S1 & (UART_S1_NF_MASK|UART_S1_FE_MASK));         // NF,FE
     tmp2 = (_uart->S2 & UART_S2_LBKDIF_MASK);         //LBKDIF
     flg = (tmp1<<1) | tmp2;