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arm_shift_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Project: CMSIS DSP Library 00003 * Title: arm_shift_q31.c 00004 * Description: Shifts the elements of a Q31 vector by a specified number of bits 00005 * 00006 * $Date: 27. January 2017 00007 * $Revision: V.1.5.1 00008 * 00009 * Target Processor: Cortex-M cores 00010 * -------------------------------------------------------------------- */ 00011 /* 00012 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved. 00013 * 00014 * SPDX-License-Identifier: Apache-2.0 00015 * 00016 * Licensed under the Apache License, Version 2.0 (the License); you may 00017 * not use this file except in compliance with the License. 00018 * You may obtain a copy of the License at 00019 * 00020 * www.apache.org/licenses/LICENSE-2.0 00021 * 00022 * Unless required by applicable law or agreed to in writing, software 00023 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 00024 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00025 * See the License for the specific language governing permissions and 00026 * limitations under the License. 00027 */ 00028 00029 #include "arm_math.h" 00030 00031 /** 00032 * @ingroup groupMath 00033 */ 00034 /** 00035 * @defgroup shift Vector Shift 00036 * 00037 * Shifts the elements of a fixed-point vector by a specified number of bits. 00038 * There are separate functions for Q7, Q15, and Q31 data types. 00039 * The underlying algorithm used is: 00040 * 00041 * <pre> 00042 * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize. 00043 * </pre> 00044 * 00045 * If <code>shift</code> is positive then the elements of the vector are shifted to the left. 00046 * If <code>shift</code> is negative then the elements of the vector are shifted to the right. 00047 * 00048 * The functions support in-place computation allowing the source and destination 00049 * pointers to reference the same memory buffer. 00050 */ 00051 00052 /** 00053 * @addtogroup shift 00054 * @{ 00055 */ 00056 00057 /** 00058 * @brief Shifts the elements of a Q31 vector a specified number of bits. 00059 * @param[in] *pSrc points to the input vector 00060 * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. 00061 * @param[out] *pDst points to the output vector 00062 * @param[in] blockSize number of samples in the vector 00063 * @return none. 00064 * 00065 * 00066 * <b>Scaling and Overflow Behavior:</b> 00067 * \par 00068 * The function uses saturating arithmetic. 00069 * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. 00070 */ 00071 00072 void arm_shift_q31( 00073 q31_t * pSrc, 00074 int8_t shiftBits, 00075 q31_t * pDst, 00076 uint32_t blockSize) 00077 { 00078 uint32_t blkCnt; /* loop counter */ 00079 uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ 00080 00081 #if defined (ARM_MATH_DSP) 00082 00083 q31_t in1, in2, in3, in4; /* Temporary input variables */ 00084 q31_t out1, out2, out3, out4; /* Temporary output variables */ 00085 00086 /*loop Unrolling */ 00087 blkCnt = blockSize >> 2U; 00088 00089 00090 if (sign == 0U) 00091 { 00092 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00093 ** a second loop below computes the remaining 1 to 3 samples. */ 00094 while (blkCnt > 0U) 00095 { 00096 /* C = A << shiftBits */ 00097 /* Shift the input and then store the results in the destination buffer. */ 00098 in1 = *pSrc; 00099 in2 = *(pSrc + 1); 00100 out1 = in1 << shiftBits; 00101 in3 = *(pSrc + 2); 00102 out2 = in2 << shiftBits; 00103 in4 = *(pSrc + 3); 00104 if (in1 != (out1 >> shiftBits)) 00105 out1 = 0x7FFFFFFF ^ (in1 >> 31); 00106 00107 if (in2 != (out2 >> shiftBits)) 00108 out2 = 0x7FFFFFFF ^ (in2 >> 31); 00109 00110 *pDst = out1; 00111 out3 = in3 << shiftBits; 00112 *(pDst + 1) = out2; 00113 out4 = in4 << shiftBits; 00114 00115 if (in3 != (out3 >> shiftBits)) 00116 out3 = 0x7FFFFFFF ^ (in3 >> 31); 00117 00118 if (in4 != (out4 >> shiftBits)) 00119 out4 = 0x7FFFFFFF ^ (in4 >> 31); 00120 00121 *(pDst + 2) = out3; 00122 *(pDst + 3) = out4; 00123 00124 /* Update destination pointer to process next sampels */ 00125 pSrc += 4U; 00126 pDst += 4U; 00127 00128 /* Decrement the loop counter */ 00129 blkCnt--; 00130 } 00131 } 00132 else 00133 { 00134 00135 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00136 ** a second loop below computes the remaining 1 to 3 samples. */ 00137 while (blkCnt > 0U) 00138 { 00139 /* C = A >> shiftBits */ 00140 /* Shift the input and then store the results in the destination buffer. */ 00141 in1 = *pSrc; 00142 in2 = *(pSrc + 1); 00143 in3 = *(pSrc + 2); 00144 in4 = *(pSrc + 3); 00145 00146 *pDst = (in1 >> -shiftBits); 00147 *(pDst + 1) = (in2 >> -shiftBits); 00148 *(pDst + 2) = (in3 >> -shiftBits); 00149 *(pDst + 3) = (in4 >> -shiftBits); 00150 00151 00152 pSrc += 4U; 00153 pDst += 4U; 00154 00155 blkCnt--; 00156 } 00157 00158 } 00159 00160 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00161 ** No loop unrolling is used. */ 00162 blkCnt = blockSize % 0x4U; 00163 00164 #else 00165 00166 /* Run the below code for Cortex-M0 */ 00167 00168 00169 /* Initialize blkCnt with number of samples */ 00170 blkCnt = blockSize; 00171 00172 #endif /* #if defined (ARM_MATH_DSP) */ 00173 00174 00175 while (blkCnt > 0U) 00176 { 00177 /* C = A (>> or <<) shiftBits */ 00178 /* Shift the input and then store the result in the destination buffer. */ 00179 *pDst++ = (sign == 0U) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) : 00180 (*pSrc++ >> -shiftBits); 00181 00182 /* Decrement the loop counter */ 00183 blkCnt--; 00184 } 00185 00186 00187 } 00188 00189 /** 00190 * @} end of shift group 00191 */ 00192
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