arm_rms_q31.c

00001 /* ----------------------------------------------------------------------
00002  * Project:      CMSIS DSP Library
00003  * Title:        arm_rms_q31.c
00004  * Description:  Root Mean Square of the elements of a Q31 vector
00005  *
00006  * $Date:        27. January 2017
00007  * $Revision:    V.1.5.1
00008  *
00009  * Target Processor: Cortex-M cores
00010  * -------------------------------------------------------------------- */
00011 /*
00012  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
00013  *
00014  * SPDX-License-Identifier: Apache-2.0
00015  *
00016  * Licensed under the Apache License, Version 2.0 (the License); you may
00017  * not use this file except in compliance with the License.
00018  * You may obtain a copy of the License at
00019  *
00020  * www.apache.org/licenses/LICENSE-2.0
00021  *
00022  * Unless required by applicable law or agreed to in writing, software
00023  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00024  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00025  * See the License for the specific language governing permissions and
00026  * limitations under the License.
00027  */
00028 
00029 #include "arm_math.h"
00030 
00031 /**
00032  * @addtogroup RMS
00033  * @{
00034  */
00035 
00036 
00037 /**
00038  * @brief Root Mean Square of the elements of a Q31 vector.
00039  * @param[in]       *pSrc points to the input vector
00040  * @param[in]       blockSize length of the input vector
00041  * @param[out]      *pResult rms value returned here
00042  * @return none.
00043  *
00044  * @details
00045  * <b>Scaling and Overflow Behavior:</b>
00046  *
00047  *\par
00048  * The function is implemented using an internal 64-bit accumulator.
00049  * The input is represented in 1.31 format, and intermediate multiplication
00050  * yields a 2.62 format.
00051  * The accumulator maintains full precision of the intermediate multiplication results,
00052  * but provides only a single guard bit.
00053  * There is no saturation on intermediate additions.
00054  * If the accumulator overflows, it wraps around and distorts the result.
00055  * In order to avoid overflows completely, the input signal must be scaled down by
00056  * log2(blockSize) bits, as a total of blockSize additions are performed internally.
00057  * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
00058  *
00059  */
00060 
00061 void arm_rms_q31(
00062   q31_t * pSrc,
00063   uint32_t blockSize,
00064   q31_t * pResult)
00065 {
00066   q63_t sum = 0;                                 /* accumulator */
00067   q31_t in;                                      /* Temporary variable to store the input */
00068   uint32_t blkCnt;                               /* loop counter */
00069 
00070 #if defined (ARM_MATH_DSP)
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072 
00073   q31_t in1, in2, in3, in4;                      /* Temporary input variables */
00074 
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2U;
00077 
00078   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 7 samples. */
00080   while (blkCnt > 0U)
00081   {
00082     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00083     /* Compute sum of the squares and then store the result in a temporary variable, sum */
00084     /* read two samples from source buffer */
00085     in1 = pSrc[0];
00086     in2 = pSrc[1];
00087 
00088     /* calculate power and accumulate to accumulator */
00089     sum += (q63_t) in1 *in1;
00090     sum += (q63_t) in2 *in2;
00091 
00092     /* read two samples from source buffer */
00093     in3 = pSrc[2];
00094     in4 = pSrc[3];
00095 
00096     /* calculate power and accumulate to accumulator */
00097     sum += (q63_t) in3 *in3;
00098     sum += (q63_t) in4 *in4;
00099 
00100 
00101     /* update source buffer to process next samples */
00102     pSrc += 4U;
00103 
00104     /* Decrement the loop counter */
00105     blkCnt--;
00106   }
00107 
00108   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
00109    ** No loop unrolling is used. */
00110   blkCnt = blockSize % 0x4U;
00111 
00112 #else
00113   /* Run the below code for Cortex-M0 */
00114 
00115   blkCnt = blockSize;
00116 
00117 #endif /* #if defined (ARM_MATH_DSP) */
00118 
00119   while (blkCnt > 0U)
00120   {
00121     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00122     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00123     in = *pSrc++;
00124     sum += (q63_t) in *in;
00125 
00126     /* Decrement the loop counter */
00127     blkCnt--;
00128   }
00129 
00130   /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
00131   /* Compute Rms and store the result in the destination vector */
00132   arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
00133 }
00134 
00135 /**
00136  * @} end of RMS group
00137  */
00138