arm_add_q7.c

00001 /* ----------------------------------------------------------------------
00002  * Project:      CMSIS DSP Library
00003  * Title:        arm_add_q7.c
00004  * Description:  Q7 vector addition
00005  *
00006  * $Date:        27. January 2017
00007  * $Revision:    V.1.5.1
00008  *
00009  * Target Processor: Cortex-M cores
00010  * -------------------------------------------------------------------- */
00011 /*
00012  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
00013  *
00014  * SPDX-License-Identifier: Apache-2.0
00015  *
00016  * Licensed under the Apache License, Version 2.0 (the License); you may
00017  * not use this file except in compliance with the License.
00018  * You may obtain a copy of the License at
00019  *
00020  * www.apache.org/licenses/LICENSE-2.0
00021  *
00022  * Unless required by applicable law or agreed to in writing, software
00023  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00024  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00025  * See the License for the specific language governing permissions and
00026  * limitations under the License.
00027  */
00028 
00029 #include "arm_math.h"
00030 
00031 /**
00032  * @ingroup groupMath
00033  */
00034 
00035 /**
00036  * @addtogroup BasicAdd
00037  * @{
00038  */
00039 
00040 /**
00041  * @brief Q7 vector addition.
00042  * @param[in]       *pSrcA points to the first input vector
00043  * @param[in]       *pSrcB points to the second input vector
00044  * @param[out]      *pDst points to the output vector
00045  * @param[in]       blockSize number of samples in each vector
00046  * @return none.
00047  *
00048  * <b>Scaling and Overflow Behavior:</b>
00049  * \par
00050  * The function uses saturating arithmetic.
00051  * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
00052  */
00053 
00054 void arm_add_q7(
00055   q7_t * pSrcA,
00056   q7_t * pSrcB,
00057   q7_t * pDst,
00058   uint32_t blockSize)
00059 {
00060   uint32_t blkCnt;                               /* loop counter */
00061 
00062 #if defined (ARM_MATH_DSP)
00063 
00064 /* Run the below code for Cortex-M4 and Cortex-M3 */
00065 
00066 
00067   /*loop Unrolling */
00068   blkCnt = blockSize >> 2U;
00069 
00070   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00071    ** a second loop below computes the remaining 1 to 3 samples. */
00072   while (blkCnt > 0U)
00073   {
00074     /* C = A + B */
00075     /* Add and then store the results in the destination buffer. */
00076     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00077 
00078     /* Decrement the loop counter */
00079     blkCnt--;
00080   }
00081 
00082   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00083    ** No loop unrolling is used. */
00084   blkCnt = blockSize % 0x4U;
00085 
00086   while (blkCnt > 0U)
00087   {
00088     /* C = A + B */
00089     /* Add and then store the results in the destination buffer. */
00090     *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
00091 
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095 
00096 #else
00097 
00098   /* Run the below code for Cortex-M0 */
00099 
00100 
00101 
00102   /* Initialize blkCnt with number of samples */
00103   blkCnt = blockSize;
00104 
00105   while (blkCnt > 0U)
00106   {
00107     /* C = A + B */
00108     /* Add and then store the results in the destination buffer. */
00109     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
00110 
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114 
00115 #endif /* #if defined (ARM_MATH_DSP) */
00116 
00117 
00118 }
00119 
00120 /**
00121  * @} end of BasicAdd group
00122  */
00123