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arm_add_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Project: CMSIS DSP Library 00003 * Title: arm_add_q31.c 00004 * Description: Q31 vector addition 00005 * 00006 * $Date: 27. January 2017 00007 * $Revision: V.1.5.1 00008 * 00009 * Target Processor: Cortex-M cores 00010 * -------------------------------------------------------------------- */ 00011 /* 00012 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved. 00013 * 00014 * SPDX-License-Identifier: Apache-2.0 00015 * 00016 * Licensed under the Apache License, Version 2.0 (the License); you may 00017 * not use this file except in compliance with the License. 00018 * You may obtain a copy of the License at 00019 * 00020 * www.apache.org/licenses/LICENSE-2.0 00021 * 00022 * Unless required by applicable law or agreed to in writing, software 00023 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 00024 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00025 * See the License for the specific language governing permissions and 00026 * limitations under the License. 00027 */ 00028 00029 #include "arm_math.h" 00030 00031 /** 00032 * @ingroup groupMath 00033 */ 00034 00035 /** 00036 * @addtogroup BasicAdd 00037 * @{ 00038 */ 00039 00040 00041 /** 00042 * @brief Q31 vector addition. 00043 * @param[in] *pSrcA points to the first input vector 00044 * @param[in] *pSrcB points to the second input vector 00045 * @param[out] *pDst points to the output vector 00046 * @param[in] blockSize number of samples in each vector 00047 * @return none. 00048 * 00049 * <b>Scaling and Overflow Behavior:</b> 00050 * \par 00051 * The function uses saturating arithmetic. 00052 * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. 00053 */ 00054 00055 void arm_add_q31( 00056 q31_t * pSrcA, 00057 q31_t * pSrcB, 00058 q31_t * pDst, 00059 uint32_t blockSize) 00060 { 00061 uint32_t blkCnt; /* loop counter */ 00062 00063 #if defined (ARM_MATH_DSP) 00064 00065 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00066 q31_t inA1, inA2, inA3, inA4; 00067 q31_t inB1, inB2, inB3, inB4; 00068 00069 /*loop Unrolling */ 00070 blkCnt = blockSize >> 2U; 00071 00072 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00073 ** a second loop below computes the remaining 1 to 3 samples. */ 00074 while (blkCnt > 0U) 00075 { 00076 /* C = A + B */ 00077 /* Add and then store the results in the destination buffer. */ 00078 inA1 = *pSrcA++; 00079 inA2 = *pSrcA++; 00080 inB1 = *pSrcB++; 00081 inB2 = *pSrcB++; 00082 00083 inA3 = *pSrcA++; 00084 inA4 = *pSrcA++; 00085 inB3 = *pSrcB++; 00086 inB4 = *pSrcB++; 00087 00088 *pDst++ = __QADD(inA1, inB1); 00089 *pDst++ = __QADD(inA2, inB2); 00090 *pDst++ = __QADD(inA3, inB3); 00091 *pDst++ = __QADD(inA4, inB4); 00092 00093 /* Decrement the loop counter */ 00094 blkCnt--; 00095 } 00096 00097 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00098 ** No loop unrolling is used. */ 00099 blkCnt = blockSize % 0x4U; 00100 00101 while (blkCnt > 0U) 00102 { 00103 /* C = A + B */ 00104 /* Add and then store the results in the destination buffer. */ 00105 *pDst++ = __QADD(*pSrcA++, *pSrcB++); 00106 00107 /* Decrement the loop counter */ 00108 blkCnt--; 00109 } 00110 00111 #else 00112 00113 /* Run the below code for Cortex-M0 */ 00114 00115 00116 00117 /* Initialize blkCnt with number of samples */ 00118 blkCnt = blockSize; 00119 00120 while (blkCnt > 0U) 00121 { 00122 /* C = A + B */ 00123 /* Add and then store the results in the destination buffer. */ 00124 *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); 00125 00126 /* Decrement the loop counter */ 00127 blkCnt--; 00128 } 00129 00130 #endif /* #if defined (ARM_MATH_DSP) */ 00131 00132 } 00133 00134 /** 00135 * @} end of BasicAdd group 00136 */ 00137
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