Robert Lopez / CMSIS5

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DSP/source/SupportFunctions/arm_copy_q31.c@0:eedb7d567a5d, 2018-04-12 (annotated)

Committer:
robert_lp
Date:
Thu Apr 12 01:31:58 2018 +0000
Revision:
0:eedb7d567a5d
CMSIS5 Library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
robert_lp 0:eedb7d567a5d 1 /* ----------------------------------------------------------------------
robert_lp 0:eedb7d567a5d 2 * Project: CMSIS DSP Library
robert_lp 0:eedb7d567a5d 3 * Title: arm_copy_q31.c
robert_lp 0:eedb7d567a5d 4 * Description: Copies the elements of a Q31 vector
robert_lp 0:eedb7d567a5d 5 *
robert_lp 0:eedb7d567a5d 6 * $Date: 27. January 2017
robert_lp 0:eedb7d567a5d 7 * $Revision: V.1.5.1
robert_lp 0:eedb7d567a5d 8 *
robert_lp 0:eedb7d567a5d 9 * Target Processor: Cortex-M cores
robert_lp 0:eedb7d567a5d 10 * -------------------------------------------------------------------- */
robert_lp 0:eedb7d567a5d 11 /*
robert_lp 0:eedb7d567a5d 12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
robert_lp 0:eedb7d567a5d 13 *
robert_lp 0:eedb7d567a5d 14 * SPDX-License-Identifier: Apache-2.0
robert_lp 0:eedb7d567a5d 15 *
robert_lp 0:eedb7d567a5d 16 * Licensed under the Apache License, Version 2.0 (the License); you may
robert_lp 0:eedb7d567a5d 17 * not use this file except in compliance with the License.
robert_lp 0:eedb7d567a5d 18 * You may obtain a copy of the License at
robert_lp 0:eedb7d567a5d 19 *
robert_lp 0:eedb7d567a5d 20 * www.apache.org/licenses/LICENSE-2.0
robert_lp 0:eedb7d567a5d 21 *
robert_lp 0:eedb7d567a5d 22 * Unless required by applicable law or agreed to in writing, software
robert_lp 0:eedb7d567a5d 23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
robert_lp 0:eedb7d567a5d 24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
robert_lp 0:eedb7d567a5d 25 * See the License for the specific language governing permissions and
robert_lp 0:eedb7d567a5d 26 * limitations under the License.
robert_lp 0:eedb7d567a5d 27 */
robert_lp 0:eedb7d567a5d 28
robert_lp 0:eedb7d567a5d 29 #include "arm_math.h"
robert_lp 0:eedb7d567a5d 30
robert_lp 0:eedb7d567a5d 31 /**
robert_lp 0:eedb7d567a5d 32 * @ingroup groupSupport
robert_lp 0:eedb7d567a5d 33 */
robert_lp 0:eedb7d567a5d 34
robert_lp 0:eedb7d567a5d 35 /**
robert_lp 0:eedb7d567a5d 36 * @addtogroup copy
robert_lp 0:eedb7d567a5d 37 * @{
robert_lp 0:eedb7d567a5d 38 */
robert_lp 0:eedb7d567a5d 39
robert_lp 0:eedb7d567a5d 40 /**
robert_lp 0:eedb7d567a5d 41 * @brief Copies the elements of a Q31 vector.
robert_lp 0:eedb7d567a5d 42 * @param[in] *pSrc points to input vector
robert_lp 0:eedb7d567a5d 43 * @param[out] *pDst points to output vector
robert_lp 0:eedb7d567a5d 44 * @param[in] blockSize length of the input vector
robert_lp 0:eedb7d567a5d 45 * @return none.
robert_lp 0:eedb7d567a5d 46 *
robert_lp 0:eedb7d567a5d 47 */
robert_lp 0:eedb7d567a5d 48
robert_lp 0:eedb7d567a5d 49 void arm_copy_q31(
robert_lp 0:eedb7d567a5d 50 q31_t * pSrc,
robert_lp 0:eedb7d567a5d 51 q31_t * pDst,
robert_lp 0:eedb7d567a5d 52 uint32_t blockSize)
robert_lp 0:eedb7d567a5d 53 {
robert_lp 0:eedb7d567a5d 54 uint32_t blkCnt; /* loop counter */
robert_lp 0:eedb7d567a5d 55
robert_lp 0:eedb7d567a5d 56
robert_lp 0:eedb7d567a5d 57 #if defined (ARM_MATH_DSP)
robert_lp 0:eedb7d567a5d 58
robert_lp 0:eedb7d567a5d 59 /* Run the below code for Cortex-M4 and Cortex-M3 */
robert_lp 0:eedb7d567a5d 60 q31_t in1, in2, in3, in4;
robert_lp 0:eedb7d567a5d 61
robert_lp 0:eedb7d567a5d 62 /*loop Unrolling */
robert_lp 0:eedb7d567a5d 63 blkCnt = blockSize >> 2U;
robert_lp 0:eedb7d567a5d 64
robert_lp 0:eedb7d567a5d 65 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
robert_lp 0:eedb7d567a5d 66 ** a second loop below computes the remaining 1 to 3 samples. */
robert_lp 0:eedb7d567a5d 67 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 68 {
robert_lp 0:eedb7d567a5d 69 /* C = A */
robert_lp 0:eedb7d567a5d 70 /* Copy and then store the values in the destination buffer */
robert_lp 0:eedb7d567a5d 71 in1 = *pSrc++;
robert_lp 0:eedb7d567a5d 72 in2 = *pSrc++;
robert_lp 0:eedb7d567a5d 73 in3 = *pSrc++;
robert_lp 0:eedb7d567a5d 74 in4 = *pSrc++;
robert_lp 0:eedb7d567a5d 75
robert_lp 0:eedb7d567a5d 76 *pDst++ = in1;
robert_lp 0:eedb7d567a5d 77 *pDst++ = in2;
robert_lp 0:eedb7d567a5d 78 *pDst++ = in3;
robert_lp 0:eedb7d567a5d 79 *pDst++ = in4;
robert_lp 0:eedb7d567a5d 80
robert_lp 0:eedb7d567a5d 81 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 82 blkCnt--;
robert_lp 0:eedb7d567a5d 83 }
robert_lp 0:eedb7d567a5d 84
robert_lp 0:eedb7d567a5d 85 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
robert_lp 0:eedb7d567a5d 86 ** No loop unrolling is used. */
robert_lp 0:eedb7d567a5d 87 blkCnt = blockSize % 0x4U;
robert_lp 0:eedb7d567a5d 88
robert_lp 0:eedb7d567a5d 89 #else
robert_lp 0:eedb7d567a5d 90
robert_lp 0:eedb7d567a5d 91 /* Run the below code for Cortex-M0 */
robert_lp 0:eedb7d567a5d 92
robert_lp 0:eedb7d567a5d 93 /* Loop over blockSize number of values */
robert_lp 0:eedb7d567a5d 94 blkCnt = blockSize;
robert_lp 0:eedb7d567a5d 95
robert_lp 0:eedb7d567a5d 96 #endif /* #if defined (ARM_MATH_DSP) */
robert_lp 0:eedb7d567a5d 97
robert_lp 0:eedb7d567a5d 98 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 99 {
robert_lp 0:eedb7d567a5d 100 /* C = A */
robert_lp 0:eedb7d567a5d 101 /* Copy and then store the value in the destination buffer */
robert_lp 0:eedb7d567a5d 102 *pDst++ = *pSrc++;
robert_lp 0:eedb7d567a5d 103
robert_lp 0:eedb7d567a5d 104 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 105 blkCnt--;
robert_lp 0:eedb7d567a5d 106 }
robert_lp 0:eedb7d567a5d 107 }
robert_lp 0:eedb7d567a5d 108
robert_lp 0:eedb7d567a5d 109 /**
robert_lp 0:eedb7d567a5d 110 * @} end of BasicCopy group
robert_lp 0:eedb7d567a5d 111 */
robert_lp 0:eedb7d567a5d 112