Rodrigo Almeida / pqdb

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Dependents:   pqdb_demo

serial.cpp@5:90824f533655, 2017-10-03 (annotated)

Committer:
rmaalmeida
Date:
Tue Oct 03 00:46:11 2017 +0000
Revision:
5:90824f533655
serial driver ready. using mbed Serial getc and putc for speed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rmaalmeida 5:90824f533655 1 #include "serial.h"
rmaalmeida 5:90824f533655 2 //#include "io.h"
rmaalmeida 5:90824f533655 3 //#include "derivative.h"
rmaalmeida 5:90824f533655 4 #include "mbed.h"
rmaalmeida 5:90824f533655 5
rmaalmeida 5:90824f533655 6 Serial uart(D1,D0);
rmaalmeida 5:90824f533655 7
rmaalmeida 5:90824f533655 8 void serialSend(char c) {
rmaalmeida 5:90824f533655 9 while(!uart.writable());
rmaalmeida 5:90824f533655 10 /* while (!(UART0_S1_REG(UART0_BASE_PTR) & UART0_S1_TDRE_MASK));
rmaalmeida 5:90824f533655 11 UART0_D_REG(UART0_BASE_PTR) = c;
rmaalmeida 5:90824f533655 12 */
rmaalmeida 5:90824f533655 13 uart.putc(c);
rmaalmeida 5:90824f533655 14 }
rmaalmeida 5:90824f533655 15 char serialRead(void) {
rmaalmeida 5:90824f533655 16 /*
rmaalmeida 5:90824f533655 17 //Verificar se h� algo dispon�vel
rmaalmeida 5:90824f533655 18 if ((UART0_S1_REG(UART0_BASE_PTR) & UART0_S1_RDRF_MASK)) {
rmaalmeida 5:90824f533655 19 //L� o registro da serial
rmaalmeida 5:90824f533655 20 return UART0_D_REG(UART0_BASE_PTR) ;
rmaalmeida 5:90824f533655 21 } else {
rmaalmeida 5:90824f533655 22 //C�digo para "n�o h� caracter dispon�vel"
rmaalmeida 5:90824f533655 23 return 0xff;
rmaalmeida 5:90824f533655 24 }
rmaalmeida 5:90824f533655 25 */
rmaalmeida 5:90824f533655 26 if(uart.readable()){
rmaalmeida 5:90824f533655 27 return uart.getc();
rmaalmeida 5:90824f533655 28 }else{
rmaalmeida 5:90824f533655 29 return 0xff;
rmaalmeida 5:90824f533655 30 }
rmaalmeida 5:90824f533655 31 //return 42;
rmaalmeida 5:90824f533655 32 }
rmaalmeida 5:90824f533655 33
rmaalmeida 5:90824f533655 34 void serialInit(void) {
rmaalmeida 5:90824f533655 35 uart.baud(9600);
rmaalmeida 5:90824f533655 36 /*
rmaalmeida 5:90824f533655 37 unsigned int sbr_val;
rmaalmeida 5:90824f533655 38 //Configura os terminais D0 e D1
rmaalmeida 5:90824f533655 39 PORTB_PCR1 = PORT_PCR_MUX(0x2);
rmaalmeida 5:90824f533655 40 PORTB_PCR2 = PORT_PCR_MUX(0x2);
rmaalmeida 5:90824f533655 41 //Seleciona o clock da serial a partir do clock principal da CPU
rmaalmeida 5:90824f533655 42 SIM_SOPT2 |= SIM_SOPT2_UART0SRC(1);
rmaalmeida 5:90824f533655 43 //habilita o clock para o perif�rico da UART
rmaalmeida 5:90824f533655 44 SIM_SCGC4 |= SIM_SCGC4_UART0_MASK;
rmaalmeida 5:90824f533655 45 // Desliga a UART antes de configur�-lo
rmaalmeida 5:90824f533655 46 UART0_C2 &= ~(UART0_C2_TE_MASK | UART0_C2_RE_MASK);
rmaalmeida 5:90824f533655 47 //A velocidade de transmiss�o � dada por: baudrate = sys_clock/(OSR * sbr)
rmaalmeida 5:90824f533655 48 // Configurando OSR para 10x
rmaalmeida 5:90824f533655 49 UART0_C4 = (10-1);//sempre 1 unidade a menos
rmaalmeida 5:90824f533655 50 //escolhendo o valor de sbr para um baudrate de 115200
rmaalmeida 5:90824f533655 51 //sbr_val = (sys_clock) / (baudrate * OSR));
rmaalmeida 5:90824f533655 52 sbr_val = (unsigned int) (24000000 / (115200 * 10));
rmaalmeida 5:90824f533655 53 //o valor de sbr tem que ser armazenado em dois registros diferentes
rmaalmeida 5:90824f533655 54 //os 5 bits mais altos v�o para o UART0_BDH
rmaalmeida 5:90824f533655 55 UART0_BDH = ((sbr_val & 0x1F00) >> 8);
rmaalmeida 5:90824f533655 56 //os 8 mais baixos v�o para UART0_BDL
rmaalmeida 5:90824f533655 57 UART0_BDL = sbr_val & 0x00FF;
rmaalmeida 5:90824f533655 58 //Liga o transmissor e o receptor
rmaalmeida 5:90824f533655 59 UART0_C2 |= (UART0_C2_TE_MASK | UART0_C2_RE_MASK);
rmaalmeida 5:90824f533655 60 */
rmaalmeida 5:90824f533655 61 }