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targets/TARGET_ONSEMI/TARGET_NCS36510/Pad.c@153:0a78729d3229, 2017-01-22 (annotated)
- Committer:
- riktw
- Date:
- Sun Jan 22 22:20:36 2017 +0000
- Revision:
- 153:0a78729d3229
- Parent:
- 150:02e0a0aed4ec
Back to 8Mhz clock. Revision 1.0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /** |
<> | 149:156823d33999 | 2 | ****************************************************************************** |
<> | 149:156823d33999 | 3 | * @file pad.c |
<> | 149:156823d33999 | 4 | * @brief PAD management support code |
<> | 149:156823d33999 | 5 | * @internal |
<> | 149:156823d33999 | 6 | * @author ON Semiconductor |
<> | 149:156823d33999 | 7 | * $Rev: 2848 $ |
<> | 149:156823d33999 | 8 | * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $ |
<> | 149:156823d33999 | 9 | ****************************************************************************** |
<> | 149:156823d33999 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
<> | 149:156823d33999 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
<> | 149:156823d33999 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
<> | 149:156823d33999 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
<> | 149:156823d33999 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
<> | 149:156823d33999 | 15 | * if applicable the software license agreement. Do not use this software and/or |
<> | 149:156823d33999 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
<> | 149:156823d33999 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
<> | 149:156823d33999 | 18 | * terms and conditions. |
<> | 149:156823d33999 | 19 | * |
<> | 149:156823d33999 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
<> | 149:156823d33999 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
<> | 149:156823d33999 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
<> | 149:156823d33999 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
<> | 149:156823d33999 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
<> | 149:156823d33999 | 25 | * @endinternal |
<> | 149:156823d33999 | 26 | * |
<> | 149:156823d33999 | 27 | * @ingroup pad |
<> | 149:156823d33999 | 28 | * |
<> | 149:156823d33999 | 29 | * @details |
<> | 149:156823d33999 | 30 | */ |
<> | 149:156823d33999 | 31 | |
<> | 149:156823d33999 | 32 | /************************************************************************************************* |
<> | 149:156823d33999 | 33 | * * |
<> | 149:156823d33999 | 34 | * Header files * |
<> | 149:156823d33999 | 35 | * * |
<> | 149:156823d33999 | 36 | *************************************************************************************************/ |
<> | 149:156823d33999 | 37 | |
<> | 149:156823d33999 | 38 | #include "memory_map.h" |
<> | 149:156823d33999 | 39 | #include "pad_map.h" |
<> | 149:156823d33999 | 40 | #include "clock.h" |
<> | 149:156823d33999 | 41 | |
<> | 149:156823d33999 | 42 | /************************************************************************************************* |
<> | 149:156823d33999 | 43 | * * |
<> | 149:156823d33999 | 44 | * Symbolic Constants * |
<> | 149:156823d33999 | 45 | * * |
<> | 149:156823d33999 | 46 | *************************************************************************************************/ |
<> | 149:156823d33999 | 47 | #define PAD_CTRL_OP_DRIVE_STRENGTH_MASK (uint32_t)0x1C |
<> | 149:156823d33999 | 48 | #define PAD_NUM_OF_IO 17 |
<> | 149:156823d33999 | 49 | #define PAD_OP_DRIVE_STRGTH_MAX 7 |
<> | 149:156823d33999 | 50 | #define PAD_OP_DRIVE_TYPE_MAX 1 |
<> | 149:156823d33999 | 51 | #define PAD_OP_PULL_TYPE_MAX 3 |
<> | 149:156823d33999 | 52 | |
<> | 149:156823d33999 | 53 | #define PAD_REG_ADRS_BYTE_SIZE 4 |
<> | 149:156823d33999 | 54 | |
<> | 149:156823d33999 | 55 | #define PAD_OP_DRIVE_STRGTH_BIT_POS 2 |
<> | 149:156823d33999 | 56 | #define PAD_OP_DRIVE_TYPE_BIT_POS 5 |
<> | 149:156823d33999 | 57 | #define PAD_OP_PULL_TYPE_BIT_POS 0 |
<> | 149:156823d33999 | 58 | |
<> | 149:156823d33999 | 59 | /************************************************************************************************* |
<> | 149:156823d33999 | 60 | * * |
<> | 149:156823d33999 | 61 | * Global variables * |
<> | 149:156823d33999 | 62 | * * |
<> | 149:156823d33999 | 63 | *************************************************************************************************/ |
<> | 149:156823d33999 | 64 | |
<> | 149:156823d33999 | 65 | /* Peripheral PAD register mutex */ |
<> | 149:156823d33999 | 66 | /* sem_pt GlobMutexPadReg; */ |
<> | 149:156823d33999 | 67 | |
<> | 149:156823d33999 | 68 | /************************************************************************************************* |
<> | 149:156823d33999 | 69 | * * |
<> | 149:156823d33999 | 70 | * Functions * |
<> | 149:156823d33999 | 71 | * * |
<> | 149:156823d33999 | 72 | *************************************************************************************************/ |
<> | 149:156823d33999 | 73 | |
<> | 149:156823d33999 | 74 | /** Find description at pad.h */ |
<> | 149:156823d33999 | 75 | void fPadInit() |
<> | 149:156823d33999 | 76 | { |
<> | 149:156823d33999 | 77 | /** - Enable the clock for PAD peripheral device */ |
<> | 149:156823d33999 | 78 | CLOCK_ENABLE(CLOCK_PAD); |
<> | 149:156823d33999 | 79 | |
<> | 149:156823d33999 | 80 | /** - Set pad parameters, output drive strength, pull piece control, output drive type */ |
<> | 149:156823d33999 | 81 | PADREG->PADIO0.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 TXD */ |
<> | 149:156823d33999 | 82 | PADREG->PADIO1.WORD = PAD_INPUT_PD_L1_PP; /* UART1 RXD */ |
<> | 149:156823d33999 | 83 | PADREG->PADIO2.WORD = PAD_INPUT_PD_L1_PP; /* UART1 CTS */ |
<> | 149:156823d33999 | 84 | PADREG->PADIO3.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 RTS */ |
<> | 150:02e0a0aed4ec | 85 | PADREG->PADIO4.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 150:02e0a0aed4ec | 86 | PADREG->PADIO5.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 150:02e0a0aed4ec | 87 | PADREG->PADIO6.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 150:02e0a0aed4ec | 88 | PADREG->PADIO7.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 149:156823d33999 | 89 | PADREG->PADIO8.WORD = PAD_OUTPUT_PN_L1_OD; /* UART2 TXD */ |
<> | 149:156823d33999 | 90 | PADREG->PADIO9.WORD = PAD_INPUT_PD_L1_PP; /* UART2 RXD */ |
<> | 150:02e0a0aed4ec | 91 | PADREG->PADIO10.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 149:156823d33999 | 92 | PADREG->PADIO11.WORD = PAD_INPUT_PD_L1_PP; /* SWO */ |
<> | 149:156823d33999 | 93 | PADREG->PADIO12.WORD = PAD_INPUT_PD_L1_PP; /* SWCLK */ |
<> | 149:156823d33999 | 94 | PADREG->PADIO13.WORD = PAD_INPUT_PD_L1_PP; /* SWDIO */ |
<> | 149:156823d33999 | 95 | PADREG->PADIO14.WORD = PAD_INPUT_PD_L1_PP; |
<> | 150:02e0a0aed4ec | 96 | PADREG->PADIO15.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 150:02e0a0aed4ec | 97 | PADREG->PADIO16.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 150:02e0a0aed4ec | 98 | PADREG->PADIO17.WORD = PAD_UNUSED_PD_L1_PP; |
<> | 149:156823d33999 | 99 | |
<> | 149:156823d33999 | 100 | /** - Disable the clock for PAD peripheral device */ |
<> | 149:156823d33999 | 101 | CLOCK_DISABLE(CLOCK_PAD); |
<> | 149:156823d33999 | 102 | |
<> | 149:156823d33999 | 103 | } |
<> | 149:156823d33999 | 104 | |
<> | 149:156823d33999 | 105 | /** Find description at pad.h */ |
<> | 149:156823d33999 | 106 | boolean fPadIOCtrl(uint8_t PadNum, uint8_t OutputDriveStrength, uint8_t OutputDriveType, uint8_t PullType) |
<> | 149:156823d33999 | 107 | { |
<> | 149:156823d33999 | 108 | PadReg_t *PadRegOffset; |
<> | 149:156823d33999 | 109 | /** \verbatim |
<> | 149:156823d33999 | 110 | Table: O/p drive strength |
<> | 149:156823d33999 | 111 | |
<> | 149:156823d33999 | 112 | Drive strength 3.3V (min/typ/max) 1V (min/typ/max) |
<> | 149:156823d33999 | 113 | 000 1/1.4/2.1 mA 0.043/0.07/0.11 mA |
<> | 149:156823d33999 | 114 | 001 2/2.7/4.1 mA 0.086/0.15/0.215 mA |
<> | 149:156823d33999 | 115 | 010 4.1/5.3/7.8 mA 0.188/0.3/0.4 mA |
<> | 149:156823d33999 | 116 | 011 8.1/10.4/15 8 mA 0.4/0.6/0.81 mA |
<> | 149:156823d33999 | 117 | 100 20.8/26/37 mA* 1/1.6/2.2 mA |
<> | 149:156823d33999 | 118 | 101 40.5/50/70 mA* 2/3/4.3 mA |
<> | 149:156823d33999 | 119 | 11x 57/73/102 mA* 3/4.6/6.2 mA |
<> | 149:156823d33999 | 120 | |
<> | 149:156823d33999 | 121 | *Values are only accessible when CDBGPWRUPREQ is high. This limits the maximum output current in functional mode. \endverbatim */ |
<> | 149:156823d33999 | 122 | |
<> | 149:156823d33999 | 123 | |
<> | 149:156823d33999 | 124 | if((PadNum <= PAD_NUM_OF_IO) && |
<> | 149:156823d33999 | 125 | (OutputDriveStrength <= PAD_OP_DRIVE_STRGTH_MAX) && |
<> | 149:156823d33999 | 126 | (OutputDriveType <= PAD_OP_DRIVE_TYPE_MAX) && (PullType <= PAD_OP_PULL_TYPE_MAX)) { |
<> | 149:156823d33999 | 127 | /** - Get PAD IO register address for the PAD number */ |
<> | 149:156823d33999 | 128 | PadRegOffset = (PadReg_t*)(PADREG_BASE + (PadNum * PAD_REG_ADRS_BYTE_SIZE)); |
<> | 149:156823d33999 | 129 | |
<> | 149:156823d33999 | 130 | /** - Enable the clock for PAD peripheral device */ |
<> | 149:156823d33999 | 131 | CLOCK_ENABLE(CLOCK_PAD); |
<> | 149:156823d33999 | 132 | |
<> | 149:156823d33999 | 133 | /** - Set drive type, pulltype & drive strength */ |
<> | 149:156823d33999 | 134 | PadRegOffset->PADIO0.WORD = (uint32_t)((PullType << PAD_OP_PULL_TYPE_BIT_POS) | |
<> | 149:156823d33999 | 135 | (OutputDriveStrength << PAD_OP_DRIVE_STRGTH_BIT_POS) | |
<> | 149:156823d33999 | 136 | (OutputDriveType << PAD_OP_DRIVE_TYPE_BIT_POS)); |
<> | 149:156823d33999 | 137 | |
<> | 149:156823d33999 | 138 | /** - Disable the clock for PAD peripheral device */ |
<> | 149:156823d33999 | 139 | CLOCK_DISABLE(CLOCK_PAD); |
<> | 149:156823d33999 | 140 | return True; |
<> | 149:156823d33999 | 141 | } |
<> | 149:156823d33999 | 142 | /* Invalid parameter/s */ |
<> | 149:156823d33999 | 143 | return False; |
<> | 150:02e0a0aed4ec | 144 | } |