mbed lib with startup delay fixed for Nucleo401RE
Fork of mbed-src by
Revision 253:fd34e7cf1b98, committed 2014-07-09
- Comitter:
- mbed_official
- Date:
- Wed Jul 09 11:00:08 2014 +0100
- Parent:
- 252:188cc9bd3bd4
- Child:
- 254:181b5e179739
- Commit message:
- Synchronized with git revision 9413ed9163336a982bd7eaf9d7bece203efdd33d
Full URL: https://github.com/mbedmicro/mbed/commit/9413ed9163336a982bd7eaf9d7bece203efdd33d/
Changed in this revision
targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c | Show annotated file Show diff for this revision Revisions of this file |
--- a/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c Tue Jul 08 16:45:08 2014 +0100 +++ b/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c Wed Jul 09 11:00:08 2014 +0100 @@ -84,13 +84,13 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { int is_stdio_uart = 0; - + // determine the UART to use UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); MBED_ASSERT((int)uart != NC); - + obj->uart = (LPC_UART_TypeDef *)uart; // enable power switch (uart) { @@ -110,19 +110,19 @@ obj->uart->IER = 0 << 0 // Rx Data available irq enable | 0 << 1 // Tx Fifo empty irq enable | 0 << 2; // Rx Line Status irq enable - + // set default baud rate and format serial_baud (obj, 9600); serial_format(obj, 8, ParityNone, 1); - + // pinout the chosen uart pinmap_pinout(tx, PinMap_UART_TX); pinmap_pinout(rx, PinMap_UART_RX); - + // set rx/tx pins in PullUp mode pin_mode(tx, PullUp); pin_mode(rx, PullUp); - + switch (uart) { case UART_0: obj->index = 0; break; case UART_1: obj->index = 1; break; @@ -132,9 +132,9 @@ uart_data[obj->index].sw_rts.pin = NC; uart_data[obj->index].sw_cts.pin = NC; serial_set_flow_control(obj, FlowControlNone, NC, NC); - + is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); - + if (is_stdio_uart) { stdio_uart_inited = 1; memcpy(&stdio_uart, obj, sizeof(serial_t)); @@ -166,9 +166,9 @@ case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break; default: break; } - + uint32_t PCLK = SystemCoreClock; - + // First we check to see if the basic divide with no DivAddVal/MulVal // ratio gives us an integer result. If it does, we set DivAddVal = 0, // MulVal = 1. Otherwise, we search the valid ratio value range to find @@ -229,16 +229,16 @@ } } } - + // set LCR[DLAB] to enable writing to divider registers obj->uart->LCR |= (1 << 7); - + // set divider values obj->uart->DLM = (DL >> 8) & 0xFF; obj->uart->DLL = (DL >> 0) & 0xFF; obj->uart->FDR = (uint32_t) DivAddVal << 0 | (uint32_t) MulVal << 4; - + // clear LCR[DLAB] obj->uart->LCR &= ~(1 << 7); } @@ -260,9 +260,10 @@ case ParityForced1: parity_enable = 1; parity_select = 2; break; case ParityForced0: parity_enable = 1; parity_select = 3; break; default: + parity_enable = 0, parity_select = 0; break; } - + obj->uart->LCR = data_bits << 0 | stop_bits << 2 | parity_enable << 3 @@ -310,7 +311,7 @@ case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break; case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break; } - + if (enable) { obj->uart->IER |= 1 << irq; NVIC_SetVector(irq_n, vector);