FXOS8700CQ.cpp

00001 #include "FXOS8700CQ.h"
00002 
00003 uint8_t status_reg; // Status register contents
00004 uint8_t raw[FXOS8700CQ_READ_LEN]; // Buffer for reading out stored data
00005 
00006 // Construct class and its contents
00007 FXOS8700CQ::FXOS8700CQ(PinName sda, PinName scl, int addr) : dev_i2c(sda, scl), dev_addr(addr)
00008 {
00009     // Initialization of the FXOS8700CQ
00010     dev_i2c.frequency(I2C_400K); // Use maximum I2C frequency
00011     uint8_t data[6] = {0, 0, 0, 0, 0, 0}; // to write over I2C: device register, up to 5 bytes data
00012 
00013     // TODO: verify WHOAMI?
00014 
00015     // Place peripheral in standby for configuration, resetting CTRL_REG1
00016     data[0] = FXOS8700CQ_CTRL_REG1;
00017     data[1] = 0x00; // this will unset CTRL_REG1:active
00018     write_regs(data, 2);
00019 
00020     // Now that the device is in standby, configure registers at will
00021 
00022     // Setup for write-though for CTRL_REG series
00023     // Keep data[0] as FXOS8700CQ_CTRL_REG1
00024     data[1] =
00025         FXOS8700CQ_CTRL_REG1_ASLP_RATE2(1) | // 0b01 gives sleep rate of 12.5Hz
00026         FXOS8700CQ_CTRL_REG1_DR3(1); // 0x001 gives ODR of 400Hz/200Hz hybrid
00027 
00028     // FXOS8700CQ_CTRL_REG2;
00029     data[2] =
00030         FXOS8700CQ_CTRL_REG2_SMODS2(3) | // 0b11 gives low power sleep oversampling mode
00031         FXOS8700CQ_CTRL_REG2_MODS2(1); // 0b01 gives low noise, low power oversampling mode
00032 
00033 //MPL  - don't configure interrupts here.
00034 /*
00035     // No configuration changes from default 0x00 in CTRL_REG3
00036     // Interrupts will be active low, their outputs in push-pull mode
00037     data[3] = 0x00;
00038 
00039 
00040     // FXOS8700CQ_CTRL_REG4;
00041     data[4] = 
00042         FXOS8700CQ_CTRL_REG4_INT_EN_DRDY; // Enable the Data-Ready interrupt
00043 
00044     // No configuration changes from default 0x00 in CTRL_REG5
00045     // Data-Ready interrupt will appear on INT2
00046     data[5] = 0x00;
00047 
00048     // Write to the 4 CTRL_REG registers
00049 
00050    write_regs(data, 6);
00051 */
00052     write_regs(data, 3);
00053 
00054     // FXOS8700CQ_XYZ_DATA_CFG
00055     data[0] = FXOS8700CQ_XYZ_DATA_CFG;
00056     data[1] =
00057         FXOS8700CQ_XYZ_DATA_CFG_FS2(1); // 0x01 gives 4g full range, 0.488mg/LSB
00058     write_regs(data, 2);
00059 
00060     // Setup for write-through for M_CTRL_REG series
00061     data[0] = FXOS8700CQ_M_CTRL_REG1;
00062     data[1] =
00063         FXOS8700CQ_M_CTRL_REG1_M_ACAL | // set automatic calibration
00064         FXOS8700CQ_M_CTRL_REG1_MO_OS3(7) | // use maximum magnetic oversampling
00065         FXOS8700CQ_M_CTRL_REG1_M_HMS2(3); // enable hybrid sampling (both sensors)
00066 
00067     // FXOS8700CQ_M_CTRL_REG2
00068     data[2] =
00069         FXOS8700CQ_M_CTRL_REG2_HYB_AUTOINC_MODE;
00070 
00071     // FXOS8700CQ_M_CTRL_REG3
00072     data[3] =
00073         FXOS8700CQ_M_CTRL_REG3_M_ASLP_OS3(7); // maximum sleep magnetic oversampling
00074 
00075     // Write to the 3 M_CTRL_REG registers
00076     write_regs(data, 4);
00077 
00078 
00079     // Peripheral is configured, but disabled
00080     enabled = false;
00081 }
00082 
00083 // Destruct class
00084 FXOS8700CQ::~FXOS8700CQ(void) {}
00085 
00086 
00087 void FXOS8700CQ::enable(void)
00088 {
00089     uint8_t data[2];
00090     read_regs( FXOS8700CQ_CTRL_REG1, &data[1], 1);
00091     data[1] |= FXOS8700CQ_CTRL_REG1_ACTIVE;
00092     data[0] = FXOS8700CQ_CTRL_REG1;
00093     write_regs(data, 2); // write back
00094 
00095     enabled = true;
00096 }
00097 
00098 //MPL
00099 uint8_t FXOS8700CQ::config_int( void)
00100 {
00101         
00102    /*don't enable interrupts in constructor.  Do that here. */
00103  
00104    /* todo: pass in a structure and have this function enable the interrupts you want, set the pin you want them to come out on, and set whether active high or low */
00105  
00106     uint8_t data[2];
00107      
00108    //external interrupt signal is active low & push-pull by default (bit value 0).
00109     data[0] = FXOS8700CQ_CTRL_REG3;
00110     data[1] = 0x08;   //enable freefall/motion detection interrupt to wake sensor from sleep mode   
00111     write_regs(data, 2);
00112    
00113     data[0] = FXOS8700CQ_CTRL_REG4;   
00114     data[1] = 0x04;   //enable freefall/motion detection interrupt
00115     write_regs(data, 2);
00116 
00117     //by default it comes out on INT2
00118      //INT2 connected to PTD1 on FRDM-KL26Z
00119     data[0] = FXOS8700CQ_CTRL_REG5;   
00120     data[1] = 0x00;   //interrupts come out on INT2
00121     write_regs(data, 2);
00122 
00123     //todo: what is the correct return value for okay?
00124     return 99;
00125 }
00126 
00127 //MPL 
00128 void FXOS8700CQ::clear_int( void)
00129 {
00130     /* todo: pass in a structure and have this function clear the interrupts you want */
00131    
00132    //this is only for the freefall / motion detection
00133    
00134     uint8_t data[2];
00135 
00136     read_regs(FXOS8700CQ_INT_SOURCE, &data[1], 1);  // need to clear this because we had selected to latch the interrupt
00137     //printf("INT_SOURCE = %x\n",data[1]);
00138     
00139     read_regs(FXOS8700CQ_A_FFMT_SRC, &data[1], 1);  //clear the motion interrupt because we enabled it
00140     //printf("A_FFMT_SRC = %x\n",data[1]);
00141     
00142 }
00143 
00144 //MPL
00145 uint8_t FXOS8700CQ::config_feature( void)
00146 {
00147   //dont enable specific features (tap detection, motion detection, etc) in constructor - do that here
00148 //todo: should this be in a separate function that allows users to select what capabilities to enable?
00149 
00150 //MPL - enable motion detection 
00151 
00152    uint8_t data[2];
00153    
00154     data[0] = FXOS8700CQ_A_FFMT_CFG;
00155     data[1] = 0x78;    //(don't latch event in register.)  bit6: 1 motion flag.  bits5,4,3: 1 enable detection in all 3 accel axis
00156     write_regs(data, 2);
00157     
00158     data[0] = FXOS8700CQ_A_FFMT_THS;
00159     data[1] = 0x07;  //will this work??   //do I need to enable the debounce filter?
00160     write_regs(data, 2);
00161 
00162     return 0; // not implemented return yet
00163 
00164 }
00165 void FXOS8700CQ::disable(void)
00166 {
00167     uint8_t data[2];
00168     read_regs( FXOS8700CQ_CTRL_REG1, &data[1], 1);
00169     data[0] = FXOS8700CQ_CTRL_REG1;
00170     data[1] &= ~FXOS8700CQ_CTRL_REG1_ACTIVE;
00171     write_regs(data, 2); // write back
00172 
00173     enabled = false;
00174 }
00175 
00176 
00177 uint8_t FXOS8700CQ::status (void)
00178 {
00179     read_regs(FXOS8700CQ_STATUS, &status_reg, 1);
00180     return status_reg;
00181 }
00182 
00183 uint8_t FXOS8700CQ::get_whoami (void)
00184 {
00185     uint8_t databyte = 0x00;
00186     read_regs(FXOS8700CQ_WHOAMI, &databyte, 1);
00187     return databyte;
00188 }
00189 
00190 uint8_t FXOS8700CQ::get_data(SRAWDATA *accel_data, SRAWDATA *magn_data)
00191 {
00192     if(!enabled) {
00193         return 1;
00194     }
00195 
00196     read_regs(FXOS8700CQ_M_OUT_X_MSB, raw, FXOS8700CQ_READ_LEN);
00197 
00198     // Pull out 16-bit, 2's complement magnetometer data
00199     magn_data->x = (raw[0] << 8) | raw[1];
00200     magn_data->y = (raw[2] << 8) | raw[3];
00201     magn_data->z = (raw[4] << 8) | raw[5];
00202 
00203     // Pull out 14-bit, 2's complement, right-justified accelerometer data
00204     accel_data->x = (raw[6] << 8) | raw[7];
00205     accel_data->y = (raw[8] << 8) | raw[9];
00206     accel_data->z = (raw[10] << 8) | raw[11];
00207 
00208     // Have to apply corrections to make the int16_t correct
00209     if(accel_data->x > UINT14_MAX/2) {
00210         accel_data->x -= UINT14_MAX;
00211     }
00212     if(accel_data->y > UINT14_MAX/2) {
00213         accel_data->y -= UINT14_MAX;
00214     }
00215     if(accel_data->z > UINT14_MAX/2) {
00216         accel_data->z -= UINT14_MAX;
00217     }
00218 
00219     return 0;
00220 }
00221 
00222 uint8_t FXOS8700CQ::get_accel_scale(void)
00223 {
00224     uint8_t data = 0x00;
00225     read_regs(FXOS8700CQ_XYZ_DATA_CFG, &data, 1);
00226     data &= FXOS8700CQ_XYZ_DATA_CFG_FS2(3); // mask with 0b11
00227 
00228     // Choose output value based on masked data
00229     switch(data) {
00230         case FXOS8700CQ_XYZ_DATA_CFG_FS2(0):
00231             return 2;
00232         case FXOS8700CQ_XYZ_DATA_CFG_FS2(1):
00233             return 4;
00234         case FXOS8700CQ_XYZ_DATA_CFG_FS2(2):
00235             return 8;
00236         default:
00237             return 0;
00238     }
00239 }
00240 
00241 // Private methods
00242 
00243 // Excepting the call to dev_i2c.frequency() in the constructor,
00244 // the use of the mbed I2C class is restricted to these methods
00245 void FXOS8700CQ::read_regs(int reg_addr, uint8_t* data, int len)
00246 {
00247     char t[1] = {reg_addr};
00248     dev_i2c.write(dev_addr, t, 1, true);
00249     dev_i2c.read(dev_addr, (char *)data, len);
00250 }
00251 
00252 void FXOS8700CQ::write_regs(uint8_t* data, int len)
00253 {
00254     dev_i2c.write(dev_addr, (char*)data, len);
00255 }