Diff: FXOS8700CQ.h

Revision:

5:7bdb0d5e5287

Parent:

4:e2fe752b881e

--- a/FXOS8700CQ.h	Tue Jun 03 19:02:19 2014 +0000
+++ b/FXOS8700CQ.h	Sun Jan 10 17:45:05 2016 +0000
@@ -29,6 +29,27 @@
 #define FXOS8700CQ_M_CTRL_REG2 0x5C
 #define FXOS8700CQ_M_CTRL_REG3 0x5D
 
+/* start MPL additions */
+//MPL interrupts
+#define FXOS8700CQ_INT_SOURCE 0x0C
+//#define FXOS8700CQ_CTRL_REG2 0x2B   //bit 2 turns on auto-sleep
+//#define FXOS8700CQ_CTRL_REG3 0x2C  //interrupt control register
+//#define FXOS8700CQ_CTRL_REG4 0x2D  //interrupt enable register
+//#define FXOS8700CQ_CTRL_REG5 0x2E //interrupt routing config register, by default all routed to INT2
+
+//MPL motion detection
+#define FXOS8700CQ_A_FFMT_CFG 0x15
+#define FXOS8700CQ_A_FFMT_SRC 0x16
+#define FXOS8700CQ_A_FFMT_THS 0x17
+#define FXOS8700CQ_A_FFMT_COUNT 0x18
+#define FXOS8700CQ_A_FFMT_THS_X_MSB 0x73
+#define FXOS8700CQ_A_FFMT_THS_X_LSB 0x74
+#define FXOS8700CQ_A_FFMT_THS_Y_MSB 0x75
+#define FXOS8700CQ_A_FFMT_THS_Y_LSB 0x76
+#define FXOS8700CQ_A_FFMT_THS_Z_MSB 0x77
+#define FXOS8700CQ_A_FFMT_THS_Z_LSB 0x78 
+/* end MPL additions */
+
 // FXOS8700CQ configuration macros, per register
 
 #define FXOS8700CQ_CTRL_REG1_ASLP_RATE2(x) (x << 6) // x is 2-bit
@@ -161,7 +182,26 @@
     */
     uint8_t get_accel_scale(void);
 
+    /**
+    * configure external interrupts
+    *
+    * @return 2, 4, or 8, depending on part configuration; 0 on error
+    */
+    uint8_t config_int(void);
+    
+    /**
+    * configure feature (tap detection, motion detection, etc)
+    *
+    * @return 2, 4, or 8, depending on part configuration; 0 on error
+    */
+    uint8_t config_feature(void);
 
+    /**
+    * clear interrupt
+    *
+    * @return 2, 4, or 8, depending on part configuration; 0 on error
+    */    
+    void clear_int(void);
 
 private:
     I2C dev_i2c; // instance of the mbed I2C class