Diff: Links/I2CMaster.hpp

Revision:

7:471901a04573

Parent:

6:a8c83a2e6fa4

--- a/Links/I2CMaster.hpp	Wed Jan 23 13:11:04 2019 -0600
+++ b/Links/I2CMaster.hpp	Mon Mar 04 08:10:00 2019 -0600
@@ -51,7 +51,7 @@
 
   virtual ~I2CMaster() {}
 
-  /// Send start condition and address on the bus.
+  /// @brief Send start condition and address on the bus.
   /// @param address Address with R/W bit.
   virtual error_code start(uint_least8_t address) = 0;
   
@@ -65,9 +65,11 @@
   MaximInterface_EXPORT virtual error_code
   writeBlock(span<const uint_least8_t> data);
   
+  /// @brief
   /// Perform a complete write transaction on the bus with optional stop
   /// condition.
   /// @param address Address in 8-bit format.
+  /// @param data Data to write to the bus.
   /// @param sendStop
   /// True to send a stop condition or false to set up a repeated start.
   error_code writePacket(uint_least8_t address, span<const uint_least8_t> data,
@@ -75,20 +77,22 @@
     return writePacketImpl(address, data, sendStop);
   }
   
-  /// Read data byte from the bus.
+  /// @brief Read data byte from the bus.
   /// @param status Determines whether an ACK or NACK is sent after reading.
   /// @param[out] data Data read from the bus if successful.
   virtual error_code readByte(AckStatus status, uint_least8_t & data) = 0;
   
-  /// Read data block from the bus.
+  /// @brief Read data block from the bus.
   /// @param status Determines whether an ACK or NACK is sent after reading.
   /// @param[out] data Data read from the bus if successful.
   MaximInterface_EXPORT virtual error_code
   readBlock(AckStatus status, span<uint_least8_t> data);
   
+  /// @brief
   /// Perform a complete read transaction on the bus with optional stop
   /// condition.
   /// @param address Address in 8-bit format.
+  /// @param[out] data Data read from the bus if successful.
   /// @param sendStop
   /// True to send a stop condition or false to set up a repeated start.
   error_code readPacket(uint_least8_t address, span<uint_least8_t> data,