NanostackRfPhyAtmel.cpp

00001 /*
00002  * Copyright (c) 2014-2015 ARM Limited. All rights reserved.
00003  * SPDX-License-Identifier: Apache-2.0
00004  * Licensed under the Apache License, Version 2.0 (the License); you may
00005  * not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  * http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00012  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 #include <string.h>
00017 #include "platform/arm_hal_interrupt.h"
00018 #include "nanostack/platform/arm_hal_phy.h"
00019 #include "ns_types.h"
00020 #include "NanostackRfPhyAtmel.h"
00021 #include "randLIB.h"
00022 #include "AT86RFReg.h"
00023 #include "nanostack/platform/arm_hal_phy.h"
00024 #include "toolchain.h"
00025 
00026 /*Worst case sensitivity*/
00027 #define RF_DEFAULT_SENSITIVITY -88
00028 /*Run calibration every 5 minutes*/
00029 #define RF_CALIBRATION_INTERVAL 6000000
00030 /*Wait ACK for 2.5ms*/
00031 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50
00032 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/
00033 #define RF_CCA_BASE_BACKOFF 13 /* 650us */
00034 /*CCA random backoff (50us units)*/
00035 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */
00036 
00037 #define RF_MTU 127
00038 
00039 #define RF_PHY_MODE OQPSK_SIN_250
00040 
00041 /*Radio RX and TX state definitions*/
00042 #define RFF_ON 0x01
00043 #define RFF_RX 0x02
00044 #define RFF_TX 0x04
00045 #define RFF_CCA 0x08
00046 #define RFF_PROT 0x10
00047 
00048 typedef enum
00049 {
00050     RF_MODE_NORMAL = 0,
00051     RF_MODE_SNIFFER = 1,
00052     RF_MODE_ED = 2
00053 }rf_mode_t;
00054 
00055 /*Atmel RF Part Type*/
00056 typedef enum
00057 {
00058     ATMEL_UNKNOW_DEV = 0,
00059     ATMEL_AT86RF212,
00060     ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read)
00061     ATMEL_AT86RF233
00062 }rf_trx_part_e;
00063 
00064 /*Atmel RF states*/
00065 typedef enum
00066 {
00067     NOP = 0x00,
00068     BUSY_RX = 0x01,
00069     RF_TX_START = 0x02,
00070     FORCE_TRX_OFF = 0x03,
00071     FORCE_PLL_ON = 0x04,
00072     RX_ON = 0x06,
00073     TRX_OFF = 0x08,
00074     PLL_ON = 0x09,
00075     BUSY_RX_AACK = 0x11,
00076     SLEEP = 0x0F,
00077     RX_AACK_ON = 0x16,
00078     TX_ARET_ON = 0x19
00079 }rf_trx_states_t;
00080 
00081 static const uint8_t *rf_tx_data; // Points to Nanostack's buffer
00082 static uint8_t rf_tx_length;
00083 /*ACK wait duration changes depending on data rate*/
00084 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT;
00085 
00086 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY;
00087 static rf_mode_t rf_mode = RF_MODE_NORMAL;
00088 static uint8_t radio_tx_power = 0x00;   // Default to +4dBm
00089 static uint8_t rf_phy_channel = 12;
00090 static uint8_t rf_tuned = 1;
00091 static uint8_t rf_use_antenna_diversity = 0;
00092 static int16_t expected_ack_sequence = -1;
00093 static uint8_t rf_rx_mode = 0;
00094 static uint8_t rf_flags = 0;
00095 static int8_t rf_radio_driver_id = -1;
00096 static phy_device_driver_s device_driver;
00097 static uint8_t mac_tx_handle = 0;
00098 
00099 /* Channel configurations for 2.4 and sub-GHz */
00100 static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK};
00101 static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK};
00102 
00103 static const phy_device_channel_page_s phy_channel_pages[] = {
00104         { CHANNEL_PAGE_0, &phy_24ghz},
00105         { CHANNEL_PAGE_2, &phy_subghz},
00106         { CHANNEL_PAGE_0, NULL}
00107 };
00108 
00109 /**
00110  *  RF output power write
00111  *
00112  * \brief TX power has to be set before network start.
00113  *
00114  * \param power
00115  *              AT86RF233
00116  *              0 = 4 dBm
00117  *              1 = 3.7 dBm
00118  *              2 = 3.4 dBm
00119  *              3 = 3 dBm
00120  *              4 = 2.5 dBm
00121  *              5 = 2 dBm
00122  *              6 = 1 dBm
00123  *              7 = 0 dBm
00124  *              8 = -1 dBm
00125  *              9 = -2 dBm
00126  *              10 = -3 dBm
00127  *              11 = -4 dBm
00128  *              12 = -6 dBm
00129  *              13 = -8 dBm
00130  *              14 = -12 dBm
00131  *              15 = -17 dBm
00132  *
00133  *              AT86RF212B
00134  *              See datasheet for TX power settings
00135  *
00136  * \return 0, Supported Value
00137  * \return -1, Not Supported Value
00138  */
00139 static int8_t rf_tx_power_set(uint8_t power);
00140 static rf_trx_part_e rf_radio_type_read(void);
00141 static void rf_ack_wait_timer_start(uint16_t slots);
00142 static void rf_ack_wait_timer_stop(void);
00143 static void rf_handle_cca_ed_done(void);
00144 static void rf_handle_tx_end(void);
00145 static void rf_handle_rx_end(void);
00146 static void rf_on(void);
00147 static void rf_receive(void);
00148 static void rf_poll_trx_state_change(rf_trx_states_t trx_state);
00149 static void rf_init(void);
00150 static int8_t rf_device_register(const uint8_t *mac_addr);
00151 static void rf_device_unregister(void);
00152 static void rf_enable_static_frame_buffer_protection(void);
00153 static void rf_disable_static_frame_buffer_protection(void);
00154 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol );
00155 static void rf_cca_abort(void);
00156 static void rf_calibration_cb(void);
00157 static void rf_init_phy_mode(void);
00158 static void rf_ack_wait_timer_interrupt(void);
00159 static void rf_calibration_timer_interrupt(void);
00160 static void rf_calibration_timer_start(uint32_t slots);
00161 static void rf_cca_timer_interrupt(void);
00162 static void rf_cca_timer_start(uint32_t slots);
00163 static uint8_t rf_scale_lqi(int8_t rssi);
00164 
00165 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
00166 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
00167 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
00168 
00169 static void rf_if_cca_timer_start(uint32_t slots);
00170 static void rf_if_enable_promiscuous_mode(void);
00171 static void rf_if_lock(void);
00172 static void rf_if_unlock(void);
00173 static uint8_t rf_if_read_rnd(void);
00174 static void rf_if_calibration_timer_start(uint32_t slots);
00175 static void rf_if_interrupt_handler(void);
00176 static void rf_if_ack_wait_timer_start(uint16_t slots);
00177 static void rf_if_ack_wait_timer_stop(void);
00178 static void rf_if_ack_pending_ctrl(uint8_t state);
00179 static void rf_if_calibration(void);
00180 static uint8_t rf_if_read_register(uint8_t addr);
00181 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask);
00182 static void rf_if_clear_bit(uint8_t addr, uint8_t bit);
00183 static void rf_if_write_register(uint8_t addr, uint8_t data);
00184 static void rf_if_reset_radio(void);
00185 static void rf_if_enable_ant_div(void);
00186 static void rf_if_disable_ant_div(void);
00187 static void rf_if_enable_slptr(void);
00188 static void rf_if_disable_slptr(void);
00189 static void rf_if_write_antenna_diversity_settings(void);
00190 static void rf_if_write_set_tx_power_register(uint8_t value);
00191 static void rf_if_write_rf_settings(void);
00192 static uint8_t rf_if_check_cca(void);
00193 static uint8_t rf_if_read_trx_state(void);
00194 static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good);
00195 static void rf_if_write_short_addr_registers(uint8_t *short_address);
00196 static uint8_t rf_if_last_acked_pending(void);
00197 static void rf_if_write_pan_id_registers(uint8_t *pan_id);
00198 static void rf_if_write_ieee_addr_registers(uint8_t *address);
00199 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length);
00200 static void rf_if_change_trx_state(rf_trx_states_t trx_state);
00201 static void rf_if_enable_tx_end_interrupt(void);
00202 static void rf_if_enable_rx_end_interrupt(void);
00203 static void rf_if_enable_cca_ed_done_interrupt(void);
00204 static void rf_if_start_cca_process(void);
00205 static int8_t rf_if_scale_rssi(uint8_t ed_level);
00206 static void rf_if_set_channel_register(uint8_t channel);
00207 static void rf_if_enable_promiscuous_mode(void);
00208 static void rf_if_disable_promiscuous_mode(void);
00209 static uint8_t rf_if_read_part_num(void);
00210 static void rf_if_enable_irq(void);
00211 static void rf_if_disable_irq(void);
00212 
00213 #ifdef MBED_CONF_RTOS_PRESENT
00214 #include "mbed.h"
00215 #include "rtos.h"
00216 
00217 static void rf_if_irq_task_process_irq();
00218 
00219 #define SIG_RADIO       1
00220 #define SIG_TIMER_ACK   2
00221 #define SIG_TIMER_CAL   4
00222 #define SIG_TIMER_CCA   8
00223 
00224 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA)
00225 #define SIG_ALL (SIG_RADIO|SIG_TIMERS)
00226 #endif
00227 
00228 // HW pins to RF chip
00229 #define SPI_SPEED 7500000
00230 
00231 class UnlockedSPI : public SPI {
00232 public:
00233     UnlockedSPI(PinName mosi, PinName miso, PinName sclk) :
00234         SPI(mosi, miso, sclk) { }
00235     virtual void lock() { }
00236     virtual void unlock() { }
00237 };
00238 
00239 class RFBits {
00240 public:
00241     RFBits(PinName spi_mosi, PinName spi_miso,
00242            PinName spi_sclk, PinName spi_cs,
00243            PinName spi_rst, PinName spi_slp, PinName spi_irq);
00244     UnlockedSPI spi;
00245     DigitalOut CS;
00246     DigitalOut RST;
00247     DigitalOut SLP_TR;
00248     InterruptIn IRQ;
00249     Timeout ack_timer;
00250     Timeout cal_timer;
00251     Timeout cca_timer;
00252 #ifdef MBED_CONF_RTOS_PRESENT
00253     Thread irq_thread;
00254     Mutex mutex;
00255     void rf_if_irq_task();
00256 #endif
00257 };
00258 
00259 RFBits::RFBits(PinName spi_mosi, PinName spi_miso,
00260                PinName spi_sclk, PinName spi_cs,
00261                PinName spi_rst, PinName spi_slp, PinName spi_irq)
00262     :   spi(spi_mosi, spi_miso, spi_sclk),
00263         CS(spi_cs),
00264         RST(spi_rst),
00265         SLP_TR(spi_slp),
00266         IRQ(spi_irq)
00267 #ifdef MBED_CONF_RTOS_PRESENT
00268 ,irq_thread(osPriorityRealtime, 1024)
00269 #endif
00270 {
00271 #ifdef MBED_CONF_RTOS_PRESENT
00272     irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task));
00273 #endif
00274 }
00275 
00276 static RFBits *rf;
00277 static uint8_t rf_part_num = 0;
00278 /*TODO: RSSI Base value setting*/
00279 static int8_t rf_rssi_base_val = -91;
00280 
00281 static uint8_t rf_if_spi_exchange(uint8_t out);
00282 
00283 static void rf_if_lock(void)
00284 {
00285     platform_enter_critical();
00286 }
00287 
00288 static void rf_if_unlock(void)
00289 {
00290     platform_exit_critical();
00291 }
00292 
00293 #ifdef MBED_CONF_RTOS_PRESENT
00294 static void rf_if_cca_timer_signal(void)
00295 {
00296     rf->irq_thread.signal_set(SIG_TIMER_CCA);
00297 }
00298 
00299 static void rf_if_cal_timer_signal(void)
00300 {
00301     rf->irq_thread.signal_set(SIG_TIMER_CAL);
00302 }
00303 
00304 static void rf_if_ack_timer_signal(void)
00305 {
00306     rf->irq_thread.signal_set(SIG_TIMER_ACK);
00307 }
00308 #endif
00309 
00310 
00311 /* Delay functions for RF Chip SPI access */
00312 #ifdef __CC_ARM
00313 __asm static void delay_loop(uint32_t count)
00314 {
00315 1
00316   SUBS a1, a1, #1
00317   BCS  %BT1
00318   BX   lr
00319 }
00320 #elif defined (__ICCARM__)
00321 static void delay_loop(uint32_t count)
00322 {
00323   __asm volatile(
00324     "loop: \n"
00325     " SUBS %0, %0, #1 \n"
00326     " BCS.n  loop\n"
00327     : "+r" (count)
00328     :
00329     : "cc"
00330   );
00331 }
00332 #else // GCC
00333 static void delay_loop(uint32_t count)
00334 {
00335   __asm__ volatile (
00336     "%=:\n\t"
00337 #if defined(__thumb__) && !defined(__thumb2__)
00338     "SUB  %0, #1\n\t"
00339 #else
00340     "SUBS %0, %0, #1\n\t"
00341 #endif
00342     "BCS  %=b\n\t"
00343     : "+l" (count)
00344     :
00345     : "cc"
00346   );
00347 }
00348 #endif
00349 
00350 static void delay_ns(uint32_t ns)
00351 {
00352   uint32_t cycles_per_us = SystemCoreClock / 1000000;
00353   // Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3)
00354   // Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2)
00355   // Cortex-M7 - who knows?
00356   // Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't
00357   // Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie,
00358   // as original version of code was 300% slow on M4.
00359   // [Note that this very calculation, plus call overhead, will take multiple
00360   // cycles. Could well be 100ns on its own... So round down here, startup is
00361   // worth at least one loop iteration.]
00362   uint32_t count = (cycles_per_us * ns) / 3000;
00363 
00364   delay_loop(count);
00365 }
00366 
00367 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
00368 #define CS_SELECT()  {rf->CS = 0; /* delay_ns(180); */}
00369  // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
00370 #define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);}
00371 
00372 /*
00373  * \brief Function sets the TX power variable.
00374  *
00375  * \param power TX power setting
00376  *
00377  * \return 0 Success
00378  * \return -1 Fail
00379  */
00380 MBED_UNUSED static int8_t rf_tx_power_set(uint8_t power)
00381 {
00382     int8_t ret_val = -1;
00383 
00384     radio_tx_power = power;
00385     rf_if_lock();
00386     rf_if_write_set_tx_power_register(radio_tx_power);
00387     rf_if_unlock();
00388     ret_val = 0;
00389 
00390     return ret_val;
00391 }
00392 
00393 /*
00394  * \brief Read connected radio part.
00395  *
00396  * This function only return valid information when rf_init() is called
00397  *
00398  * \return
00399  */
00400 static rf_trx_part_e rf_radio_type_read(void)
00401 {
00402   rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV;
00403 
00404   switch (rf_part_num)
00405   {
00406     case PART_AT86RF212:
00407       ret_val = ATMEL_AT86RF212;
00408       break;
00409     case PART_AT86RF233:
00410       ret_val = ATMEL_AT86RF233;
00411       break;
00412     default:
00413       break;
00414   }
00415 
00416   return ret_val;
00417 }
00418 
00419 
00420 /*
00421  * \brief Function starts the ACK wait timeout.
00422  *
00423  * \param slots Given slots, resolution 50us
00424  *
00425  * \return none
00426  */
00427 static void rf_if_ack_wait_timer_start(uint16_t slots)
00428 {
00429 #ifdef MBED_CONF_RTOS_PRESENT
00430   rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots*50);
00431 #else
00432   rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots*50);
00433 #endif
00434 }
00435 
00436 /*
00437  * \brief Function starts the calibration interval.
00438  *
00439  * \param slots Given slots, resolution 50us
00440  *
00441  * \return none
00442  */
00443 static void rf_if_calibration_timer_start(uint32_t slots)
00444 {
00445 #ifdef MBED_CONF_RTOS_PRESENT
00446   rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots*50);
00447 #else
00448   rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots*50);
00449 #endif
00450 }
00451 
00452 /*
00453  * \brief Function starts the CCA interval.
00454  *
00455  * \param slots Given slots, resolution 50us
00456  *
00457  * \return none
00458  */
00459 static void rf_if_cca_timer_start(uint32_t slots)
00460 {
00461 #ifdef MBED_CONF_RTOS_PRESENT
00462   rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots*50);
00463 #else
00464   rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots*50);
00465 #endif
00466 }
00467 
00468 /*
00469  * \brief Function stops the CCA interval.
00470  *
00471  * \return none
00472  */
00473 static void rf_if_cca_timer_stop(void)
00474 {
00475   rf->cca_timer.detach();
00476 }
00477 
00478 /*
00479  * \brief Function stops the ACK wait timeout.
00480  *
00481  * \param none
00482  *
00483  * \return none
00484  */
00485 static void rf_if_ack_wait_timer_stop(void)
00486 {
00487   rf->ack_timer.detach();
00488 }
00489 
00490 /*
00491  * \brief Function sets bit(s) in given RF register.
00492  *
00493  * \param addr Address of the register to set
00494  * \param bit Bit(s) to set
00495  * \param bit_mask Masks the field inside the register
00496  *
00497  * \return none
00498  */
00499 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
00500 {
00501   uint8_t reg = rf_if_read_register(addr);
00502   reg &= ~bit_mask;
00503   reg |= bit;
00504   rf_if_write_register(addr, reg);
00505 }
00506 
00507 /*
00508  * \brief Function clears bit(s) in given RF register.
00509  *
00510  * \param addr Address of the register to clear
00511  * \param bit Bit(s) to clear
00512  *
00513  * \return none
00514  */
00515 static void rf_if_clear_bit(uint8_t addr, uint8_t bit)
00516 {
00517   rf_if_set_bit(addr, 0, bit);
00518 }
00519 
00520 /*
00521  * \brief Function writes register in RF.
00522  *
00523  * \param addr Address on the RF
00524  * \param data Written data
00525  *
00526  * \return none
00527  */
00528 static void rf_if_write_register(uint8_t addr, uint8_t data)
00529 {
00530   uint8_t cmd = 0xC0;
00531   CS_SELECT();
00532   rf_if_spi_exchange(cmd | addr);
00533   rf_if_spi_exchange(data);
00534   CS_RELEASE();
00535 }
00536 
00537 /*
00538  * \brief Function reads RF register.
00539  *
00540  * \param addr Address on the RF
00541  *
00542  * \return Read data
00543  */
00544 static uint8_t rf_if_read_register(uint8_t addr)
00545 {
00546   uint8_t cmd = 0x80;
00547   uint8_t data;
00548   CS_SELECT();
00549   rf_if_spi_exchange(cmd | addr);
00550   data = rf_if_spi_exchange(0);
00551   CS_RELEASE();
00552   return data;
00553 }
00554 
00555 /*
00556  * \brief Function resets the RF.
00557  *
00558  * \param none
00559  *
00560  * \return none
00561  */
00562 static void rf_if_reset_radio(void)
00563 {
00564   rf->spi.frequency(SPI_SPEED);
00565   rf->IRQ.rise(0);
00566   rf->RST = 1;
00567   wait_ms(1);
00568   rf->RST = 0;
00569   wait_ms(10);
00570   CS_RELEASE();
00571   rf->SLP_TR = 0;
00572   wait_ms(10);
00573   rf->RST = 1;
00574   wait_ms(10);
00575 
00576   rf->IRQ.rise(&rf_if_interrupt_handler);
00577 }
00578 
00579 /*
00580  * \brief Function enables the promiscuous mode.
00581  *
00582  * \param none
00583  *
00584  * \return none
00585  */
00586 static void rf_if_enable_promiscuous_mode(void)
00587 {
00588   /*Set AACK_PROM_MODE to enable the promiscuous mode*/
00589   rf_if_set_bit(XAH_CTRL_1, AACK_PROM_MODE, AACK_PROM_MODE);
00590 }
00591 
00592 /*
00593  * \brief Function enables the promiscuous mode.
00594  *
00595  * \param none
00596  *
00597  * \return none
00598  */
00599 static void rf_if_disable_promiscuous_mode(void)
00600 {
00601   /*Set AACK_PROM_MODE to enable the promiscuous mode*/
00602   rf_if_clear_bit(XAH_CTRL_1, AACK_PROM_MODE);
00603 }
00604 
00605 /*
00606  * \brief Function enables the Antenna diversity usage.
00607  *
00608  * \param none
00609  *
00610  * \return none
00611  */
00612 static void rf_if_enable_ant_div(void)
00613 {
00614   /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
00615   rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
00616 }
00617 
00618 /*
00619  * \brief Function disables the Antenna diversity usage.
00620  *
00621  * \param none
00622  *
00623  * \return none
00624  */
00625 static void rf_if_disable_ant_div(void)
00626 {
00627   rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
00628 }
00629 
00630 /*
00631  * \brief Function sets the SLP TR pin.
00632  *
00633  * \param none
00634  *
00635  * \return none
00636  */
00637 static void rf_if_enable_slptr(void)
00638 {
00639   rf->SLP_TR = 1;
00640 }
00641 
00642 /*
00643  * \brief Function clears the SLP TR pin.
00644  *
00645  * \param none
00646  *
00647  * \return none
00648  */
00649 static void rf_if_disable_slptr(void)
00650 {
00651   rf->SLP_TR = 0;
00652 }
00653 
00654 /*
00655  * \brief Function writes the antenna diversity settings.
00656  *
00657  * \param none
00658  *
00659  * \return none
00660  */
00661 static void rf_if_write_antenna_diversity_settings(void)
00662 {
00663   /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/
00664   rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
00665   rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT);
00666 }
00667 
00668 /*
00669  * \brief Function writes the TX output power register.
00670  *
00671  * \param value Given register value
00672  *
00673  * \return none
00674  */
00675 static void rf_if_write_set_tx_power_register(uint8_t value)
00676 {
00677   rf_if_write_register(PHY_TX_PWR, value);
00678 }
00679 
00680 /*
00681  * \brief Function returns the RF part number.
00682  *
00683  * \param none
00684  *
00685  * \return part number
00686  */
00687 static uint8_t rf_if_read_part_num(void)
00688 {
00689   return rf_if_read_register(PART_NUM);
00690 }
00691 
00692 /*
00693  * \brief Function writes the RF settings and initialises SPI interface.
00694  *
00695  * \param none
00696  *
00697  * \return none
00698  */
00699 static void rf_if_write_rf_settings(void)
00700 {
00701   /*Reset RF module*/
00702   rf_if_reset_radio();
00703 
00704   rf_part_num = rf_if_read_part_num();
00705 
00706   rf_if_write_register(XAH_CTRL_0,0);
00707   rf_if_write_register(TRX_CTRL_1, 0x20);
00708 
00709   /*CCA Mode - Carrier sense OR energy above threshold. Channel list is set separately*/
00710   rf_if_write_register(PHY_CC_CCA, 0x05);
00711 
00712   /*Read transceiver PART_NUM*/
00713   rf_part_num = rf_if_read_register(PART_NUM);
00714 
00715   /*Sub-GHz RF settings*/
00716   if(rf_part_num == PART_AT86RF212)
00717   {
00718     /*GC_TX_OFFS mode-dependent setting - OQPSK*/
00719     rf_if_write_register(RF_CTRL_0, 0x32);
00720 
00721     if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
00722     {
00723       /*TX Output Power setting - 0 dBm North American Band*/
00724       rf_if_write_register(PHY_TX_PWR, 0x03);
00725     }
00726     else
00727     {
00728       /*TX Output Power setting - 0 dBm North American Band*/
00729       rf_if_write_register(PHY_TX_PWR, 0x24);
00730     }
00731 
00732     /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/
00733     rf_if_write_register(TRX_CTRL_2, RF_PHY_MODE);
00734     /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/
00735     rf_rssi_base_val = -98;
00736   }
00737   /*2.4GHz RF settings*/
00738   else
00739   {
00740 #if 0
00741     /* Disable power saving functions for now - can only impact reliability,
00742      * and don't have any users demanding it. */
00743     /*Set RPC register*/
00744     rf_if_write_register(TRX_RPC, RX_RPC_CTRL|RX_RPC_EN|PLL_RPC_EN|XAH_TX_RPC_EN|IPAN_RPC_EN|TRX_RPC_RSVD_1);
00745 #endif
00746     /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/
00747     rf_if_write_register(TRX_CTRL_2, 0);
00748     rf_rssi_base_val = -91;
00749   }
00750 }
00751 
00752 /*
00753  * \brief Function checks the channel availability
00754  *
00755  * \param none
00756  *
00757  * \return 1 Channel clear
00758  * \return 0 Channel not clear
00759  */
00760 static uint8_t rf_if_check_cca(void)
00761 {
00762   uint8_t retval = 0;
00763   if(rf_if_read_register(TRX_STATUS) & CCA_STATUS)
00764   {
00765     retval = 1;
00766   }
00767   return retval;
00768 }
00769 
00770 /*
00771  * \brief Function returns the RF state
00772  *
00773  * \param none
00774  *
00775  * \return RF state
00776  */
00777 static uint8_t rf_if_read_trx_state(void)
00778 {
00779   return rf_if_read_register(TRX_STATUS) & 0x1F;
00780 }
00781 
00782 /*
00783  * \brief Function reads packet buffer.
00784  *
00785  * \param data_out Output buffer
00786  * \param lqi_out LQI output
00787  * \param ed_out ED output
00788  * \param crc_good CRC good indication
00789  *
00790  * \return PSDU length [0..RF_MTU]
00791  */
00792 static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good)
00793 {
00794   CS_SELECT();
00795   rf_if_spi_exchange(0x20);
00796   uint8_t len = rf_if_spi_exchange(0) & 0x7F;
00797   uint8_t *ptr = data_out;
00798   for (uint_fast8_t i = 0; i < len; i++) {
00799     *ptr++ = rf_if_spi_exchange(0);
00800   }
00801 
00802   *lqi_out = rf_if_spi_exchange(0);
00803   *ed_out = rf_if_spi_exchange(0);
00804   *crc_good = rf_if_spi_exchange(0) & 0x80;
00805   CS_RELEASE();
00806 
00807   return len;
00808 }
00809 
00810 /*
00811  * \brief Function writes RF short address registers
00812  *
00813  * \param short_address Given short address
00814  *
00815  * \return none
00816  */
00817 static void rf_if_write_short_addr_registers(uint8_t *short_address)
00818 {
00819   rf_if_write_register(SHORT_ADDR_1, *short_address++);
00820   rf_if_write_register(SHORT_ADDR_0, *short_address);
00821 }
00822 
00823 /*
00824  * \brief Function sets the frame pending in ACK message
00825  *
00826  * \param state Given frame pending state
00827  *
00828  * \return none
00829  */
00830 static void rf_if_ack_pending_ctrl(uint8_t state)
00831 {
00832   rf_if_lock();
00833   if(state)
00834   {
00835     rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
00836   }
00837   else
00838   {
00839     rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
00840   }
00841   rf_if_unlock();
00842 }
00843 
00844 /*
00845  * \brief Function returns the state of frame pending control
00846  *
00847  * \param none
00848  *
00849  * \return Frame pending state
00850  */
00851 static uint8_t rf_if_last_acked_pending(void)
00852 {
00853   uint8_t last_acked_data_pending;
00854 
00855   rf_if_lock();
00856   if(rf_if_read_register(CSMA_SEED_1) & 0x20)
00857     last_acked_data_pending = 1;
00858   else
00859     last_acked_data_pending = 0;
00860   rf_if_unlock();
00861 
00862   return last_acked_data_pending;
00863 }
00864 
00865 /*
00866  * \brief Function calibrates the RF part.
00867  *
00868  * \param none
00869  *
00870  * \return none
00871  */
00872 static void rf_if_calibration(void)
00873 {
00874   rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
00875   /*Wait while calibration is running*/
00876   while(rf_if_read_register(FTN_CTRL) & FTN_START);
00877 }
00878 
00879 /*
00880  * \brief Function writes RF PAN Id registers
00881  *
00882  * \param pan_id Given PAN Id
00883  *
00884  * \return none
00885  */
00886 static void rf_if_write_pan_id_registers(uint8_t *pan_id)
00887 {
00888   rf_if_write_register(PAN_ID_1, *pan_id++);
00889   rf_if_write_register(PAN_ID_0, *pan_id);
00890 }
00891 
00892 /*
00893  * \brief Function writes RF IEEE Address registers
00894  *
00895  * \param address Given IEEE Address
00896  *
00897  * \return none
00898  */
00899 static void rf_if_write_ieee_addr_registers(uint8_t *address)
00900 {
00901   uint8_t i;
00902   uint8_t temp = IEEE_ADDR_0;
00903 
00904   for(i=0; i<8; i++)
00905     rf_if_write_register(temp++, address[7-i]);
00906 }
00907 
00908 /*
00909  * \brief Function writes data in RF frame buffer.
00910  *
00911  * \param ptr Pointer to data (PSDU, except FCS)
00912  * \param length Pointer to length (PSDU length, minus 2 for FCS)
00913  *
00914  * \return none
00915  */
00916 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length)
00917 {
00918   uint8_t i;
00919   uint8_t cmd = 0x60;
00920 
00921   CS_SELECT();
00922   rf_if_spi_exchange(cmd);
00923   rf_if_spi_exchange(length + 2);
00924   for(i=0; i<length; i++)
00925     rf_if_spi_exchange(*ptr++);
00926 
00927   CS_RELEASE();
00928 }
00929 
00930 /*
00931  * \brief Function returns 8-bit random value.
00932  *
00933  * \param none
00934  *
00935  * \return random value
00936  */
00937 static uint8_t rf_if_read_rnd(void)
00938 {
00939   uint8_t temp;
00940   uint8_t tmp_rpc_val = 0;
00941   /*RPC must be disabled while reading the random number*/
00942   if(rf_part_num == PART_AT86RF233)
00943   {
00944     tmp_rpc_val = rf_if_read_register(TRX_RPC);
00945     rf_if_write_register(TRX_RPC, RX_RPC_CTRL|TRX_RPC_RSVD_1);
00946   }
00947 
00948   wait_ms(1);
00949   temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
00950   wait_ms(1);
00951   temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
00952   wait_ms(1);
00953   temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
00954   wait_ms(1);
00955   temp |= ((rf_if_read_register(PHY_RSSI)>>5));
00956   wait_ms(1);
00957   if(rf_part_num == PART_AT86RF233)
00958     rf_if_write_register(TRX_RPC, tmp_rpc_val);
00959   return temp;
00960 }
00961 
00962 /*
00963  * \brief Function changes the state of the RF.
00964  *
00965  * \param trx_state Given RF state
00966  *
00967  * \return none
00968  */
00969 static void rf_if_change_trx_state(rf_trx_states_t trx_state)
00970 {
00971   // XXX Lock claim apparently not required
00972   rf_if_lock();
00973   rf_if_write_register(TRX_STATE, trx_state);
00974   /*Wait while not in desired state*/
00975   rf_poll_trx_state_change(trx_state);
00976   rf_if_unlock();
00977 }
00978 
00979 /*
00980  * \brief Function enables the TX END interrupt
00981  *
00982  * \param none
00983  *
00984  * \return none
00985  */
00986 static void rf_if_enable_tx_end_interrupt(void)
00987 {
00988   rf_if_set_bit(IRQ_MASK, TRX_END, TRX_END);
00989 }
00990 
00991 /*
00992  * \brief Function enables the RX END interrupt
00993  *
00994  * \param none
00995  *
00996  * \return none
00997  */
00998 static void rf_if_enable_rx_end_interrupt(void)
00999 {
01000   rf_if_set_bit(IRQ_MASK, TRX_END, TRX_END);
01001 }
01002 
01003 /*
01004  * \brief Function enables the CCA ED interrupt
01005  *
01006  * \param none
01007  *
01008  * \return none
01009  */
01010 static void rf_if_enable_cca_ed_done_interrupt(void)
01011 {
01012   rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, CCA_ED_DONE);
01013 }
01014 
01015 /*
01016  * \brief Function starts the CCA process
01017  *
01018  * \param none
01019  *
01020  * \return none
01021  */
01022 static void rf_if_start_cca_process(void)
01023 {
01024   rf_if_set_bit(PHY_CC_CCA, CCA_REQUEST, CCA_REQUEST);
01025 }
01026 
01027 /*
01028  * \brief Function scales RSSI
01029  *
01030  * \param ed_level ED level read from chip
01031  *
01032  * \return appropriately scaled RSSI dBm
01033  */
01034 static int8_t rf_if_scale_rssi(uint8_t ed_level)
01035 {
01036   if (rf_part_num == PART_AT86RF212) {
01037     /* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */
01038     ed_level += ed_level >> 5;
01039   }
01040   return rf_rssi_base_val + ed_level;
01041 }
01042 
01043 /*
01044  * \brief Function sets the RF channel field
01045  *
01046  * \param Given channel
01047  *
01048  * \return none
01049  */
01050 static void rf_if_set_channel_register(uint8_t channel)
01051 {
01052   rf_if_set_bit(PHY_CC_CCA, channel, 0x1f);
01053 }
01054 
01055 /*
01056  * \brief Function enables RF irq pin interrupts in RF interface.
01057  *
01058  * \param none
01059  *
01060  * \return none
01061  */
01062 static void rf_if_enable_irq(void)
01063 {
01064   rf->IRQ.enable_irq();
01065 }
01066 
01067 /*
01068  * \brief Function disables RF irq pin interrupts in RF interface.
01069  *
01070  * \param none
01071  *
01072  * \return none
01073  */
01074 static void rf_if_disable_irq(void)
01075 {
01076   rf->IRQ.disable_irq();
01077 }
01078 
01079 #ifdef MBED_CONF_RTOS_PRESENT
01080 static void rf_if_interrupt_handler(void)
01081 {
01082     rf->irq_thread.signal_set(SIG_RADIO);
01083 }
01084 
01085 // Started during construction of rf, so variable
01086 // rf isn't set at the start. Uses 'this' instead.
01087 void RFBits::rf_if_irq_task(void)
01088 {
01089     for (;;) {
01090         osEvent event = irq_thread.signal_wait(0);
01091         if (event.status != osEventSignal) {
01092             continue;
01093         }
01094         rf_if_lock();
01095         if (event.value.signals & SIG_RADIO) {
01096             rf_if_irq_task_process_irq();
01097         }
01098         if (event.value.signals & SIG_TIMER_ACK) {
01099             rf_ack_wait_timer_interrupt();
01100         }
01101         if (event.value.signals & SIG_TIMER_CCA) {
01102             rf_cca_timer_interrupt();
01103         }
01104         if (event.value.signals & SIG_TIMER_CAL) {
01105             rf_calibration_timer_interrupt();
01106         }
01107         rf_if_unlock();
01108     }
01109 }
01110 
01111 static void rf_if_irq_task_process_irq(void)
01112 #else
01113 /*
01114  * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
01115  *
01116  * \param none
01117  *
01118  * \return none
01119  */
01120 static void rf_if_interrupt_handler(void)
01121 #endif
01122 {
01123   uint8_t irq_status;
01124 
01125   /*Read interrupt flag*/
01126   irq_status = rf_if_read_register(IRQ_STATUS);
01127 
01128   /*Disable interrupt on RF*/
01129   rf_if_clear_bit(IRQ_MASK, irq_status);
01130   /*RX start interrupt*/
01131   if(irq_status & RX_START)
01132   {
01133   }
01134   /*Address matching interrupt*/
01135   if(irq_status & AMI)
01136   {
01137   }
01138   if(irq_status & TRX_UR)
01139   {
01140   }
01141   /*Frame end interrupt (RX and TX)*/
01142   if(irq_status & TRX_END)
01143   {
01144     /*TX done interrupt*/
01145     if(rf_if_read_trx_state() == PLL_ON || rf_if_read_trx_state() == TX_ARET_ON)
01146     {
01147       rf_handle_tx_end();
01148     }
01149     /*Frame received interrupt*/
01150     else
01151     {
01152       rf_handle_rx_end();
01153     }
01154   }
01155   if(irq_status & CCA_ED_DONE)
01156   {
01157     rf_handle_cca_ed_done();
01158   }
01159 }
01160 
01161 /*
01162  * \brief Function writes/read data in SPI interface
01163  *
01164  * \param out Output data
01165  *
01166  * \return Input data
01167  */
01168 static uint8_t rf_if_spi_exchange(uint8_t out)
01169 {
01170   uint8_t v;
01171   v = rf->spi.write(out);
01172   // t9 = t5 = 250ns, delay between LSB of last byte to next MSB or delay between LSB & SEL rising
01173   // [SPI setup assumed slow enough to not need manual delay]
01174   // delay_ns(250);
01175   return v;
01176 }
01177 
01178 /*
01179  * \brief Function sets given RF flag on.
01180  *
01181  * \param x Given RF flag
01182  *
01183  * \return none
01184  */
01185 static void rf_flags_set(uint8_t x)
01186 {
01187     rf_flags |= x;
01188 }
01189 
01190 /*
01191  * \brief Function clears given RF flag on.
01192  *
01193  * \param x Given RF flag
01194  *
01195  * \return none
01196  */
01197 static void rf_flags_clear(uint8_t x)
01198 {
01199     rf_flags &= ~x;
01200 }
01201 
01202 /*
01203  * \brief Function checks if given RF flag is on.
01204  *
01205  * \param x Given RF flag
01206  *
01207  * \return states of the given flags
01208  */
01209 static uint8_t rf_flags_check(uint8_t x)
01210 {
01211     return (rf_flags & x);
01212 }
01213 
01214 /*
01215  * \brief Function clears all RF flags.
01216  *
01217  * \param none
01218  *
01219  * \return none
01220  */
01221 static void rf_flags_reset(void)
01222 {
01223     rf_flags = 0;
01224 }
01225 
01226 /*
01227  * \brief Function initialises and registers the RF driver.
01228  *
01229  * \param none
01230  *
01231  * \return rf_radio_driver_id Driver ID given by NET library
01232  */
01233 static int8_t rf_device_register(const uint8_t *mac_addr)
01234 {
01235     rf_trx_part_e radio_type;
01236 
01237     rf_init();
01238 
01239     radio_type = rf_radio_type_read();
01240     if(radio_type != ATMEL_UNKNOW_DEV)
01241     {
01242         /*Set pointer to MAC address*/
01243         device_driver.PHY_MAC = (uint8_t *)mac_addr;
01244         device_driver.driver_description = (char*)"ATMEL_MAC";
01245         //Create setup Used Radio chips
01246         if(radio_type == ATMEL_AT86RF212)
01247         {
01248             device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
01249         }
01250         else
01251         {
01252             device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
01253         }
01254         device_driver.phy_channel_pages = phy_channel_pages;
01255         /*Maximum size of payload is 127*/
01256         device_driver.phy_MTU = 127;
01257         /*No header in PHY*/
01258         device_driver.phy_header_length = 0;
01259         /*No tail in PHY*/
01260         device_driver.phy_tail_length = 0;
01261         /*Set address write function*/
01262         device_driver.address_write = &rf_address_write;
01263         /*Set RF extension function*/
01264         device_driver.extension = &rf_extension;
01265         /*Set RF state control function*/
01266         device_driver.state_control = &rf_interface_state_control;
01267         /*Set transmit function*/
01268         device_driver.tx = &rf_start_cca;
01269         /*NULLIFY rx and tx_done callbacks*/
01270         device_driver.phy_rx_cb = NULL;
01271         device_driver.phy_tx_done_cb = NULL;
01272         /*Register device driver*/
01273         rf_radio_driver_id = arm_net_phy_register(&device_driver);
01274     }
01275     return rf_radio_driver_id;
01276 }
01277 
01278 /*
01279  * \brief Function unregisters the RF driver.
01280  *
01281  * \param none
01282  *
01283  * \return none
01284  */
01285 static void rf_device_unregister()
01286 {
01287     if (rf_radio_driver_id >= 0) {
01288         arm_net_phy_unregister(rf_radio_driver_id);
01289         rf_radio_driver_id = -1;
01290     }
01291 }
01292 
01293 /*
01294  * \brief Enable frame buffer protection
01295  *
01296  * If protection is enabled, reception cannot start - the radio will
01297  * not go into RX_BUSY or write into the frame buffer if in receive mode.
01298  * Setting this won't abort an already-started reception.
01299  * We can still write the frame buffer ourselves.
01300  */
01301 static void rf_enable_static_frame_buffer_protection(void)
01302 {
01303   if (!rf_flags_check(RFF_PROT)) {
01304     /* This also writes RX_PDT_LEVEL to 0 - maximum RX sensitivity */
01305     /* Would need to modify this function if messing with that */
01306     rf_if_write_register(RX_SYN, RX_PDT_DIS);
01307     rf_flags_set(RFF_PROT);
01308   }
01309 }
01310 
01311 /*
01312  * \brief Disable frame buffer protection
01313  */
01314 static void rf_disable_static_frame_buffer_protection(void)
01315 {
01316   if (rf_flags_check(RFF_PROT)) {
01317     /* This also writes RX_PDT_LEVEL to 0 - maximum RX sensitivity */
01318     /* Would need to modify this function if messing with that */
01319     rf_if_write_register(RX_SYN, 0);
01320     rf_flags_clear(RFF_PROT);
01321   }
01322 }
01323 
01324 
01325 /*
01326  * \brief Function is a call back for ACK wait timeout.
01327  *
01328  * \param none
01329  *
01330  * \return none
01331  */
01332 static void rf_ack_wait_timer_interrupt(void)
01333 {
01334     rf_if_lock();
01335     expected_ack_sequence = -1;
01336     /*Force PLL state*/
01337     rf_if_change_trx_state(FORCE_PLL_ON);
01338     rf_poll_trx_state_change(PLL_ON);
01339     /*Start receiver in RX_AACK_ON state*/
01340     rf_rx_mode = 0;
01341     rf_flags_clear(RFF_RX);
01342     rf_receive();
01343     rf_if_unlock();
01344 }
01345 
01346 /*
01347  * \brief Function is a call back for calibration interval timer.
01348  *
01349  * \param none
01350  *
01351  * \return none
01352  */
01353 static void rf_calibration_timer_interrupt(void)
01354 {
01355     /*Calibrate RF*/
01356     rf_calibration_cb();
01357     /*Start new calibration timeout*/
01358     rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
01359 }
01360 
01361 /*
01362  * \brief Function is a call back for cca interval timer.
01363  *
01364  * \param none
01365  *
01366  * \return none
01367  */
01368 static void rf_cca_timer_interrupt(void)
01369 {
01370     /*Disable reception - locks against entering BUSY_RX and overwriting frame buffer*/
01371     rf_enable_static_frame_buffer_protection();
01372 
01373     if(rf_if_read_trx_state() == BUSY_RX_AACK)
01374     {
01375         /*Reception already started - re-enable reception and say CCA fail*/
01376         rf_disable_static_frame_buffer_protection();
01377         if(device_driver.phy_tx_done_cb){
01378             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
01379         }
01380     }
01381     else
01382     {
01383         /*Load the frame buffer with frame to transmit */
01384         rf_if_write_frame_buffer(rf_tx_data, rf_tx_length);
01385         /*Make sure we're in RX state to read channel (any way we could not be?)*/
01386         rf_receive();
01387         rf_flags_set(RFF_CCA);
01388         /*Start CCA process*/
01389         rf_if_enable_cca_ed_done_interrupt();
01390         rf_if_start_cca_process();
01391     }
01392 }
01393 
01394 /*
01395  * \brief Function starts the ACK wait timeout.
01396  *
01397  * \param slots Given slots, resolution 50us
01398  *
01399  * \return none
01400  */
01401 static void rf_ack_wait_timer_start(uint16_t slots)
01402 {
01403     rf_if_ack_wait_timer_start(slots);
01404 }
01405 
01406 /*
01407  * \brief Function starts the calibration interval.
01408  *
01409  * \param slots Given slots, resolution 50us
01410  *
01411  * \return none
01412  */
01413 static void rf_calibration_timer_start(uint32_t slots)
01414 {
01415     rf_if_calibration_timer_start(slots);
01416 }
01417 
01418 /*
01419  * \brief Function starts the CCA backoff.
01420  *
01421  * \param slots Given slots, resolution 50us
01422  *
01423  * \return none
01424  */
01425 static void rf_cca_timer_start(uint32_t slots)
01426 {
01427     rf_if_cca_timer_start(slots);
01428 }
01429 
01430 /*
01431  * \brief Function stops the CCA backoff.
01432  *
01433  * \return none
01434  */
01435 static void rf_cca_timer_stop(void)
01436 {
01437     rf_if_cca_timer_stop();
01438 }
01439 
01440 /*
01441  * \brief Function stops the ACK wait timeout.
01442  *
01443  * \param none
01444  *
01445  * \return none
01446  */
01447 static void rf_ack_wait_timer_stop(void)
01448 {
01449     rf_if_ack_wait_timer_stop();
01450 }
01451 
01452 /*
01453  * \brief Function writes various RF settings in startup.
01454  *
01455  * \param none
01456  *
01457  * \return none
01458  */
01459 static void rf_write_settings(void)
01460 {
01461     rf_if_lock();
01462     rf_if_write_rf_settings();
01463     /*Set output power*/
01464     rf_if_write_set_tx_power_register(radio_tx_power);
01465     /*Initialise Antenna Diversity*/
01466     if(rf_use_antenna_diversity)
01467         rf_if_write_antenna_diversity_settings();
01468     rf_if_unlock();
01469 }
01470 
01471 /*
01472  * \brief Function writes 16-bit address in RF address filter.
01473  *
01474  * \param short_address Given short address
01475  *
01476  * \return none
01477  */
01478 static void rf_set_short_adr(uint8_t * short_address)
01479 {
01480     rf_if_lock();
01481     /*Wake up RF if sleeping*/
01482     if(rf_flags_check(RFF_ON) == 0)
01483     {
01484         rf_if_disable_slptr();
01485         rf_poll_trx_state_change(TRX_OFF);
01486     }
01487     /*Write address filter registers*/
01488     rf_if_write_short_addr_registers(short_address);
01489     /*RF back to sleep*/
01490     if(rf_flags_check(RFF_ON) == 0)
01491     {
01492         rf_if_enable_slptr();
01493     }
01494     rf_if_unlock();
01495 }
01496 
01497 /*
01498  * \brief Function writes PAN Id in RF PAN Id filter.
01499  *
01500  * \param pan_id Given PAN Id
01501  *
01502  * \return none
01503  */
01504 static void rf_set_pan_id(uint8_t *pan_id)
01505 {
01506     rf_if_lock();
01507     /*Wake up RF if sleeping*/
01508     if(rf_flags_check(RFF_ON) == 0)
01509     {
01510         rf_if_disable_slptr();
01511         rf_poll_trx_state_change(TRX_OFF);
01512     }
01513     /*Write address filter registers*/
01514     rf_if_write_pan_id_registers(pan_id);
01515     /*RF back to sleep*/
01516     if(rf_flags_check(RFF_ON) == 0)
01517     {
01518         rf_if_enable_slptr();
01519     }
01520     rf_if_unlock();
01521 }
01522 
01523 /*
01524  * \brief Function writes 64-bit address in RF address filter.
01525  *
01526  * \param address Given 64-bit address
01527  *
01528  * \return none
01529  */
01530 static void rf_set_address(uint8_t *address)
01531 {
01532     rf_if_lock();
01533     /*Wake up RF if sleeping*/
01534     if(rf_flags_check(RFF_ON) == 0)
01535     {
01536         rf_if_disable_slptr();
01537         rf_poll_trx_state_change(TRX_OFF);
01538     }
01539     /*Write address filter registers*/
01540     rf_if_write_ieee_addr_registers(address);
01541     /*RF back to sleep*/
01542     if(rf_flags_check(RFF_ON) == 0)
01543     {
01544         rf_if_enable_slptr();
01545     }
01546     rf_if_unlock();
01547 }
01548 
01549 /*
01550  * \brief Function sets the RF channel.
01551  *
01552  * \param ch New channel
01553  *
01554  * \return none
01555  */
01556 static void rf_channel_set(uint8_t ch)
01557 {
01558     rf_if_lock();
01559     rf_phy_channel = ch;
01560     if(ch < 0x1f)
01561         rf_if_set_channel_register(ch);
01562     rf_if_unlock();
01563 }
01564 
01565 
01566 /*
01567  * \brief Function initialises the radio driver and resets the radio.
01568  *
01569  * \param none
01570  *
01571  * \return none
01572  */
01573 static void rf_init(void)
01574 {
01575     /*Reset RF module*/
01576     rf_if_reset_radio();
01577 
01578     rf_if_lock();
01579 
01580     /*Write RF settings*/
01581     rf_write_settings();
01582     /*Initialise PHY mode*/
01583     rf_init_phy_mode();
01584     /*Clear RF flags*/
01585     rf_flags_reset();
01586     /*Set RF in TRX OFF state*/
01587     rf_if_change_trx_state(TRX_OFF);
01588     /*Set RF in PLL_ON state*/
01589     rf_if_change_trx_state(PLL_ON);
01590     /*Start receiver*/
01591     rf_receive();
01592     /*Read randomness, and add to seed*/
01593     randLIB_add_seed(rf_if_read_rnd());
01594     /*Start RF calibration timer*/
01595     rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
01596 
01597     rf_if_unlock();
01598 }
01599 
01600 /**
01601  * \brief Function gets called when MAC is setting radio off.
01602  *
01603  * \param none
01604  *
01605  * \return none
01606  */
01607 static void rf_off(void)
01608 {
01609     if(rf_flags_check(RFF_ON))
01610     {
01611         rf_if_lock();
01612         rf_cca_abort();
01613         uint16_t while_counter = 0;
01614         /*Wait while receiving*/
01615         while(rf_if_read_trx_state() == BUSY_RX_AACK)
01616         {
01617             while_counter++;
01618             if(while_counter == 0xffff)
01619                 break;
01620         }
01621         /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/
01622         if(rf_if_read_trx_state() == RX_AACK_ON)
01623         {
01624             rf_if_change_trx_state(PLL_ON);
01625         }
01626         rf_if_change_trx_state(TRX_OFF);
01627         rf_if_enable_slptr();
01628 
01629         /*Disable Antenna Diversity*/
01630         if(rf_use_antenna_diversity)
01631             rf_if_disable_ant_div();
01632         rf_if_unlock();
01633     }
01634 
01635     /*Clears all flags*/
01636     rf_flags_reset();
01637 }
01638 
01639 /*
01640  * \brief Function polls the RF state until it has changed to desired state.
01641  *
01642  * \param trx_state RF state
01643  *
01644  * \return none
01645  */
01646 static void rf_poll_trx_state_change(rf_trx_states_t trx_state)
01647 {
01648     uint16_t while_counter = 0;
01649     // XXX lock apparently not needed
01650     rf_if_lock();
01651 
01652     if(trx_state != RF_TX_START)
01653     {
01654         if(trx_state == FORCE_PLL_ON)
01655             trx_state = PLL_ON;
01656         else if(trx_state == FORCE_TRX_OFF)
01657             trx_state = TRX_OFF;
01658 
01659         while(rf_if_read_trx_state() != trx_state)
01660         {
01661             while_counter++;
01662             if(while_counter == 0x1ff)
01663                 break;
01664         }
01665     }
01666     rf_if_unlock();
01667 }
01668 
01669 /*
01670  * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
01671  *
01672  * \param data_ptr Pointer to TX data (excluding FCS)
01673  * \param data_length Length of the TX data (excluding FCS)
01674  * \param tx_handle Handle to transmission
01675  * \return 0 Success
01676  * \return -1 Busy
01677  */
01678 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol )
01679 {
01680     (void)data_protocol;
01681     rf_if_lock();
01682     /*Check if transmitter is busy*/
01683     if(rf_if_read_trx_state() == BUSY_RX_AACK || data_length > RF_MTU - 2)
01684     {
01685         rf_if_unlock();
01686         /*Return busy*/
01687         return -1;
01688     }
01689     else
01690     {
01691         expected_ack_sequence = -1;
01692 
01693         /*Nanostack has a static TX buffer, which will remain valid until we*/
01694         /*generate a callback, so we just note the pointer for reading later.*/
01695         rf_tx_data = data_ptr;
01696         rf_tx_length = data_length;
01697         /*Start CCA timeout*/
01698         rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF));
01699         /*Store TX handle*/
01700         mac_tx_handle = tx_handle;
01701         rf_if_unlock();
01702     }
01703 
01704     /*Return success*/
01705     return 0;
01706 }
01707 
01708 /*
01709  * \brief Function aborts CCA process.
01710  *
01711  * \param none
01712  *
01713  * \return none
01714  */
01715 static void rf_cca_abort(void)
01716 {
01717     rf_cca_timer_stop();
01718     rf_flags_clear(RFF_CCA);
01719     rf_disable_static_frame_buffer_protection();
01720 }
01721 
01722 /*
01723  * \brief Function starts the transmission of the frame.
01724  *
01725  * \param none
01726  *
01727  * \return none
01728  */
01729 static void rf_start_tx(void)
01730 {
01731     /*Only start transmitting from RX state*/
01732     uint8_t trx_state = rf_if_read_trx_state();
01733     if(trx_state != RX_AACK_ON)
01734     {
01735         rf_disable_static_frame_buffer_protection();
01736         if(device_driver.phy_tx_done_cb){
01737             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
01738         }
01739     }
01740     else
01741     {
01742         /*RF state change: ->PLL_ON->RF_TX_START*/
01743         rf_if_change_trx_state(FORCE_PLL_ON);
01744         rf_flags_clear(RFF_RX);
01745         /*Now we're out of receive mode, can release protection*/
01746         rf_disable_static_frame_buffer_protection();
01747         rf_if_enable_tx_end_interrupt();
01748         rf_flags_set(RFF_TX);
01749         rf_if_change_trx_state(RF_TX_START);
01750     }
01751 }
01752 
01753 /*
01754  * \brief Function sets the RF in RX state.
01755  *
01756  * \param none
01757  *
01758  * \return none
01759  */
01760 static void rf_receive(void)
01761 {
01762     uint16_t while_counter = 0;
01763     if(rf_flags_check(RFF_ON) == 0)
01764     {
01765         rf_on();
01766     }
01767     /*If not yet in RX state set it*/
01768     if(rf_flags_check(RFF_RX) == 0)
01769     {
01770         rf_if_lock();
01771         /*Wait while receiving data*/
01772         while(rf_if_read_trx_state() == BUSY_RX_AACK)
01773         {
01774             while_counter++;
01775             if(while_counter == 0xffff)
01776             {
01777                 break;
01778             }
01779         }
01780 
01781         rf_if_change_trx_state(PLL_ON);
01782 
01783         if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED))
01784         {
01785             rf_if_change_trx_state(RX_ON);
01786         }
01787         else
01788         {
01789             /*ACK is always received in promiscuous mode to bypass address filters*/
01790             if(rf_rx_mode)
01791             {
01792                 rf_rx_mode = 0;
01793                 rf_if_enable_promiscuous_mode();
01794             }
01795             else
01796             {
01797                 rf_if_disable_promiscuous_mode();
01798             }
01799             rf_if_change_trx_state(RX_AACK_ON);
01800         }
01801         /*If calibration timer was unable to calibrate the RF, run calibration now*/
01802         if(!rf_tuned)
01803         {
01804             /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/
01805             rf_if_calibration();
01806             /*RF is tuned now*/
01807             rf_tuned = 1;
01808         }
01809 
01810         rf_channel_set(rf_phy_channel);
01811         rf_flags_set(RFF_RX);
01812         // Don't receive packets when ED mode enabled
01813         if (rf_mode != RF_MODE_ED)
01814         {
01815             rf_if_enable_rx_end_interrupt();
01816         }
01817         rf_if_unlock();
01818     }
01819 }
01820 
01821 /*
01822  * \brief Function calibrates the radio.
01823  *
01824  * \param none
01825  *
01826  * \return none
01827  */
01828 static void rf_calibration_cb(void)
01829 {
01830     /*clear tuned flag to start tuning in rf_receive*/
01831     rf_tuned = 0;
01832     /*If RF is in default receive state, start calibration*/
01833     if(rf_if_read_trx_state() == RX_AACK_ON)
01834     {
01835         rf_if_lock();
01836         /*Set RF in PLL_ON state*/
01837         rf_if_change_trx_state(PLL_ON);
01838         /*Set RF in TRX_OFF state to start PLL tuning*/
01839         rf_if_change_trx_state(TRX_OFF);
01840         /*Set RF in RX_ON state to calibrate*/
01841         rf_if_change_trx_state(RX_ON);
01842         /*Calibrate FTN*/
01843         rf_if_calibration();
01844         /*RF is tuned now*/
01845         rf_tuned = 1;
01846         /*Back to default receive state*/
01847         rf_flags_clear(RFF_RX);
01848         rf_receive();
01849         rf_if_unlock();
01850     }
01851 }
01852 
01853 /*
01854  * \brief Function sets RF_ON flag when radio is powered.
01855  *
01856  * \param none
01857  *
01858  * \return none
01859  */
01860 static void rf_on(void)
01861 {
01862     /*Set RFF_ON flag*/
01863     if(rf_flags_check(RFF_ON) == 0)
01864     {
01865         rf_if_lock();
01866         rf_flags_set(RFF_ON);
01867         /*Enable Antenna diversity*/
01868         if(rf_use_antenna_diversity)
01869             /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
01870             rf_if_enable_ant_div();
01871 
01872         /*Wake up from sleep state*/
01873         rf_if_disable_slptr();
01874         rf_poll_trx_state_change(TRX_OFF);
01875         rf_if_unlock();
01876     }
01877 }
01878 
01879 /*
01880  * \brief Function handles the received ACK frame.
01881  *
01882  * \param seq_number Sequence number of received ACK
01883  * \param data_pending Pending bit state in received ACK
01884  *
01885  * \return none
01886  */
01887 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
01888 {
01889     phy_link_tx_status_e phy_status;
01890     rf_if_lock();
01891     /*Received ACK sequence must be equal with transmitted packet sequence*/
01892     if(expected_ack_sequence == seq_number)
01893     {
01894         rf_ack_wait_timer_stop();
01895         expected_ack_sequence = -1;
01896         /*When data pending bit in ACK frame is set, inform NET library*/
01897         if(data_pending)
01898             phy_status = PHY_LINK_TX_DONE_PENDING;
01899         else
01900             phy_status = PHY_LINK_TX_DONE;
01901         /*Call PHY TX Done API*/
01902         if(device_driver.phy_tx_done_cb){
01903             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 0, 0);
01904         }
01905     }
01906     rf_if_unlock();
01907 }
01908 
01909 /*
01910  * \brief Function is a call back for RX end interrupt.
01911  *
01912  * \param none
01913  *
01914  * \return none
01915  */
01916 static void rf_handle_rx_end(void)
01917 {
01918     /*Start receiver*/
01919     rf_flags_clear(RFF_RX);
01920     rf_receive();
01921 
01922     /*Frame received interrupt*/
01923     if(!rf_flags_check(RFF_RX)) {
01924         return;
01925     }
01926 
01927     static uint8_t rf_buffer[RF_MTU];
01928     uint8_t rf_lqi, rf_ed;
01929     int8_t rf_rssi;
01930     bool crc_good;
01931 
01932     /*Read received packet*/
01933     uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good);
01934     if (len < 5 || !crc_good) {
01935         return;
01936     }
01937 
01938     /* Convert raw ED to dBm value (chip-dependent) */
01939     rf_rssi = rf_if_scale_rssi(rf_ed);
01940 
01941     /* Create a virtual LQI using received RSSI, forgetting actual HW LQI */
01942     /* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */
01943     rf_lqi = rf_scale_lqi(rf_rssi);
01944 
01945     /*Handle received ACK*/
01946     if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER)
01947     {
01948         /*Check if data is pending*/
01949         bool pending = (rf_buffer[0] & 0x10);
01950 
01951         /*Send sequence number in ACK handler*/
01952         rf_handle_ack(rf_buffer[2], pending);
01953     } else {
01954         if( device_driver.phy_rx_cb ){
01955             device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id);
01956         }
01957     }
01958 }
01959 
01960 /*
01961  * \brief Function is called when MAC is shutting down the radio.
01962  *
01963  * \param none
01964  *
01965  * \return none
01966  */
01967 static void rf_shutdown(void)
01968 {
01969     /*Call RF OFF*/
01970     rf_off();
01971 }
01972 
01973 /*
01974  * \brief Function is a call back for TX end interrupt.
01975  *
01976  * \param none
01977  *
01978  * \return none
01979  */
01980 static void rf_handle_tx_end(void)
01981 {
01982     rf_rx_mode = 0;
01983     /*If ACK is needed for this transmission*/
01984     if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX))
01985     {
01986         expected_ack_sequence = rf_tx_data[2];
01987         rf_ack_wait_timer_start(rf_ack_wait_duration);
01988         rf_rx_mode = 1;
01989     }
01990     rf_flags_clear(RFF_RX);
01991     /*Start receiver*/
01992     rf_receive();
01993 
01994     /*Call PHY TX Done API*/
01995     if(device_driver.phy_tx_done_cb){
01996         device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
01997     }
01998 }
01999 
02000 /*
02001  * \brief Function is a call back for CCA ED done interrupt.
02002  *
02003  * \param none
02004  *
02005  * \return none
02006  */
02007 static void rf_handle_cca_ed_done(void)
02008 {
02009     if (!rf_flags_check(RFF_CCA)) {
02010         return;
02011     }
02012     rf_flags_clear(RFF_CCA);
02013     /*Check the result of CCA process*/
02014     if(rf_if_check_cca())
02015     {
02016         rf_start_tx();
02017     }
02018     else
02019     {
02020         /*Re-enable reception*/
02021         rf_disable_static_frame_buffer_protection();
02022         /*Send CCA fail notification*/
02023         if(device_driver.phy_tx_done_cb){
02024             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
02025         }
02026     }
02027 }
02028 
02029 /*
02030  * \brief Function returns the TX power variable.
02031  *
02032  * \param none
02033  *
02034  * \return radio_tx_power TX power variable
02035  */
02036 MBED_UNUSED static uint8_t rf_tx_power_get(void)
02037 {
02038   return radio_tx_power;
02039 }
02040 
02041 /*
02042  * \brief Function enables the usage of Antenna diversity.
02043  *
02044  * \param none
02045  *
02046  * \return 0 Success
02047  */
02048 MBED_UNUSED static int8_t rf_enable_antenna_diversity(void)
02049 {
02050     int8_t ret_val = 0;
02051     rf_use_antenna_diversity = 1;
02052     return ret_val;
02053 }
02054 
02055 /*
02056  * \brief Function gives the control of RF states to MAC.
02057  *
02058  * \param new_state RF state
02059  * \param rf_channel RF channel
02060  *
02061  * \return 0 Success
02062  */
02063 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
02064 {
02065     int8_t ret_val = 0;
02066     switch (new_state)
02067     {
02068         /*Reset PHY driver and set to idle*/
02069         case PHY_INTERFACE_RESET:
02070             break;
02071         /*Disable PHY Interface driver*/
02072         case PHY_INTERFACE_DOWN:
02073             rf_shutdown();
02074             break;
02075         /*Enable PHY Interface driver*/
02076         case PHY_INTERFACE_UP:
02077             rf_mode = RF_MODE_NORMAL;
02078             rf_channel_set(rf_channel);
02079             rf_receive();
02080             rf_if_enable_irq();
02081             break;
02082         /*Enable wireless interface ED scan mode*/
02083         case PHY_INTERFACE_RX_ENERGY_STATE:
02084             rf_mode = RF_MODE_ED;
02085             rf_channel_set(rf_channel);
02086             rf_receive();
02087             rf_if_disable_irq();
02088             // Read status to clear pending flags.
02089             rf_if_read_register(IRQ_STATUS);
02090             // Must set interrupt mask to be able to read IRQ status. GPIO interrupt is disabled.
02091             rf_if_enable_cca_ed_done_interrupt();
02092             // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL
02093             rf_if_write_register(PHY_ED_LEVEL, 0xff);
02094             break;
02095         case PHY_INTERFACE_SNIFFER_STATE:             /**< Enable Sniffer state */
02096             rf_mode = RF_MODE_SNIFFER;
02097             rf_channel_set(rf_channel);
02098             rf_flags_clear(RFF_RX);
02099             rf_receive();
02100             rf_if_enable_irq();
02101             break;
02102     }
02103     return ret_val;
02104 }
02105 
02106 /*
02107  * \brief Function controls the ACK pending, channel setting and energy detection.
02108  *
02109  * \param extension_type Type of control
02110  * \param data_ptr Data from NET library
02111  *
02112  * \return 0 Success
02113  */
02114 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
02115 {
02116     switch (extension_type)
02117     {
02118         /*Control MAC pending bit for Indirect data transmission*/
02119         case PHY_EXTENSION_CTRL_PENDING_BIT:
02120             if(*data_ptr)
02121             {
02122                 rf_if_ack_pending_ctrl(1);
02123             }
02124             else
02125             {
02126                 rf_if_ack_pending_ctrl(0);
02127             }
02128             break;
02129         /*Return frame pending status*/
02130         case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
02131             *data_ptr = rf_if_last_acked_pending();
02132             break;
02133         /*Set channel*/
02134         case PHY_EXTENSION_SET_CHANNEL:
02135             break;
02136         /*Read energy on the channel*/
02137         case PHY_EXTENSION_READ_CHANNEL_ENERGY:
02138             // End of the ED measurement is indicated by CCA_ED_DONE
02139             while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE));
02140             // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL
02141             *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL);
02142             // Read status to clear pending flags.
02143             rf_if_read_register(IRQ_STATUS);
02144             // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result.
02145             rf_if_write_register(PHY_ED_LEVEL, 0xff);
02146             break;
02147         /*Read status of the link*/
02148         case PHY_EXTENSION_READ_LINK_STATUS:
02149             break;
02150         default:
02151             break;
02152     }
02153     return 0;
02154 }
02155 
02156 /*
02157  * \brief Function sets the addresses to RF address filters.
02158  *
02159  * \param address_type Type of address
02160  * \param address_ptr Pointer to given address
02161  *
02162  * \return 0 Success
02163  */
02164 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
02165 {
02166     int8_t ret_val = 0;
02167     switch (address_type)
02168     {
02169         /*Set 48-bit address*/
02170         case PHY_MAC_48BIT:
02171             break;
02172             /*Set 64-bit address*/
02173         case PHY_MAC_64BIT:
02174             rf_set_address(address_ptr);
02175             break;
02176         /*Set 16-bit address*/
02177         case PHY_MAC_16BIT:
02178             rf_set_short_adr(address_ptr);
02179             break;
02180         /*Set PAN Id*/
02181         case PHY_MAC_PANID:
02182             rf_set_pan_id(address_ptr);
02183             break;
02184     }
02185     return ret_val;
02186 }
02187 
02188 /*
02189  * \brief Function initialises the ACK wait time and returns the used PHY mode.
02190  *
02191  * \param none
02192  *
02193  * \return tmp Used PHY mode
02194  */
02195 static void rf_init_phy_mode(void)
02196 {
02197     uint8_t tmp = 0;
02198     uint8_t part = rf_if_read_part_num();
02199     /*Read used PHY Mode*/
02200     tmp = rf_if_read_register(TRX_CTRL_2);
02201     /*Set ACK wait time for used data rate*/
02202     if(part == PART_AT86RF212)
02203     {
02204         if((tmp & 0x1f) == 0x00)
02205         {
02206             rf_sensitivity = -110;
02207             rf_ack_wait_duration = 938;
02208             tmp = BPSK_20;
02209         }
02210         else if((tmp & 0x1f) == 0x04)
02211         {
02212             rf_sensitivity = -108;
02213             rf_ack_wait_duration = 469;
02214             tmp = BPSK_40;
02215         }
02216         else if((tmp & 0x1f) == 0x14)
02217         {
02218             rf_sensitivity = -108;
02219             rf_ack_wait_duration = 469;
02220             tmp = BPSK_40_ALT;
02221         }
02222         else if((tmp & 0x1f) == 0x08)
02223         {
02224             rf_sensitivity = -101;
02225             rf_ack_wait_duration = 50;
02226             tmp = OQPSK_SIN_RC_100;
02227         }
02228         else if((tmp & 0x1f) == 0x09)
02229         {
02230             rf_sensitivity = -99;
02231             rf_ack_wait_duration = 30;
02232             tmp = OQPSK_SIN_RC_200;
02233         }
02234         else if((tmp & 0x1f) == 0x18)
02235         {
02236             rf_sensitivity = -102;
02237             rf_ack_wait_duration = 50;
02238             tmp = OQPSK_RC_100;
02239         }
02240         else if((tmp & 0x1f) == 0x19)
02241         {
02242             rf_sensitivity = -100;
02243             rf_ack_wait_duration = 30;
02244             tmp = OQPSK_RC_200;
02245         }
02246         else if((tmp & 0x1f) == 0x0c)
02247         {
02248             rf_sensitivity = -100;
02249             rf_ack_wait_duration = 20;
02250             tmp = OQPSK_SIN_250;
02251         }
02252         else if((tmp & 0x1f) == 0x0d)
02253         {
02254             rf_sensitivity = -98;
02255             rf_ack_wait_duration = 25;
02256             tmp = OQPSK_SIN_500;
02257         }
02258         else if((tmp & 0x1f) == 0x0f)
02259         {
02260             rf_sensitivity = -98;
02261             rf_ack_wait_duration = 25;
02262             tmp = OQPSK_SIN_500_ALT;
02263         }
02264         else if((tmp & 0x1f) == 0x1c)
02265         {
02266             rf_sensitivity = -101;
02267             rf_ack_wait_duration = 20;
02268             tmp = OQPSK_RC_250;
02269         }
02270         else if((tmp & 0x1f) == 0x1d)
02271         {
02272             rf_sensitivity = -99;
02273             rf_ack_wait_duration = 25;
02274             tmp = OQPSK_RC_500;
02275         }
02276         else if((tmp & 0x1f) == 0x1f)
02277         {
02278             rf_sensitivity = -99;
02279             rf_ack_wait_duration = 25;
02280             tmp = OQPSK_RC_500_ALT;
02281         }
02282         else if((tmp & 0x3f) == 0x2A)
02283         {
02284             rf_sensitivity = -91;
02285             rf_ack_wait_duration = 25;
02286             tmp = OQPSK_SIN_RC_400_SCR_ON;
02287         }
02288         else if((tmp & 0x3f) == 0x0A)
02289         {
02290             rf_sensitivity = -91;
02291             rf_ack_wait_duration = 25;
02292             tmp = OQPSK_SIN_RC_400_SCR_OFF;
02293         }
02294         else if((tmp & 0x3f) == 0x3A)
02295         {
02296             rf_sensitivity = -97;
02297             rf_ack_wait_duration = 25;
02298             tmp = OQPSK_RC_400_SCR_ON;
02299         }
02300         else if((tmp & 0x3f) == 0x1A)
02301         {
02302             rf_sensitivity = -97;
02303             rf_ack_wait_duration = 25;
02304             tmp = OQPSK_RC_400_SCR_OFF;
02305         }
02306         else if((tmp & 0x3f) == 0x2E)
02307         {
02308             rf_sensitivity = -93;
02309             rf_ack_wait_duration = 13;
02310             tmp = OQPSK_SIN_1000_SCR_ON;
02311         }
02312         else if((tmp & 0x3f) == 0x0E)
02313         {
02314             rf_sensitivity = -93;
02315             rf_ack_wait_duration = 13;
02316             tmp = OQPSK_SIN_1000_SCR_OFF;
02317         }
02318         else if((tmp & 0x3f) == 0x3E)
02319         {
02320             rf_sensitivity = -95;
02321             rf_ack_wait_duration = 13;
02322             tmp = OQPSK_RC_1000_SCR_ON;
02323         }
02324         else if((tmp & 0x3f) == 0x1E)
02325         {
02326             rf_sensitivity = -95;
02327             rf_ack_wait_duration = 13;
02328             tmp = OQPSK_RC_1000_SCR_OFF;
02329         }
02330     }
02331     else
02332     {
02333         rf_sensitivity = -101;
02334         rf_ack_wait_duration = 20;
02335     }
02336     /*Board design might reduces the sensitivity*/
02337     //rf_sensitivity += RF_SENSITIVITY_CALIBRATION;
02338 }
02339 
02340 
02341 static uint8_t rf_scale_lqi(int8_t rssi)
02342 {
02343     uint8_t scaled_lqi;
02344 
02345     /*rssi < RF sensitivity*/
02346     if(rssi < rf_sensitivity)
02347         scaled_lqi=0;
02348     /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
02349     /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
02350     else if(rssi < (rf_sensitivity + 10))
02351         scaled_lqi=31;
02352     /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
02353     /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
02354     else if(rssi < (rf_sensitivity + 20))
02355         scaled_lqi=207;
02356     /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
02357     /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
02358     else if(rssi < (rf_sensitivity + 30))
02359         scaled_lqi=255;
02360     /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
02361     /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
02362     else if(rssi < (rf_sensitivity + 40))
02363         scaled_lqi=255;
02364     /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
02365     /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
02366     else if(rssi < (rf_sensitivity + 50))
02367         scaled_lqi=255;
02368     /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
02369     /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
02370     else if(rssi < (rf_sensitivity + 60))
02371         scaled_lqi=255;
02372     /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
02373     /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
02374     else if(rssi < (rf_sensitivity + 70))
02375         scaled_lqi=255;
02376     /*rssi > RF saturation*/
02377     else if(rssi > (rf_sensitivity + 80))
02378         scaled_lqi=111;
02379     /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
02380     /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
02381     else
02382         scaled_lqi=255;
02383 
02384     return scaled_lqi;
02385 }
02386 
02387 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
02388         PinName spi_sclk, PinName spi_cs,  PinName spi_rst, PinName spi_slp, PinName spi_irq,
02389         PinName i2c_sda, PinName i2c_scl)
02390     : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false),
02391       _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
02392       _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
02393 {
02394     _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq);
02395 }
02396 
02397 NanostackRfPhyAtmel::~NanostackRfPhyAtmel()
02398 {
02399     delete _rf;
02400 }
02401 
02402 int8_t NanostackRfPhyAtmel::rf_register()
02403 {
02404     if (NULL == _rf) {
02405         return -1;
02406     }
02407 
02408     rf_if_lock();
02409 
02410     if (rf != NULL) {
02411         rf_if_unlock();
02412         error("Multiple registrations of NanostackRfPhyAtmel not supported");
02413         return -1;
02414     }
02415 
02416     // Read the mac address if it hasn't been set by a user
02417     rf = _rf;
02418     if (!_mac_set) {
02419         int ret = _mac.read_eui64((void*)_mac_addr);
02420         if (ret < 0) {
02421             rf = NULL;
02422             rf_if_unlock();
02423             return -1;
02424         }
02425     }
02426 
02427     int8_t radio_id = rf_device_register(_mac_addr);
02428     if (radio_id < 0) {
02429         rf = NULL;
02430     }
02431 
02432     rf_if_unlock();
02433     return radio_id;
02434 }
02435 
02436 void NanostackRfPhyAtmel::rf_unregister()
02437 {
02438     rf_if_lock();
02439 
02440     if (NULL == rf) {
02441         rf_if_unlock();
02442         return;
02443     }
02444 
02445     rf_device_unregister();
02446     rf = NULL;
02447 
02448     rf_if_unlock();
02449 }
02450 
02451 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac)
02452 {
02453     rf_if_lock();
02454 
02455     if (NULL == rf) {
02456         error("NanostackRfPhyAtmel Must be registered to read mac address");
02457         rf_if_unlock();
02458         return;
02459     }
02460     memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr));
02461 
02462     rf_if_unlock();
02463 }
02464 
02465 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac)
02466 {
02467     rf_if_lock();
02468 
02469     if (NULL != rf) {
02470         error("NanostackRfPhyAtmel cannot change mac address when running");
02471         rf_if_unlock();
02472         return;
02473     }
02474     memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr));
02475     _mac_set = true;
02476 
02477     rf_if_unlock();
02478 }
02479