Radu Radoveneanu / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Fork of UniGraphic by GraphicsDisplay

Protocols/PAR8.cpp@5:b222a9461d6b, 2015-02-16 (annotated)

Committer:
Geremia
Date:
Mon Feb 16 00:52:24 2015 +0000
Revision:
5:b222a9461d6b
Parent:
4:12ba0ecc2c1f
Child:
7:bb0383b91104
Added pixelread for TFTs

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 4:12ba0ecc2c1f 1 /* mbed UniGraphic library - PAR8 protocol class
Geremia 4:12ba0ecc2c1f 2 * Copyright (c) 2015 Giuliano Dianda
Geremia 4:12ba0ecc2c1f 3 * Released under the MIT License: http://mbed.org/license/mit
Geremia 4:12ba0ecc2c1f 4 *
Geremia 4:12ba0ecc2c1f 5 * Derived work of:
Geremia 4:12ba0ecc2c1f 6 *
Geremia 4:12ba0ecc2c1f 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
Geremia 4:12ba0ecc2c1f 8 * Copyright (c) 2013 Peter Drescher - DC2PD
Geremia 4:12ba0ecc2c1f 9 *
Geremia 4:12ba0ecc2c1f 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Geremia 4:12ba0ecc2c1f 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Geremia 4:12ba0ecc2c1f 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Geremia 4:12ba0ecc2c1f 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Geremia 4:12ba0ecc2c1f 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Geremia 4:12ba0ecc2c1f 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Geremia 4:12ba0ecc2c1f 16 * THE SOFTWARE.
Geremia 4:12ba0ecc2c1f 17 */
Geremia 4:12ba0ecc2c1f 18
Geremia 0:75ec1b3cde17 19 #include "PAR8.h"
Geremia 0:75ec1b3cde17 20
Geremia 0:75ec1b3cde17 21 PAR8::PAR8(PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
Geremia 0:75ec1b3cde17 22 : _port(port,0xFF), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
Geremia 0:75ec1b3cde17 23 {
Geremia 0:75ec1b3cde17 24 _reset = 1;
Geremia 0:75ec1b3cde17 25 _DC=1;
Geremia 0:75ec1b3cde17 26 _WR=1;
Geremia 0:75ec1b3cde17 27 _RD=1;
Geremia 0:75ec1b3cde17 28 _CS=1;
Geremia 0:75ec1b3cde17 29 #ifdef STMPORTDEBUG
Geremia 0:75ec1b3cde17 30 findport(port); //on return, GPIO get disabled
Geremia 0:75ec1b3cde17 31 #endif
Geremia 0:75ec1b3cde17 32 _port.mode(PullNone);
Geremia 0:75ec1b3cde17 33 _port.output(); // will re-enable our GPIO port
Geremia 0:75ec1b3cde17 34 hw_reset();
Geremia 0:75ec1b3cde17 35 }
Geremia 0:75ec1b3cde17 36
Geremia 0:75ec1b3cde17 37 #ifdef STMPORTDEBUG
Geremia 0:75ec1b3cde17 38 // create a port obj with STM HAL drivers, just to collect memorymapped regs
Geremia 0:75ec1b3cde17 39 void PAR8::findport(PortName port)
Geremia 0:75ec1b3cde17 40 {
Geremia 0:75ec1b3cde17 41 port_t tempport;
Geremia 0:75ec1b3cde17 42 port_init(&tempport, port, 0xFF, PIN_INPUT);
Geremia 0:75ec1b3cde17 43 outreg = tempport.reg_out;
Geremia 0:75ec1b3cde17 44 inreg = tempport.reg_in;
Geremia 0:75ec1b3cde17 45 // debug("out 0x%.8X in 0x%.8X\r\n", outreg, inreg);
Geremia 0:75ec1b3cde17 46 }
Geremia 0:75ec1b3cde17 47 #endif
Geremia 1:ff019d22b275 48 void PAR8::wr_cmd8(unsigned char cmd)
Geremia 0:75ec1b3cde17 49 {
Geremia 0:75ec1b3cde17 50 #ifdef USE_CS
Geremia 0:75ec1b3cde17 51 _CS = 0;
Geremia 0:75ec1b3cde17 52 #endif
Geremia 0:75ec1b3cde17 53 _DC = 0; // 0=cmd
Geremia 0:75ec1b3cde17 54 _WR=0;
Geremia 0:75ec1b3cde17 55 _port.write(cmd); // write 8bit
Geremia 0:75ec1b3cde17 56 _WR=1;
Geremia 0:75ec1b3cde17 57 #ifdef USE_CS
Geremia 0:75ec1b3cde17 58 _CS = 1;
Geremia 0:75ec1b3cde17 59 #endif
Geremia 0:75ec1b3cde17 60 }
Geremia 1:ff019d22b275 61 void PAR8::wr_data8(unsigned char data)
Geremia 0:75ec1b3cde17 62 {
Geremia 0:75ec1b3cde17 63 #ifdef USE_CS
Geremia 0:75ec1b3cde17 64 _CS = 0;
Geremia 0:75ec1b3cde17 65 #endif
Geremia 0:75ec1b3cde17 66 _DC = 1; // 1=data
Geremia 0:75ec1b3cde17 67 _WR=0;
Geremia 1:ff019d22b275 68 _port.write(data); // write 8bit
Geremia 0:75ec1b3cde17 69 _WR=1;
Geremia 0:75ec1b3cde17 70 #ifdef USE_CS
Geremia 0:75ec1b3cde17 71 _CS = 1;
Geremia 0:75ec1b3cde17 72 #endif
Geremia 0:75ec1b3cde17 73 }
Geremia 1:ff019d22b275 74 void PAR8::wr_cmd16(unsigned short cmd)
Geremia 1:ff019d22b275 75 {
Geremia 1:ff019d22b275 76 #ifdef USE_CS
Geremia 1:ff019d22b275 77 _CS = 0;
Geremia 1:ff019d22b275 78 #endif
Geremia 1:ff019d22b275 79 _DC = 0; // 0=cmd
Geremia 1:ff019d22b275 80 _WR=0;
Geremia 1:ff019d22b275 81 _port.write(cmd>>8); // write 8bit
Geremia 1:ff019d22b275 82 _WR=1;
Geremia 1:ff019d22b275 83 _WR=0;
Geremia 1:ff019d22b275 84 _port.write(cmd&0xFF); // write 8bit
Geremia 1:ff019d22b275 85 _WR=1;
Geremia 1:ff019d22b275 86 #ifdef USE_CS
Geremia 1:ff019d22b275 87 _CS = 1;
Geremia 1:ff019d22b275 88 #endif
Geremia 1:ff019d22b275 89 }
Geremia 1:ff019d22b275 90 void PAR8::wr_data16(unsigned short data)
Geremia 1:ff019d22b275 91 {
Geremia 1:ff019d22b275 92 #ifdef USE_CS
Geremia 1:ff019d22b275 93 _CS = 0;
Geremia 1:ff019d22b275 94 #endif
Geremia 1:ff019d22b275 95 _DC = 1; // 1=data
Geremia 1:ff019d22b275 96 _WR=0;
Geremia 1:ff019d22b275 97 _port.write(data>>8); // write 8bit
Geremia 1:ff019d22b275 98 _WR=1;
Geremia 1:ff019d22b275 99 _WR=0;
Geremia 1:ff019d22b275 100 _port.write(data&0xFF); // write 8bit
Geremia 1:ff019d22b275 101 _WR=1;
Geremia 1:ff019d22b275 102 #ifdef USE_CS
Geremia 1:ff019d22b275 103 _CS = 1;
Geremia 1:ff019d22b275 104 #endif
Geremia 1:ff019d22b275 105 }
Geremia 4:12ba0ecc2c1f 106 void PAR8::wr_gram(unsigned short data)
Geremia 4:12ba0ecc2c1f 107 {
Geremia 4:12ba0ecc2c1f 108 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 109 _CS = 0;
Geremia 4:12ba0ecc2c1f 110 #endif
Geremia 4:12ba0ecc2c1f 111 _DC = 1; // 1=data
Geremia 4:12ba0ecc2c1f 112 _WR=0;
Geremia 4:12ba0ecc2c1f 113 _port.write(data>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 114 _WR=1;
Geremia 4:12ba0ecc2c1f 115 _WR=0;
Geremia 4:12ba0ecc2c1f 116 _port.write(data&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 117 _WR=1;
Geremia 4:12ba0ecc2c1f 118 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 119 _CS = 1;
Geremia 4:12ba0ecc2c1f 120 #endif
Geremia 4:12ba0ecc2c1f 121 }
Geremia 4:12ba0ecc2c1f 122 void PAR8::wr_gram(unsigned short data, unsigned int count)
Geremia 1:ff019d22b275 123 {
Geremia 1:ff019d22b275 124 #ifdef USE_CS
Geremia 1:ff019d22b275 125 _CS = 0;
Geremia 1:ff019d22b275 126 #endif
Geremia 1:ff019d22b275 127 _DC = 1; // 1=data
Geremia 1:ff019d22b275 128 if((data>>8)==(data&0xFF))
Geremia 1:ff019d22b275 129 {
Geremia 1:ff019d22b275 130 count<<=1;
Geremia 1:ff019d22b275 131 _port.write(data); // write 8bit
Geremia 1:ff019d22b275 132 while(count)
Geremia 1:ff019d22b275 133 {
Geremia 1:ff019d22b275 134 _WR=0;
Geremia 1:ff019d22b275 135 _WR=1;
Geremia 1:ff019d22b275 136 count--;
Geremia 1:ff019d22b275 137 }
Geremia 1:ff019d22b275 138 }
Geremia 1:ff019d22b275 139 else
Geremia 1:ff019d22b275 140 {
Geremia 1:ff019d22b275 141 while(count)
Geremia 1:ff019d22b275 142 {
Geremia 1:ff019d22b275 143 _WR=0;
Geremia 1:ff019d22b275 144 _port.write(data>>8); // write 8bit
Geremia 1:ff019d22b275 145 _WR=1;
Geremia 1:ff019d22b275 146 _WR=0;
Geremia 1:ff019d22b275 147 _port.write(data&0xFF); // write 8bit
Geremia 1:ff019d22b275 148 _WR=1;
Geremia 1:ff019d22b275 149 count--;
Geremia 1:ff019d22b275 150 }
Geremia 1:ff019d22b275 151 }
Geremia 1:ff019d22b275 152 #ifdef USE_CS
Geremia 1:ff019d22b275 153 _CS = 1;
Geremia 1:ff019d22b275 154 #endif
Geremia 1:ff019d22b275 155 }
Geremia 4:12ba0ecc2c1f 156 void PAR8::wr_grambuf(unsigned short* data, unsigned int lenght)
Geremia 1:ff019d22b275 157 {
Geremia 1:ff019d22b275 158 #ifdef USE_CS
Geremia 1:ff019d22b275 159 _CS = 0;
Geremia 1:ff019d22b275 160 #endif
Geremia 1:ff019d22b275 161 _DC = 1; // 1=data
Geremia 1:ff019d22b275 162 while(lenght)
Geremia 1:ff019d22b275 163 {
Geremia 1:ff019d22b275 164 _WR=0;
Geremia 1:ff019d22b275 165 _port.write((*data)>>8); // write 8bit
Geremia 1:ff019d22b275 166 _WR=1;
Geremia 1:ff019d22b275 167 _WR=0;
Geremia 1:ff019d22b275 168 _port.write((*data)&0xFF); // write 8bit
Geremia 1:ff019d22b275 169 _WR=1;
Geremia 1:ff019d22b275 170 data++;
Geremia 1:ff019d22b275 171 lenght--;
Geremia 1:ff019d22b275 172 }
Geremia 1:ff019d22b275 173 #ifdef USE_CS
Geremia 1:ff019d22b275 174 _CS = 1;
Geremia 1:ff019d22b275 175 #endif
Geremia 1:ff019d22b275 176 }
Geremia 5:b222a9461d6b 177 unsigned int PAR8::rd_data32_wdummy()
Geremia 5:b222a9461d6b 178 {
Geremia 5:b222a9461d6b 179 #ifdef USE_CS
Geremia 5:b222a9461d6b 180 _CS = 0;
Geremia 5:b222a9461d6b 181 #endif
Geremia 5:b222a9461d6b 182 unsigned int r=0;
Geremia 5:b222a9461d6b 183 _DC = 1; // 1=data
Geremia 5:b222a9461d6b 184 _port.input();
Geremia 5:b222a9461d6b 185
Geremia 5:b222a9461d6b 186 _RD = 0;
Geremia 5:b222a9461d6b 187 _port.read(); //dummy read
Geremia 5:b222a9461d6b 188 _RD = 1;
Geremia 5:b222a9461d6b 189
Geremia 5:b222a9461d6b 190 _RD = 0;
Geremia 5:b222a9461d6b 191 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 192 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 193 r <<= 8;
Geremia 5:b222a9461d6b 194 _RD = 1;
Geremia 5:b222a9461d6b 195
Geremia 5:b222a9461d6b 196 _RD = 0;
Geremia 5:b222a9461d6b 197 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 198 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 199 r <<= 8;
Geremia 5:b222a9461d6b 200 _RD = 1;
Geremia 5:b222a9461d6b 201
Geremia 5:b222a9461d6b 202 _RD = 0;
Geremia 5:b222a9461d6b 203 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 204 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 205 r <<= 8;
Geremia 5:b222a9461d6b 206 _RD = 1;
Geremia 5:b222a9461d6b 207
Geremia 5:b222a9461d6b 208 _RD = 0;
Geremia 5:b222a9461d6b 209 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 210 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 211 _RD = 1;
Geremia 5:b222a9461d6b 212
Geremia 5:b222a9461d6b 213 _CS = 1; // force CS HIG to interupt the cmd in case was not supported
Geremia 5:b222a9461d6b 214 #ifndef USE_CS //if CS is not used, force fixed LOW again
Geremia 5:b222a9461d6b 215 _CS = 0;
Geremia 5:b222a9461d6b 216 #endif
Geremia 5:b222a9461d6b 217 _port.output();
Geremia 5:b222a9461d6b 218 return r;
Geremia 5:b222a9461d6b 219 }
Geremia 5:b222a9461d6b 220 unsigned short PAR8::rd_gram()
Geremia 5:b222a9461d6b 221 {
Geremia 5:b222a9461d6b 222 #ifdef USE_CS
Geremia 5:b222a9461d6b 223 _CS = 0;
Geremia 5:b222a9461d6b 224 #endif
Geremia 5:b222a9461d6b 225 unsigned short r=0;
Geremia 5:b222a9461d6b 226 _DC = 1; // 1=data
Geremia 5:b222a9461d6b 227 _port.input();
Geremia 5:b222a9461d6b 228
Geremia 5:b222a9461d6b 229 _RD = 0;
Geremia 5:b222a9461d6b 230 _port.read(); //dummy read
Geremia 5:b222a9461d6b 231 _RD = 1;
Geremia 5:b222a9461d6b 232
Geremia 5:b222a9461d6b 233 _RD = 0;
Geremia 5:b222a9461d6b 234 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 235 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 236 r <<= 8;
Geremia 5:b222a9461d6b 237 _RD = 1;
Geremia 5:b222a9461d6b 238
Geremia 5:b222a9461d6b 239 _RD = 0;
Geremia 5:b222a9461d6b 240 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 241 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 242 _RD = 1;
Geremia 5:b222a9461d6b 243
Geremia 5:b222a9461d6b 244 #ifdef USE_CS
Geremia 5:b222a9461d6b 245 _CS = 1;
Geremia 5:b222a9461d6b 246 #endif
Geremia 5:b222a9461d6b 247 _port.output();
Geremia 5:b222a9461d6b 248 return r;
Geremia 5:b222a9461d6b 249 }
Geremia 0:75ec1b3cde17 250 void PAR8::hw_reset()
Geremia 0:75ec1b3cde17 251 {
Geremia 0:75ec1b3cde17 252 wait_ms(15);
Geremia 0:75ec1b3cde17 253 _DC = 1;
Geremia 0:75ec1b3cde17 254 _CS = 1;
Geremia 0:75ec1b3cde17 255 _WR = 1;
Geremia 0:75ec1b3cde17 256 _RD = 1;
Geremia 0:75ec1b3cde17 257 _reset = 0; // display reset
Geremia 0:75ec1b3cde17 258 wait_us(50);
Geremia 0:75ec1b3cde17 259 _reset = 1; // end reset
Geremia 0:75ec1b3cde17 260 wait_ms(15);
Geremia 0:75ec1b3cde17 261 #ifndef USE_CS
Geremia 0:75ec1b3cde17 262 _CS=0; // put CS low now and forever
Geremia 0:75ec1b3cde17 263 #endif
Geremia 0:75ec1b3cde17 264 }
Geremia 0:75ec1b3cde17 265 void PAR8::BusEnable(bool enable)
Geremia 0:75ec1b3cde17 266 {
Geremia 0:75ec1b3cde17 267 _CS = enable ? 0:1;
Geremia 0:75ec1b3cde17 268 }