stm32f4xx_gpio_mort.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_gpio_mort.c
00004   * @author  MCD Application Team
00005   * @version V1.8.0
00006   * @date    04-November-2016
00007   * @brief   This file provides firmware functions to manage the following 
00008   *          functionalities of the GPIO peripheral:           
00009   *           + Initialization and Configuration
00010   *           + GPIO Read and Write
00011   *           + GPIO Alternate functions configuration
00012   * 
00013 @verbatim  
00014  ===============================================================================
00015                       ##### How to use this driver #####
00016  ===============================================================================       
00017  [..]             
00018    (#) Enable the GPIO AHB clock using the following function
00019        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
00020                
00021    (#) Configure the GPIO pin(s) using GPIO_Init()
00022        Four possible configuration are available for each pin:
00023        (++) Input: Floating, Pull-up, Pull-down.
00024        (++) Output: Push-Pull (Pull-up, Pull-down or no Pull)
00025             Open Drain (Pull-up, Pull-down or no Pull). In output mode, the speed 
00026             is configurable: 2 MHz, 25 MHz, 50 MHz or 100 MHz.
00027        (++) Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) Open 
00028             Drain (Pull-up, Pull-down or no Pull).
00029        (++) Analog: required mode when a pin is to be used as ADC channel or DAC 
00030             output.
00031    
00032    (#) Peripherals alternate function:
00033        (++) For ADC and DAC, configure the desired pin in analog mode using 
00034             GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN;
00035             (+++) For other peripherals (TIM, USART...):
00036             (+++) Connect the pin to the desired peripherals' Alternate 
00037                      Function (AF) using GPIO_PinAFConfig() function
00038             (+++) Configure the desired pin in alternate function mode using
00039                      GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
00040             (+++) Select the type, pull-up/pull-down and output speed via 
00041                      GPIO_PuPd, GPIO_OType and GPIO_Speed members
00042             (+++) Call GPIO_Init() function
00043           
00044    (#) To get the level of a pin configured in input mode use GPIO_ReadInputDataBit()
00045             
00046    (#) To set/reset the level of a pin configured in output mode use 
00047        GPIO_SetBits()/GPIO_ResetBits()
00048                  
00049    (#) During and just after reset, the alternate functions are not 
00050        active and the GPIO pins are configured in input floating mode (except JTAG
00051        pins).
00052   
00053    (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose 
00054        (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has 
00055        priority over the GPIO function.
00056   
00057    (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as 
00058        general purpose PH0 and PH1, respectively, when the HSE oscillator is off. 
00059        The HSE has priority over the GPIO function.
00060                
00061 @endverbatim        
00062   *
00063   ******************************************************************************
00064   * @attention
00065   *
00066   * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
00067   *
00068   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00069   * You may not use this file except in compliance with the License.
00070   * You may obtain a copy of the License at:
00071   *
00072   *        http://www.st.com/software_license_agreement_liberty_v2
00073   *
00074   * Unless required by applicable law or agreed to in writing, software 
00075   * distributed under the License is distributed on an "AS IS" BASIS, 
00076   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00077   * See the License for the specific language governing permissions and
00078   * limitations under the License.
00079   *
00080   ******************************************************************************
00081   */
00082 
00083 /* Includes ------------------------------------------------------------------*/
00084 #include "stm32f4xx_gpio_mort.h"
00085 #include "stm32f4xx_rcc_mort.h"
00086 
00087 /** @addtogroup STM32F4xx_StdPeriph_Driver
00088   * @{
00089   */
00090 
00091 /** @defgroup GPIO 
00092   * @brief GPIO driver modules
00093   * @{
00094   */ 
00095 
00096 /* Private typedef -----------------------------------------------------------*/
00097 /* Private define ------------------------------------------------------------*/
00098 /* Private macro -------------------------------------------------------------*/
00099 /* Private variables ---------------------------------------------------------*/
00100 /* Private function prototypes -----------------------------------------------*/
00101 /* Private functions ---------------------------------------------------------*/
00102 
00103 /** @defgroup GPIO_Private_Functions
00104   * @{
00105   */ 
00106 
00107 /** @defgroup GPIO_Group1 Initialization and Configuration
00108  *  @brief   Initialization and Configuration
00109  *
00110 @verbatim   
00111  ===============================================================================
00112                  ##### Initialization and Configuration #####
00113  ===============================================================================  
00114 
00115 @endverbatim
00116   * @{
00117   */
00118 
00119 /**
00120   * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
00121   * @note   By default, The GPIO pins are configured in input floating mode (except JTAG pins).
00122   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00123   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00124   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.  
00125   * @retval None
00126   */
00127 void GPIO_DeInit_mort(GPIO_TypeDef_mort* GPIOx)
00128 {
00129   /* Check the parameters */
00130   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00131 
00132   if (GPIOx == GPIOA_MORT)
00133   {
00134     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE);
00135     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE);
00136   }
00137   else if (GPIOx == GPIOB_MORT)
00138   {
00139     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, ENABLE);
00140     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, DISABLE);
00141   }
00142   else if (GPIOx == GPIOC_MORT)
00143   {
00144     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, ENABLE);
00145     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, DISABLE);
00146   }
00147   else if (GPIOx == GPIOD_MORT)
00148   {
00149     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, ENABLE);
00150     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, DISABLE);
00151   }
00152   else if (GPIOx == GPIOE_MORT)
00153   {
00154     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, ENABLE);
00155     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, DISABLE);
00156   }
00157   else if (GPIOx == GPIOF_MORT)
00158   {
00159     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, ENABLE);
00160     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, DISABLE);
00161   }
00162   else if (GPIOx == GPIOG_MORT)
00163   {
00164     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, ENABLE);
00165     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, DISABLE);
00166   }
00167   else if(GPIOx == GPIOH_MORT)
00168   {
00169     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE);
00170     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE);
00171   }
00172 
00173   /*else if (GPIOx == GPIOI)
00174   {
00175     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE);
00176     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE);
00177   }
00178   else if (GPIOx == GPIOJ)
00179   {
00180     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, ENABLE);
00181     RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, DISABLE);
00182   }
00183   else
00184   {
00185     if (GPIOx == GPIOK)
00186     {
00187       RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, ENABLE);
00188       RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, DISABLE);
00189     }
00190   }*/
00191 }
00192 
00193 /**
00194   * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
00195   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00196   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00197   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.   
00198   * @param  GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
00199   *         the configuration information for the specified GPIO peripheral.
00200   * @retval None
00201   */
00202 void GPIO_Init_mort(GPIO_TypeDef_mort* GPIOx, GPIO_InitTypeDef_mort* GPIO_InitStruct)
00203 {
00204   uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
00205 
00206   /* Check the parameters */
00207   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00208   assert_param(IS_GPIO_PIN_MORT(GPIO_InitStruct->GPIO_Pin));
00209   assert_param(IS_GPIO_MODE_MORT(GPIO_InitStruct->GPIO_Mode));
00210   assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
00211 
00212   /* ------------------------- Configure the port pins ---------------- */
00213   /*-- GPIO Mode Configuration --*/
00214   for (pinpos = 0x00; pinpos < 0x10; pinpos++)
00215   {
00216     pos = ((uint32_t)0x01) << pinpos;
00217     /* Get the port pins position */
00218     currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
00219 
00220     if (currentpin == pos)
00221     {
00222       GPIOx->MODER  &= ~(GPIO_MODER_MODER0_MORT << (pinpos * 2));
00223       GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
00224 
00225       if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
00226       {
00227         /* Check Speed mode parameters */
00228         assert_param(IS_GPIO_SPEED_MORT_MORT(GPIO_InitStruct->GPIO_Speed));
00229 
00230         /* Speed mode configuration */
00231         GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0_MORT << (pinpos * 2));
00232         GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
00233 
00234         /* Check Output mode parameters */
00235         assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
00236 
00237         /* Output mode configuration*/
00238         GPIOx->OTYPER  &= ~((GPIO_OTYPER_OT_0_MORT) << ((uint16_t)pinpos)) ;
00239         GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
00240       }
00241 
00242       /* Pull-up Pull down resistor configuration*/
00243       GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0_MORT << ((uint16_t)pinpos * 2));
00244       GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
00245     }
00246   }
00247 }
00248 
00249 /**
00250   * @brief  Fills each GPIO_InitStruct member with its default value.
00251   * @param  GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized.
00252   * @retval None
00253   */
00254 void GPIO_StructInit_mort(GPIO_InitTypeDef_mort* GPIO_InitStruct)
00255 {
00256   /* Reset GPIO init structure parameters values */
00257   GPIO_InitStruct->GPIO_Pin  = GPIO_Pin_All;
00258   GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN;
00259   GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
00260   GPIO_InitStruct->GPIO_OType = GPIO_OType_PP;
00261   GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL;
00262 }
00263 
00264 /**
00265   * @brief  Locks GPIO Pins configuration registers.
00266   * @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
00267   *         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
00268   * @note   The configuration of the locked GPIO pins can no longer be modified
00269   *         until the next reset.
00270   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00271   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00272   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00273   * @param  GPIO_Pin: specifies the port bit to be locked.
00274   *          This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
00275   * @retval None
00276   */
00277 void GPIO_PinLockConfig_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin)
00278 {
00279   __IO uint32_t tmp = 0x00010000;
00280 
00281   /* Check the parameters */
00282   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00283   assert_param(IS_GPIO_PIN_MORT(GPIO_Pin));
00284 
00285   tmp |= GPIO_Pin;
00286   /* Set LCKK bit */
00287   GPIOx->LCKR = tmp;
00288   /* Reset LCKK bit */
00289   GPIOx->LCKR =  GPIO_Pin;
00290   /* Set LCKK bit */
00291   GPIOx->LCKR = tmp;
00292   /* Read LCKK bit*/
00293   tmp = GPIOx->LCKR;
00294   /* Read LCKK bit*/
00295   tmp = GPIOx->LCKR;
00296 }
00297 
00298 /**
00299   * @}
00300   */
00301 
00302 /** @defgroup GPIO_Group2 GPIO Read and Write
00303  *  @brief   GPIO Read and Write
00304  *
00305 @verbatim   
00306  ===============================================================================
00307                          ##### GPIO Read and Write #####
00308  ===============================================================================  
00309 
00310 @endverbatim
00311   * @{
00312   */
00313 
00314 /**
00315   * @brief  Reads the specified input port pin.
00316   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00317   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00318   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00319   * @param  GPIO_Pin: specifies the port bit to read.
00320   *         This parameter can be GPIO_Pin_x where x can be (0..15).
00321   * @retval The input port pin value.
00322   */
00323 uint8_t GPIO_ReadInputDataBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin)
00324 {
00325   uint8_t bitstatus = 0x00;
00326 
00327   /* Check the parameters */
00328   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00329   assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
00330 
00331   if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
00332   {
00333     bitstatus = (uint8_t)Bit_SET;
00334   }
00335   else
00336   {
00337     bitstatus = (uint8_t)Bit_RESET;
00338   }
00339   return bitstatus;
00340 }
00341 
00342 /**
00343   * @brief  Reads the specified GPIO input data port.
00344   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00345   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00346   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00347   * @retval GPIO input data port value.
00348   */
00349 uint16_t GPIO_ReadInputData_mort(GPIO_TypeDef_mort* GPIOx)
00350 {
00351   /* Check the parameters */
00352   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00353 
00354   return ((uint16_t)GPIOx->IDR);
00355 }
00356 
00357 /**
00358   * @brief  Reads the specified output data port bit.
00359   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00360   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00361   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00362   * @param  GPIO_Pin: specifies the port bit to read.
00363   *          This parameter can be GPIO_Pin_x where x can be (0..15).
00364   * @retval The output port pin value.
00365   */
00366 uint8_t GPIO_ReadOutputDataBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin)
00367 {
00368   uint8_t bitstatus = 0x00;
00369 
00370   /* Check the parameters */
00371   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00372   assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
00373 
00374   if (((GPIOx->ODR) & GPIO_Pin) != (uint32_t)Bit_RESET)
00375   {
00376     bitstatus = (uint8_t)Bit_SET;
00377   }
00378   else
00379   {
00380     bitstatus = (uint8_t)Bit_RESET;
00381   }
00382   return bitstatus;
00383 }
00384 
00385 /**
00386   * @brief  Reads the specified GPIO output data port.
00387   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00388   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00389   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00390   * @retval GPIO output data port value.
00391   */
00392 uint16_t GPIO_ReadOutputData_mort(GPIO_TypeDef_mort* GPIOx)
00393 {
00394   /* Check the parameters */
00395   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00396 
00397   return ((uint16_t)GPIOx->ODR);
00398 }
00399 
00400 /**
00401   * @brief  Sets the selected data port bits.
00402   * @note   This functions uses GPIOx_BSRR register to allow atomic read/modify 
00403   *         accesses. In this way, there is no risk of an IRQ occurring between
00404   *         the read and the modify access.
00405   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00406   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00407   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00408   * @param  GPIO_Pin: specifies the port bits to be written.
00409   *          This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
00410   * @retval None
00411   */
00412 void GPIO_SetBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin)
00413 {
00414   /* Check the parameters */
00415   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00416   assert_param(IS_GPIO_PIN_MORT(GPIO_Pin));
00417 
00418   GPIOx->BSRRL = GPIO_Pin;
00419 }
00420 
00421 /**
00422   * @brief  Clears the selected data port bits.
00423   * @note   This functions uses GPIOx_BSRR register to allow atomic read/modify 
00424   *         accesses. In this way, there is no risk of an IRQ occurring between
00425   *         the read and the modify access.
00426   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00427   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00428   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00429   * @param  GPIO_Pin: specifies the port bits to be written.
00430   *          This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
00431   * @retval None
00432   */
00433 void GPIO_ResetBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin)
00434 {
00435   /* Check the parameters */
00436   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00437   assert_param(IS_GPIO_PIN_MORT(GPIO_Pin));
00438 
00439   GPIOx->BSRRH = GPIO_Pin;
00440 }
00441 
00442 /**
00443   * @brief  Sets or clears the selected data port bit.
00444   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00445   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00446   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00447   * @param  GPIO_Pin: specifies the port bit to be written.
00448   *          This parameter can be one of GPIO_Pin_x where x can be (0..15).
00449   * @param  BitVal: specifies the value to be written to the selected bit.
00450   *          This parameter can be one of the BitAction enum values:
00451   *            @arg Bit_RESET: to clear the port pin
00452   *            @arg Bit_SET: to set the port pin
00453   * @retval None
00454   */
00455 void GPIO_WriteBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
00456 {
00457   /* Check the parameters */
00458   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00459   assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
00460   assert_param(IS_GPIO_BIT_ACTION(BitVal));
00461 
00462   if (BitVal != Bit_RESET)
00463   {
00464     GPIOx->BSRRL = GPIO_Pin;
00465   }
00466   else
00467   {
00468     GPIOx->BSRRH = GPIO_Pin ;
00469   }
00470 }
00471 
00472 /**
00473   * @brief  Writes data to the specified GPIO data port.
00474   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00475   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00476   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00477   * @param  PortVal: specifies the value to be written to the port output data register.
00478   * @retval None
00479   */
00480 void GPIO_Write_mort(GPIO_TypeDef_mort* GPIOx, uint16_t PortVal)
00481 {
00482   /* Check the parameters */
00483   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00484 
00485   GPIOx->ODR = PortVal;
00486 }
00487 
00488 /**
00489   * @brief  Toggles the specified GPIO pins..
00490   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00491   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00492   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00493   * @param  GPIO_Pin: Specifies the pins to be toggled.
00494   * @retval None
00495   */
00496 void GPIO_ToggleBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin)
00497 {
00498   /* Check the parameters */
00499   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00500 
00501   GPIOx->ODR ^= GPIO_Pin;
00502 }
00503 
00504 /**
00505   * @}
00506   */
00507 
00508 /** @defgroup GPIO_Group3 GPIO Alternate functions configuration function
00509  *  @brief   GPIO Alternate functions configuration function
00510  *
00511 @verbatim   
00512  ===============================================================================
00513            ##### GPIO Alternate functions configuration function #####
00514  ===============================================================================  
00515 
00516 @endverbatim
00517   * @{
00518   */
00519 
00520 /**
00521   * @brief  Changes the mapping of the specified pin.
00522   * @param  GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
00523   *                      x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
00524   *                      x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. 
00525   * @param  GPIO_PinSource: specifies the pin for the Alternate function.
00526   *         This parameter can be GPIO_PinSourcex where x can be (0..15).
00527   * @param  GPIO_AFSelection: selects the pin to used as Alternate function.
00528   *          This parameter can be one of the following values:
00529   *            @arg GPIO_AF_RTC_50Hz: Connect RTC_50Hz pin to AF0 (default after reset) 
00530   *            @arg GPIO_AF_MCO: Connect MCO pin (MCO1 and MCO2) to AF0 (default after reset) 
00531   *            @arg GPIO_AF_TAMPER: Connect TAMPER pins (TAMPER_1 and TAMPER_2) to AF0 (default after reset) 
00532   *            @arg GPIO_AF_SWJ: Connect SWJ pins (SWD and JTAG)to AF0 (default after reset) 
00533   *            @arg GPIO_AF_TRACE: Connect TRACE pins to AF0 (default after reset)
00534   *            @arg GPIO_AF_TIM1: Connect TIM1 pins to AF1
00535   *            @arg GPIO_AF_TIM2: Connect TIM2 pins to AF1
00536   *            @arg GPIO_AF_TIM3: Connect TIM3 pins to AF2
00537   *            @arg GPIO_AF_TIM4: Connect TIM4 pins to AF2
00538   *            @arg GPIO_AF_TIM5: Connect TIM5 pins to AF2
00539   *            @arg GPIO_AF_TIM8: Connect TIM8 pins to AF3
00540   *            @arg GPIO_AF_TIM9: Connect TIM9 pins to AF3
00541   *            @arg GPIO_AF_TIM10: Connect TIM10 pins to AF3
00542   *            @arg GPIO_AF_TIM11: Connect TIM11 pins to AF3
00543   *            @arg GPIO_AF_I2C1: Connect I2C1 pins to AF4
00544   *            @arg GPIO_AF_I2C2: Connect I2C2 pins to AF4
00545   *            @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4
00546   *            @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5
00547   *            @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5
00548   *            @arg GPIO_AF_SPI4: Connect SPI4 pins to AF5 
00549   *            @arg GPIO_AF_SPI5: Connect SPI5 pins to AF5 
00550   *            @arg GPIO_AF_SPI6: Connect SPI6 pins to AF5
00551   *            @arg GPIO_AF_SAI1: Connect SAI1 pins to AF6 for STM32F42xxx/43xxx devices.       
00552   *            @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6
00553   *            @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7
00554   *            @arg GPIO_AF_USART1: Connect USART1 pins to AF7
00555   *            @arg GPIO_AF_USART2: Connect USART2 pins to AF7
00556   *            @arg GPIO_AF_USART3: Connect USART3 pins to AF7
00557   *            @arg GPIO_AF_UART4: Connect UART4 pins to AF8
00558   *            @arg GPIO_AF_UART5: Connect UART5 pins to AF8
00559   *            @arg GPIO_AF_USART6: Connect USART6 pins to AF8
00560   *            @arg GPIO_AF_UART7: Connect UART7 pins to AF8
00561   *            @arg GPIO_AF_UART8: Connect UART8 pins to AF8
00562   *            @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9
00563   *            @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9
00564   *            @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9
00565   *            @arg GPIO_AF_TIM13: Connect TIM13 pins to AF9
00566   *            @arg GPIO_AF_TIM14: Connect TIM14 pins to AF9
00567   *            @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10
00568   *            @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10
00569   *            @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11
00570   *            @arg GPIO_AF_FSMC: Connect FSMC pins to AF12 
00571   *            @arg GPIO_AF_FMC: Connect FMC pins to AF12 for STM32F42xxx/43xxx devices.   
00572   *            @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12
00573   *            @arg GPIO_AF_SDIO: Connect SDIO pins to AF12
00574   *            @arg GPIO_AF_DCMI: Connect DCMI pins to AF13
00575   *            @arg GPIO_AF_LTDC: Connect LTDC pins to AF14 for STM32F429xx/439xx devices. 
00576   *            @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15
00577   * @retval None
00578   */
00579 void GPIO_PinAFConfig_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
00580 {
00581   uint32_t temp = 0x00;
00582   uint32_t temp_2 = 0x00;
00583   
00584   /* Check the parameters */
00585   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00586   assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
00587   assert_param(IS_GPIO_AF(GPIO_AF));
00588   
00589   temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
00590   GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
00591   temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp;
00592   GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
00593 }
00594 
00595 /**
00596   * @}
00597   */ 
00598 
00599 /**
00600   * @}
00601   */
00602 
00603 /**
00604   * @}
00605   */ 
00606 
00607 /**
00608   * @}
00609   */ 
00610 
00611 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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