Rajath Ravi
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ravi_blinkycode
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stm32f4xx_adc_mort.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_adc_mort.c 00004 * @author MCD Application Team (with some modifications by melisao@stanford.edu) 00005 * @version V1.8.0 00006 * @date 04-November-2016 00007 * @brief This file provides firmware functions to manage the following 00008 * functionalities of the Analog to Digital Convertor (ADC) peripheral: 00009 * + Initialization and Configuration (in addition to ADC multi mode 00010 * selection) 00011 * + Analog Watchdog configuration 00012 * + Temperature Sensor & Vrefint (Voltage Reference internal) & VBAT 00013 * management 00014 * + Regular Channels Configuration 00015 * + Regular Channels DMA Configuration 00016 * + Injected channels Configuration 00017 * + Interrupts and flags management 00018 * 00019 @verbatim 00020 =============================================================================== 00021 ##### How to use this driver ##### 00022 =============================================================================== 00023 [..] 00024 (#) Enable the ADC interface clock using 00025 RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADCx, ENABLE); 00026 00027 (#) ADC pins configuration 00028 (++) Enable the clock for the ADC GPIOs using the following function: 00029 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); 00030 (++) Configure these ADC pins in analog mode using GPIO_Init(); 00031 00032 (#) Configure the ADC Prescaler, conversion resolution and data 00033 alignment using the ADC_Init() function. 00034 (#) Activate the ADC peripheral using ADC_Cmd() function. 00035 00036 *** Regular channels group configuration *** 00037 ============================================ 00038 [..] 00039 (+) To configure the ADC regular channels group features, use 00040 ADC_Init() and ADC_RegularChannelConfig() functions. 00041 (+) To activate the continuous mode, use the ADC_continuousModeCmd() 00042 function. 00043 (+) To configurate and activate the Discontinuous mode, use the 00044 ADC_DiscModeChannelCountConfig() and ADC_DiscModeCmd() functions. 00045 (+) To read the ADC converted values, use the ADC_GetConversionValue() 00046 function. 00047 00048 *** Multi mode ADCs Regular channels configuration *** 00049 ====================================================== 00050 [..] 00051 (+) Refer to "Regular channels group configuration" description to 00052 configure the ADC1, ADC2 and ADC3 regular channels. 00053 (+) Select the Multi mode ADC regular channels features (dual or 00054 triple mode) using ADC_CommonInit() function and configure 00055 the DMA mode using ADC_MultiModeDMARequestAfterLastTransferCmd() 00056 functions. 00057 (+) Read the ADCs converted values using the 00058 ADC_GetMultiModeConversionValue() function. 00059 00060 *** DMA for Regular channels group features configuration *** 00061 ============================================================= 00062 [..] 00063 (+) To enable the DMA mode for regular channels group, use the 00064 ADC_DMACmd() function. 00065 (+) To enable the generation of DMA requests continuously at the end 00066 of the last DMA transfer, use the ADC_DMARequestAfterLastTransferCmd() 00067 function. 00068 00069 *** Injected channels group configuration *** 00070 ============================================= 00071 [..] 00072 (+) To configure the ADC Injected channels group features, use 00073 ADC_InjectedChannelConfig() and ADC_InjectedSequencerLengthConfig() 00074 functions. 00075 (+) To activate the continuous mode, use the ADC_continuousModeCmd() 00076 function. 00077 (+) To activate the Injected Discontinuous mode, use the 00078 ADC_InjectedDiscModeCmd() function. 00079 (+) To activate the AutoInjected mode, use the ADC_AutoInjectedConvCmd() 00080 function. 00081 (+) To read the ADC converted values, use the ADC_GetInjectedConversionValue() 00082 function. 00083 00084 @endverbatim 00085 ****************************************************************************** 00086 * @attention 00087 * 00088 * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2> 00089 * 00090 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00091 * You may not use this file except in compliance with the License. 00092 * You may obtain a copy of the License at: 00093 * 00094 * http://www.st.com/software_license_agreement_liberty_v2 00095 * 00096 * Unless required by applicable law or agreed to in writing, software 00097 * distributed under the License is distributed on an "AS IS" BASIS, 00098 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00099 * See the License for the specific language governing permissions and 00100 * limitations under the License. 00101 * 00102 ****************************************************************************** 00103 */ 00104 00105 /* Includes ------------------------------------------------------------------*/ 00106 #include "stm32f4xx_adc_mort.h" 00107 #include "stm32f4xx_rcc_mort.h" 00108 00109 /** @addtogroup STM32F4xx_StdPeriph_Driver 00110 * @{ 00111 */ 00112 00113 /** @defgroup ADC 00114 * @brief ADC driver modules 00115 * @{ 00116 */ 00117 00118 /* Private typedef -----------------------------------------------------------*/ 00119 /* Private define ------------------------------------------------------------*/ 00120 00121 /* ADC DISCNUM mask */ 00122 #define CR1_DISCNUM_RESET ((uint32_t)0xFFFF1FFF) 00123 00124 /* ADC AWDCH mask */ 00125 #define CR1_AWDCH_RESET ((uint32_t)0xFFFFFFE0) 00126 00127 /* ADC Analog watchdog enable mode mask */ 00128 #define CR1_AWDMode_RESET ((uint32_t)0xFF3FFDFF) 00129 00130 /* CR1 register Mask */ 00131 #define CR1_CLEAR_MASK ((uint32_t)0xFCFFFEFF) 00132 00133 /* ADC EXTEN mask */ 00134 #define CR2_EXTEN_RESET ((uint32_t)0xCFFFFFFF) 00135 00136 /* ADC JEXTEN mask */ 00137 #define CR2_JEXTEN_RESET ((uint32_t)0xFFCFFFFF) 00138 00139 /* ADC JEXTSEL mask */ 00140 #define CR2_JEXTSEL_RESET ((uint32_t)0xFFF0FFFF) 00141 00142 /* CR2 register Mask */ 00143 #define CR2_CLEAR_MASK ((uint32_t)0xC0FFF7FD) 00144 00145 /* ADC SQx mask */ 00146 #define SQR3_SQ_SET ((uint32_t)0x0000001F) 00147 #define SQR2_SQ_SET ((uint32_t)0x0000001F) 00148 #define SQR1_SQ_SET ((uint32_t)0x0000001F) 00149 00150 /* ADC L Mask */ 00151 #define SQR1_L_RESET ((uint32_t)0xFF0FFFFF) 00152 00153 /* ADC JSQx mask */ 00154 #define JSQR_JSQ_SET ((uint32_t)0x0000001F) 00155 00156 /* ADC JL mask */ 00157 #define JSQR_JL_SET ((uint32_t)0x00300000) 00158 #define JSQR_JL_RESET ((uint32_t)0xFFCFFFFF) 00159 00160 /* ADC SMPx mask */ 00161 #define SMPR1_SMP_SET ((uint32_t)0x00000007) 00162 #define SMPR2_SMP_SET ((uint32_t)0x00000007) 00163 00164 /* ADC JDRx registers offset */ 00165 #define JDR_OFFSET ((uint8_t)0x28) 00166 00167 /* ADC CDR register base address */ 00168 #define CDR_ADDRESS ((uint32_t)0x40012308) 00169 00170 /* ADC CCR register Mask */ 00171 #define CR_CLEAR_MASK ((uint32_t)0xFFFC30E0) 00172 00173 /* Private macro -------------------------------------------------------------*/ 00174 /* Private variables ---------------------------------------------------------*/ 00175 /* Private function prototypes -----------------------------------------------*/ 00176 /* Private functions ---------------------------------------------------------*/ 00177 00178 /** @defgroup ADC_Private_Functions 00179 * @{ 00180 */ 00181 00182 /** @defgroup ADC_Group1 Initialization and Configuration functions 00183 * @brief Initialization and Configuration functions 00184 * 00185 @verbatim 00186 =============================================================================== 00187 ##### Initialization and Configuration functions ##### 00188 =============================================================================== 00189 [..] This section provides functions allowing to: 00190 (+) Initialize and configure the ADC Prescaler 00191 (+) ADC Conversion Resolution (12bit..6bit) 00192 (+) Scan Conversion Mode (multichannel or one channel) for regular group 00193 (+) ADC Continuous Conversion Mode (Continuous or Single conversion) for 00194 regular group 00195 (+) External trigger Edge and source of regular group, 00196 (+) Converted data alignment (left or right) 00197 (+) The number of ADC conversions that will be done using the sequencer for 00198 regular channel group 00199 (+) Multi ADC mode selection 00200 (+) Direct memory access mode selection for multi ADC mode 00201 (+) Delay between 2 sampling phases (used in dual or triple interleaved modes) 00202 (+) Enable or disable the ADC peripheral 00203 @endverbatim 00204 * @{ 00205 */ 00206 00207 /** 00208 * @brief Deinitializes all ADCs peripherals registers to their default reset 00209 * values. 00210 * @param None 00211 * @retval None 00212 */ 00213 void ADC_DeInit_mort(void) 00214 { 00215 /* Enable all ADCs reset state */ 00216 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, ENABLE); 00217 00218 /* Release all ADCs from reset state */ 00219 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, DISABLE); 00220 } 00221 00222 /** 00223 * @brief Initializes the ADCx peripheral according to the specified parameters 00224 * in the ADC_InitStruct. 00225 * @note This function is used to configure the global features of the ADC ( 00226 * Resolution and Data Alignment), however, the rest of the configuration 00227 * parameters are specific to the regular channels group (scan mode 00228 * activation, continuous mode activation, External trigger source and 00229 * edge, number of conversion in the regular channels group sequencer). 00230 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00231 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains 00232 * the configuration information for the specified ADC peripheral. 00233 * @retval None 00234 */ 00235 void ADC_Init_mort(ADC_TypeDef_mort* ADCx, ADC_InitTypeDef_mort* ADC_InitStruct) 00236 { 00237 uint32_t tmpreg1 = 0; 00238 uint8_t tmpreg2 = 0; 00239 /* Check the parameters */ 00240 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00241 assert_param(IS_ADC_RESOLUTION_MORT(ADC_InitStruct->ADC_Resolution)); 00242 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode)); 00243 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode)); 00244 assert_param(IS_ADC_EXT_TRIG_EDGE_MORT(ADC_InitStruct->ADC_ExternalTrigConvEdge)); 00245 assert_param(IS_ADC_EXT_TRIG_MORT(ADC_InitStruct->ADC_ExternalTrigConv)); 00246 assert_param(IS_ADC_DATA_ALIGN_MORT(ADC_InitStruct->ADC_DataAlign)); 00247 assert_param(IS_ADC_REGULAR_LENGTH_MORT(ADC_InitStruct->ADC_NbrOfConversion)); 00248 00249 /*---------------------------- ADCx CR1 Configuration -----------------*/ 00250 /* Get the ADCx CR1 value */ 00251 tmpreg1 = ADCx->CR1; 00252 00253 /* Clear RES and SCAN bits */ 00254 tmpreg1 &= CR1_CLEAR_MASK; 00255 00256 /* Configure ADCx: scan conversion mode and resolution */ 00257 /* Set SCAN bit according to ADC_ScanConvMode value */ 00258 /* Set RES bit according to ADC_Resolution value */ 00259 tmpreg1 |= (uint32_t)(((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8) | \ 00260 ADC_InitStruct->ADC_Resolution); 00261 /* Write to ADCx CR1 */ 00262 ADCx->CR1 = tmpreg1; 00263 /*---------------------------- ADCx CR2 Configuration -----------------*/ 00264 /* Get the ADCx CR2 value */ 00265 tmpreg1 = ADCx->CR2; 00266 00267 /* Clear CONT, ALIGN, EXTEN and EXTSEL bits */ 00268 tmpreg1 &= CR2_CLEAR_MASK; 00269 00270 /* Configure ADCx: external trigger event and edge, data alignment and 00271 continuous conversion mode */ 00272 /* Set ALIGN bit according to ADC_DataAlign value */ 00273 /* Set EXTEN bits according to ADC_ExternalTrigConvEdge value */ 00274 /* Set EXTSEL bits according to ADC_ExternalTrigConv value */ 00275 /* Set CONT bit according to ADC_ContinuousConvMode value */ 00276 tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | \ 00277 ADC_InitStruct->ADC_ExternalTrigConv | 00278 ADC_InitStruct->ADC_ExternalTrigConvEdge | \ 00279 ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1)); 00280 00281 /* Write to ADCx CR2 */ 00282 ADCx->CR2 = tmpreg1; 00283 /*---------------------------- ADCx SQR1 Configuration -----------------*/ 00284 /* Get the ADCx SQR1 value */ 00285 tmpreg1 = ADCx->SQR1; 00286 00287 /* Clear L bits */ 00288 tmpreg1 &= SQR1_L_RESET; 00289 00290 /* Configure ADCx: regular channel sequence length */ 00291 /* Set L bits according to ADC_NbrOfConversion value */ 00292 tmpreg2 |= (uint8_t)(ADC_InitStruct->ADC_NbrOfConversion - (uint8_t)1); 00293 tmpreg1 |= ((uint32_t)tmpreg2 << 20); 00294 00295 /* Write to ADCx SQR1 */ 00296 ADCx->SQR1 = tmpreg1; 00297 } 00298 00299 /** 00300 * @brief Fills each ADC_InitStruct member with its default value. 00301 * @note This function is used to initialize the global features of the ADC ( 00302 * Resolution and Data Alignment), however, the rest of the configuration 00303 * parameters are specific to the regular channels group (scan mode 00304 * activation, continuous mode activation, External trigger source and 00305 * edge, number of conversion in the regular channels group sequencer). 00306 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure which will 00307 * be initialized. 00308 * @retval None 00309 */ 00310 void ADC_StructInit_mort(ADC_InitTypeDef_mort* ADC_InitStruct) 00311 { 00312 /* Initialize the ADC_Mode member */ 00313 ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b; 00314 00315 /* initialize the ADC_ScanConvMode member */ 00316 ADC_InitStruct->ADC_ScanConvMode = DISABLE; 00317 00318 /* Initialize the ADC_ContinuousConvMode member */ 00319 ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; 00320 00321 /* Initialize the ADC_ExternalTrigConvEdge member */ 00322 ADC_InitStruct->ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; 00323 00324 /* Initialize the ADC_ExternalTrigConv member */ 00325 ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; 00326 00327 /* Initialize the ADC_DataAlign member */ 00328 ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; 00329 00330 /* Initialize the ADC_NbrOfConversion member */ 00331 ADC_InitStruct->ADC_NbrOfConversion = 1; 00332 } 00333 00334 /** 00335 * @brief Initializes the ADCs peripherals according to the specified parameters 00336 * in the ADC_CommonInitStruct. 00337 * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure 00338 * that contains the configuration information for All ADCs peripherals. 00339 * @retval None 00340 */ 00341 void ADC_CommonInit_mort(ADC_CommonInitTypeDef_mort* ADC_CommonInitStruct) 00342 { 00343 uint32_t tmpreg1 = 0; 00344 /* Check the parameters */ 00345 assert_param(IS_ADC_MODE_MORT(ADC_CommonInitStruct->ADC_Mode)); 00346 assert_param(IS_ADC_PRESCALER(ADC_CommonInitStruct->ADC_Prescaler)); 00347 assert_param(IS_ADC_DMA_ACCESS_MODE_MORT(ADC_CommonInitStruct->ADC_DMAAccessMode)); 00348 assert_param(IS_ADC_SAMPLING_DELAY_MORT(ADC_CommonInitStruct->ADC_TwoSamplingDelay)); 00349 /*---------------------------- ADC CCR Configuration -----------------*/ 00350 /* Get the ADC CCR value */ 00351 tmpreg1 = ADC->CCR; 00352 00353 /* Clear MULTI, DELAY, DMA and ADCPRE bits */ 00354 tmpreg1 &= CR_CLEAR_MASK; 00355 00356 /* Configure ADCx: Multi mode, Delay between two sampling time, ADC prescaler, 00357 and DMA access mode for multimode */ 00358 /* Set MULTI bits according to ADC_Mode value */ 00359 /* Set ADCPRE bits according to ADC_Prescaler value */ 00360 /* Set DMA bits according to ADC_DMAAccessMode value */ 00361 /* Set DELAY bits according to ADC_TwoSamplingDelay value */ 00362 tmpreg1 |= (uint32_t)(ADC_CommonInitStruct->ADC_Mode | 00363 ADC_CommonInitStruct->ADC_Prescaler | 00364 ADC_CommonInitStruct->ADC_DMAAccessMode | 00365 ADC_CommonInitStruct->ADC_TwoSamplingDelay); 00366 00367 /* Write to ADC CCR */ 00368 ADC->CCR = tmpreg1; 00369 } 00370 00371 /** 00372 * @brief Fills each ADC_CommonInitStruct member with its default value. 00373 * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure 00374 * which will be initialized. 00375 * @retval None 00376 */ 00377 void ADC_CommonStructInit_mort(ADC_CommonInitTypeDef_mort* ADC_CommonInitStruct) 00378 { 00379 /* Initialize the ADC_Mode member */ 00380 ADC_CommonInitStruct->ADC_Mode = ADC_Mode_Independent; 00381 00382 /* initialize the ADC_Prescaler member */ 00383 ADC_CommonInitStruct->ADC_Prescaler = ADC_Prescaler_Div2; 00384 00385 /* Initialize the ADC_DMAAccessMode member */ 00386 ADC_CommonInitStruct->ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; 00387 00388 /* Initialize the ADC_TwoSamplingDelay member */ 00389 ADC_CommonInitStruct->ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; 00390 } 00391 00392 /** 00393 * @brief Enables or disables the specified ADC peripheral. 00394 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00395 * @param NewState: new state of the ADCx peripheral. 00396 * This parameter can be: ENABLE or DISABLE. 00397 * @retval None 00398 */ 00399 void ADC_Cmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 00400 { 00401 /* Check the parameters */ 00402 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00403 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00404 if (NewState != DISABLE) 00405 { 00406 /* Set the ADON bit to wake up the ADC from power down mode */ 00407 ADCx->CR2 |= (uint32_t)ADC_CR2_ADON_MORT; 00408 } 00409 else 00410 { 00411 /* Disable the selected ADC peripheral */ 00412 ADCx->CR2 &= (uint32_t)(~ADC_CR2_ADON_MORT); 00413 } 00414 } 00415 /** 00416 * @} 00417 */ 00418 00419 /** @defgroup ADC_Group2 Analog Watchdog configuration functions 00420 * @brief Analog Watchdog configuration functions 00421 * 00422 @verbatim 00423 =============================================================================== 00424 ##### Analog Watchdog configuration functions ##### 00425 =============================================================================== 00426 [..] This section provides functions allowing to configure the Analog Watchdog 00427 (AWD) feature in the ADC. 00428 00429 [..] A typical configuration Analog Watchdog is done following these steps : 00430 (#) the ADC guarded channel(s) is (are) selected using the 00431 ADC_AnalogWatchdogSingleChannelConfig() function. 00432 (#) The Analog watchdog lower and higher threshold are configured using the 00433 ADC_AnalogWatchdogThresholdsConfig() function. 00434 (#) The Analog watchdog is enabled and configured to enable the check, on one 00435 or more channels, using the ADC_AnalogWatchdogCmd() function. 00436 @endverbatim 00437 * @{ 00438 */ 00439 00440 /** 00441 * @brief Enables or disables the analog watchdog on single/all regular or 00442 * injected channels 00443 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00444 * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration. 00445 * This parameter can be one of the following values: 00446 * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel 00447 * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel 00448 * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel 00449 * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel 00450 * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel 00451 * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels 00452 * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog 00453 * @retval None 00454 */ 00455 void ADC_AnalogWatchdogCmd_mort(ADC_TypeDef_mort* ADCx, uint32_t ADC_AnalogWatchdog) 00456 { 00457 uint32_t tmpreg = 0; 00458 /* Check the parameters */ 00459 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00460 assert_param(IS_ADC_ANALOG_WATCHDOG_MORT(ADC_AnalogWatchdog)); 00461 00462 /* Get the old register value */ 00463 tmpreg = ADCx->CR1; 00464 00465 /* Clear AWDEN, JAWDEN and AWDSGL bits */ 00466 tmpreg &= CR1_AWDMode_RESET; 00467 00468 /* Set the analog watchdog enable mode */ 00469 tmpreg |= ADC_AnalogWatchdog; 00470 00471 /* Store the new register value */ 00472 ADCx->CR1 = tmpreg; 00473 } 00474 00475 /** 00476 * @brief Configures the high and low thresholds of the analog watchdog. 00477 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00478 * @param HighThreshold: the ADC analog watchdog High threshold value. 00479 * This parameter must be a 12-bit value. 00480 * @param LowThreshold: the ADC analog watchdog Low threshold value. 00481 * This parameter must be a 12-bit value. 00482 * @retval None 00483 */ 00484 void ADC_AnalogWatchdogThresholdsConfig_mort(ADC_TypeDef_mort* ADCx, uint16_t HighThreshold, 00485 uint16_t LowThreshold) 00486 { 00487 /* Check the parameters */ 00488 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00489 assert_param(IS_ADC_THRESHOLD_MORT(HighThreshold)); 00490 assert_param(IS_ADC_THRESHOLD_MORT(LowThreshold)); 00491 00492 /* Set the ADCx high threshold */ 00493 ADCx->HTR = HighThreshold; 00494 00495 /* Set the ADCx low threshold */ 00496 ADCx->LTR = LowThreshold; 00497 } 00498 00499 /** 00500 * @brief Configures the analog watchdog guarded single channel 00501 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00502 * @param ADC_Channel: the ADC channel to configure for the analog watchdog. 00503 * This parameter can be one of the following values: 00504 * @arg ADC_Channel_0: ADC Channel0 selected 00505 * @arg ADC_Channel_1: ADC Channel1 selected 00506 * @arg ADC_Channel_2: ADC Channel2 selected 00507 * @arg ADC_Channel_3: ADC Channel3 selected 00508 * @arg ADC_Channel_4: ADC Channel4 selected 00509 * @arg ADC_Channel_5: ADC Channel5 selected 00510 * @arg ADC_Channel_6: ADC Channel6 selected 00511 * @arg ADC_Channel_7: ADC Channel7 selected 00512 * @arg ADC_Channel_8: ADC Channel8 selected 00513 * @arg ADC_Channel_9: ADC Channel9 selected 00514 * @arg ADC_Channel_10: ADC Channel10 selected 00515 * @arg ADC_Channel_11: ADC Channel11 selected 00516 * @arg ADC_Channel_12: ADC Channel12 selected 00517 * @arg ADC_Channel_13: ADC Channel13 selected 00518 * @arg ADC_Channel_14: ADC Channel14 selected 00519 * @arg ADC_Channel_15: ADC Channel15 selected 00520 * @arg ADC_Channel_16: ADC Channel16 selected 00521 * @arg ADC_Channel_17: ADC Channel17 selected 00522 * @arg ADC_Channel_18: ADC Channel18 selected 00523 * @retval None 00524 */ 00525 void ADC_AnalogWatchdogSingleChannelConfig_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_Channel) 00526 { 00527 uint32_t tmpreg = 0; 00528 /* Check the parameters */ 00529 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00530 assert_param(IS_ADC_CHANNEL(ADC_Channel)); 00531 00532 /* Get the old register value */ 00533 tmpreg = ADCx->CR1; 00534 00535 /* Clear the Analog watchdog channel select bits */ 00536 tmpreg &= CR1_AWDCH_RESET; 00537 00538 /* Set the Analog watchdog channel */ 00539 tmpreg |= ADC_Channel; 00540 00541 /* Store the new register value */ 00542 ADCx->CR1 = tmpreg; 00543 } 00544 /** 00545 * @} 00546 */ 00547 00548 /** @defgroup ADC_Group3 Temperature Sensor, Vrefint (Voltage Reference internal) 00549 * and VBAT (Voltage BATtery) management functions 00550 * @brief Temperature Sensor, Vrefint and VBAT management functions 00551 * 00552 @verbatim 00553 =============================================================================== 00554 ##### Temperature Sensor, Vrefint and VBAT management functions ##### 00555 =============================================================================== 00556 [..] This section provides functions allowing to enable/ disable the internal 00557 connections between the ADC and the Temperature Sensor, the Vrefint and 00558 the Vbat sources. 00559 00560 [..] A typical configuration to get the Temperature sensor and Vrefint channels 00561 voltages is done following these steps : 00562 (#) Enable the internal connection of Temperature sensor and Vrefint sources 00563 with the ADC channels using ADC_TempSensorVrefintCmd() function. 00564 (#) Select the ADC_Channel_TempSensor and/or ADC_Channel_Vrefint using 00565 ADC_RegularChannelConfig() or ADC_InjectedChannelConfig() functions 00566 (#) Get the voltage values, using ADC_GetConversionValue() or 00567 ADC_GetInjectedConversionValue(). 00568 00569 [..] A typical configuration to get the VBAT channel voltage is done following 00570 these steps : 00571 (#) Enable the internal connection of VBAT source with the ADC channel using 00572 ADC_VBATCmd() function. 00573 (#) Select the ADC_Channel_Vbat using ADC_RegularChannelConfig() or 00574 ADC_InjectedChannelConfig() functions 00575 (#) Get the voltage value, using ADC_GetConversionValue() or 00576 ADC_GetInjectedConversionValue(). 00577 00578 @endverbatim 00579 * @{ 00580 */ 00581 00582 00583 /** 00584 * @brief Enables or disables the temperature sensor and Vrefint channels. 00585 * @param NewState: new state of the temperature sensor and Vrefint channels. 00586 * This parameter can be: ENABLE or DISABLE. 00587 * @retval None 00588 */ 00589 void ADC_TempSensorVrefintCmd_mort(FunctionalState NewState) 00590 { 00591 /* Check the parameters */ 00592 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00593 if (NewState != DISABLE) 00594 { 00595 /* Enable the temperature sensor and Vrefint channel*/ 00596 ADC->CCR |= (uint32_t)ADC_CCR_TSVREFE_MORT; 00597 } 00598 else 00599 { 00600 /* Disable the temperature sensor and Vrefint channel*/ 00601 ADC->CCR &= (uint32_t)(~ADC_CCR_TSVREFE_MORT); 00602 } 00603 } 00604 00605 /** 00606 * @brief Enables or disables the VBAT (Voltage Battery) channel. 00607 * 00608 * @note the Battery voltage measured is equal to VBAT/2 on STM32F40xx and 00609 * STM32F41xx devices and equal to VBAT/4 on STM32F42xx and STM32F43xx devices 00610 * 00611 * @param NewState: new state of the VBAT channel. 00612 * This parameter can be: ENABLE or DISABLE. 00613 * @retval None 00614 */ 00615 void ADC_VBATCmd_mort(FunctionalState NewState) 00616 { 00617 /* Check the parameters */ 00618 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00619 if (NewState != DISABLE) 00620 { 00621 /* Enable the VBAT channel*/ 00622 ADC->CCR |= (uint32_t)ADC_CCR_VBATE_MORT; 00623 } 00624 else 00625 { 00626 /* Disable the VBAT channel*/ 00627 ADC->CCR &= (uint32_t)(~ADC_CCR_VBATE_MORT); 00628 } 00629 } 00630 00631 /** 00632 * @} 00633 */ 00634 00635 /** @defgroup ADC_Group4 Regular Channels Configuration functions 00636 * @brief Regular Channels Configuration functions 00637 * 00638 @verbatim 00639 =============================================================================== 00640 ##### Regular Channels Configuration functions ##### 00641 =============================================================================== 00642 00643 [..] This section provides functions allowing to manage the ADC's regular channels, 00644 it is composed of 2 sub sections : 00645 00646 (#) Configuration and management functions for regular channels: This subsection 00647 provides functions allowing to configure the ADC regular channels : 00648 (++) Configure the rank in the regular group sequencer for each channel 00649 (++) Configure the sampling time for each channel 00650 (++) select the conversion Trigger for regular channels 00651 (++) select the desired EOC event behavior configuration 00652 (++) Activate the continuous Mode (*) 00653 (++) Activate the Discontinuous Mode 00654 -@@- Please Note that the following features for regular channels 00655 are configured using the ADC_Init() function : 00656 (+@@) scan mode activation 00657 (+@@) continuous mode activation (**) 00658 (+@@) External trigger source 00659 (+@@) External trigger edge 00660 (+@@) number of conversion in the regular channels group sequencer. 00661 00662 -@@- (*) and (**) are performing the same configuration 00663 00664 (#) Get the conversion data: This subsection provides an important function in 00665 the ADC peripheral since it returns the converted data of the current 00666 regular channel. When the Conversion value is read, the EOC Flag is 00667 automatically cleared. 00668 00669 -@- For multi ADC mode, the last ADC1, ADC2 and ADC3 regular conversions 00670 results data (in the selected multi mode) can be returned in the same 00671 time using ADC_GetMultiModeConversionValue() function. 00672 00673 @endverbatim 00674 * @{ 00675 */ 00676 /** 00677 * @brief Configures for the selected ADC regular channel its corresponding 00678 * rank in the sequencer and its sample time. 00679 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00680 * @param ADC_Channel: the ADC channel to configure. 00681 * This parameter can be one of the following values: 00682 * @arg ADC_Channel_0: ADC Channel0 selected 00683 * @arg ADC_Channel_1: ADC Channel1 selected 00684 * @arg ADC_Channel_2: ADC Channel2 selected 00685 * @arg ADC_Channel_3: ADC Channel3 selected 00686 * @arg ADC_Channel_4: ADC Channel4 selected 00687 * @arg ADC_Channel_5: ADC Channel5 selected 00688 * @arg ADC_Channel_6: ADC Channel6 selected 00689 * @arg ADC_Channel_7: ADC Channel7 selected 00690 * @arg ADC_Channel_8: ADC Channel8 selected 00691 * @arg ADC_Channel_9: ADC Channel9 selected 00692 * @arg ADC_Channel_10: ADC Channel10 selected 00693 * @arg ADC_Channel_11: ADC Channel11 selected 00694 * @arg ADC_Channel_12: ADC Channel12 selected 00695 * @arg ADC_Channel_13: ADC Channel13 selected 00696 * @arg ADC_Channel_14: ADC Channel14 selected 00697 * @arg ADC_Channel_15: ADC Channel15 selected 00698 * @arg ADC_Channel_16: ADC Channel16 selected 00699 * @arg ADC_Channel_17: ADC Channel17 selected 00700 * @arg ADC_Channel_18: ADC Channel18 selected 00701 * @param Rank: The rank in the regular group sequencer. 00702 * This parameter must be between 1 to 16. 00703 * @param ADC_SampleTime: The sample time value to be set for the selected channel. 00704 * This parameter can be one of the following values: 00705 * @arg ADC_SampleTime_3Cycles: Sample time equal to 3 cycles 00706 * @arg ADC_SampleTime_15Cycles: Sample time equal to 15 cycles 00707 * @arg ADC_SampleTime_28Cycles: Sample time equal to 28 cycles 00708 * @arg ADC_SampleTime_56Cycles: Sample time equal to 56 cycles 00709 * @arg ADC_SampleTime_84Cycles: Sample time equal to 84 cycles 00710 * @arg ADC_SampleTime_112Cycles: Sample time equal to 112 cycles 00711 * @arg ADC_SampleTime_144Cycles: Sample time equal to 144 cycles 00712 * @arg ADC_SampleTime_480Cycles: Sample time equal to 480 cycles 00713 * @retval None 00714 */ 00715 void ADC_RegularChannelConfig_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) 00716 { 00717 uint32_t tmpreg1 = 0, tmpreg2 = 0; 00718 /* Check the parameters */ 00719 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00720 assert_param(IS_ADC_CHANNEL(ADC_Channel)); 00721 assert_param(IS_ADC_REGULAR_RANK_MORT(Rank)); 00722 assert_param(IS_ADC_SAMPLE_TIME_MORT(ADC_SampleTime)); 00723 00724 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ 00725 if (ADC_Channel > ADC_Channel_9) 00726 { 00727 /* Get the old register value */ 00728 tmpreg1 = ADCx->SMPR1; 00729 00730 /* Calculate the mask to clear */ 00731 tmpreg2 = SMPR1_SMP_SET << (3 * (ADC_Channel - 10)); 00732 00733 /* Clear the old sample time */ 00734 tmpreg1 &= ~tmpreg2; 00735 00736 /* Calculate the mask to set */ 00737 tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); 00738 00739 /* Set the new sample time */ 00740 tmpreg1 |= tmpreg2; 00741 00742 /* Store the new register value */ 00743 ADCx->SMPR1 = tmpreg1; 00744 } 00745 else /* ADC_Channel include in ADC_Channel_[0..9] */ 00746 { 00747 /* Get the old register value */ 00748 tmpreg1 = ADCx->SMPR2; 00749 00750 /* Calculate the mask to clear */ 00751 tmpreg2 = SMPR2_SMP_SET << (3 * ADC_Channel); 00752 00753 /* Clear the old sample time */ 00754 tmpreg1 &= ~tmpreg2; 00755 00756 /* Calculate the mask to set */ 00757 tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); 00758 00759 /* Set the new sample time */ 00760 tmpreg1 |= tmpreg2; 00761 00762 /* Store the new register value */ 00763 ADCx->SMPR2 = tmpreg1; 00764 } 00765 /* For Rank 1 to 6 */ 00766 if (Rank < 7) 00767 { 00768 /* Get the old register value */ 00769 tmpreg1 = ADCx->SQR3; 00770 00771 /* Calculate the mask to clear */ 00772 tmpreg2 = SQR3_SQ_SET << (5 * (Rank - 1)); 00773 00774 /* Clear the old SQx bits for the selected rank */ 00775 tmpreg1 &= ~tmpreg2; 00776 00777 /* Calculate the mask to set */ 00778 tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1)); 00779 00780 /* Set the SQx bits for the selected rank */ 00781 tmpreg1 |= tmpreg2; 00782 00783 /* Store the new register value */ 00784 ADCx->SQR3 = tmpreg1; 00785 } 00786 /* For Rank 7 to 12 */ 00787 else if (Rank < 13) 00788 { 00789 /* Get the old register value */ 00790 tmpreg1 = ADCx->SQR2; 00791 00792 /* Calculate the mask to clear */ 00793 tmpreg2 = SQR2_SQ_SET << (5 * (Rank - 7)); 00794 00795 /* Clear the old SQx bits for the selected rank */ 00796 tmpreg1 &= ~tmpreg2; 00797 00798 /* Calculate the mask to set */ 00799 tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7)); 00800 00801 /* Set the SQx bits for the selected rank */ 00802 tmpreg1 |= tmpreg2; 00803 00804 /* Store the new register value */ 00805 ADCx->SQR2 = tmpreg1; 00806 } 00807 /* For Rank 13 to 16 */ 00808 else 00809 { 00810 /* Get the old register value */ 00811 tmpreg1 = ADCx->SQR1; 00812 00813 /* Calculate the mask to clear */ 00814 tmpreg2 = SQR1_SQ_SET << (5 * (Rank - 13)); 00815 00816 /* Clear the old SQx bits for the selected rank */ 00817 tmpreg1 &= ~tmpreg2; 00818 00819 /* Calculate the mask to set */ 00820 tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13)); 00821 00822 /* Set the SQx bits for the selected rank */ 00823 tmpreg1 |= tmpreg2; 00824 00825 /* Store the new register value */ 00826 ADCx->SQR1 = tmpreg1; 00827 } 00828 } 00829 00830 /** 00831 * @brief Enables the selected ADC software start conversion of the regular channels. 00832 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00833 * @retval None 00834 */ 00835 void ADC_SoftwareStartConv_mort(ADC_TypeDef_mort* ADCx) 00836 { 00837 /* Check the parameters */ 00838 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00839 00840 /* Enable the selected ADC conversion for regular group */ 00841 ADCx->CR2 |= (uint32_t)ADC_CR2_SWSTART_MORT; 00842 } 00843 00844 /** 00845 * @brief Gets the selected ADC Software start regular conversion Status. 00846 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00847 * @retval The new state of ADC software start conversion (SET or RESET). 00848 */ 00849 FlagStatus ADC_GetSoftwareStartConvStatus_mort(ADC_TypeDef_mort* ADCx) 00850 { 00851 FlagStatus bitstatus = RESET; 00852 /* Check the parameters */ 00853 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00854 00855 /* Check the status of SWSTART bit */ 00856 if ((ADCx->CR2 & ADC_CR2_SWSTART_MORT) != (uint32_t)RESET) 00857 { 00858 /* SWSTART bit is set */ 00859 bitstatus = SET; 00860 } 00861 else 00862 { 00863 /* SWSTART bit is reset */ 00864 bitstatus = RESET; 00865 } 00866 00867 /* Return the SWSTART bit status */ 00868 return bitstatus; 00869 } 00870 00871 00872 /** 00873 * @brief Enables or disables the EOC on each regular channel conversion 00874 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00875 * @param NewState: new state of the selected ADC EOC flag rising 00876 * This parameter can be: ENABLE or DISABLE. 00877 * @retval None 00878 */ 00879 void ADC_EOCOnEachRegularChannelCmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 00880 { 00881 /* Check the parameters */ 00882 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00883 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00884 00885 if (NewState != DISABLE) 00886 { 00887 /* Enable the selected ADC EOC rising on each regular channel conversion */ 00888 ADCx->CR2 |= (uint32_t)ADC_CR2_EOCS_MORT; 00889 } 00890 else 00891 { 00892 /* Disable the selected ADC EOC rising on each regular channel conversion */ 00893 ADCx->CR2 &= (uint32_t)(~ADC_CR2_EOCS_MORT); 00894 } 00895 } 00896 00897 /** 00898 * @brief Enables or disables the ADC continuous conversion mode 00899 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00900 * @param NewState: new state of the selected ADC continuous conversion mode 00901 * This parameter can be: ENABLE or DISABLE. 00902 * @retval None 00903 */ 00904 void ADC_ContinuousModeCmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 00905 { 00906 /* Check the parameters */ 00907 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00908 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00909 00910 if (NewState != DISABLE) 00911 { 00912 /* Enable the selected ADC continuous conversion mode */ 00913 ADCx->CR2 |= (uint32_t)ADC_CR2_CONT_MORT; 00914 } 00915 else 00916 { 00917 /* Disable the selected ADC continuous conversion mode */ 00918 ADCx->CR2 &= (uint32_t)(~ADC_CR2_CONT_MORT); 00919 } 00920 } 00921 00922 /** 00923 * @brief Configures the discontinuous mode for the selected ADC regular group 00924 * channel. 00925 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00926 * @param Number: specifies the discontinuous mode regular channel count value. 00927 * This number must be between 1 and 8. 00928 * @retval None 00929 */ 00930 void ADC_DiscModeChannelCountConfig_mort(ADC_TypeDef_mort* ADCx, uint8_t Number) 00931 { 00932 uint32_t tmpreg1 = 0; 00933 uint32_t tmpreg2 = 0; 00934 00935 /* Check the parameters */ 00936 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00937 assert_param(IS_ADC_REGULAR_DISC_NUMBER_MORT(Number)); 00938 00939 /* Get the old register value */ 00940 tmpreg1 = ADCx->CR1; 00941 00942 /* Clear the old discontinuous mode channel count */ 00943 tmpreg1 &= CR1_DISCNUM_RESET; 00944 00945 /* Set the discontinuous mode channel count */ 00946 tmpreg2 = Number - 1; 00947 tmpreg1 |= tmpreg2 << 13; 00948 00949 /* Store the new register value */ 00950 ADCx->CR1 = tmpreg1; 00951 } 00952 00953 /** 00954 * @brief Enables or disables the discontinuous mode on regular group channel 00955 * for the specified ADC 00956 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00957 * @param NewState: new state of the selected ADC discontinuous mode on 00958 * regular group channel. 00959 * This parameter can be: ENABLE or DISABLE. 00960 * @retval None 00961 */ 00962 void ADC_DiscModeCmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 00963 { 00964 /* Check the parameters */ 00965 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00966 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00967 00968 if (NewState != DISABLE) 00969 { 00970 /* Enable the selected ADC regular discontinuous mode */ 00971 ADCx->CR1 |= (uint32_t)ADC_CR1_DISCEN_MORT; 00972 } 00973 else 00974 { 00975 /* Disable the selected ADC regular discontinuous mode */ 00976 ADCx->CR1 &= (uint32_t)(~ADC_CR1_DISCEN_MORT); 00977 } 00978 } 00979 00980 /** 00981 * @brief Returns the last ADCx conversion result data for regular channel. 00982 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 00983 * @retval The Data conversion value. 00984 */ 00985 uint16_t ADC_GetConversionValue_mort(ADC_TypeDef_mort* ADCx) 00986 { 00987 /* Check the parameters */ 00988 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 00989 00990 /* Return the selected ADC conversion value */ 00991 return (uint16_t) ADCx->DR; 00992 } 00993 00994 /** 00995 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results 00996 * data in the selected multi mode. 00997 * @param None 00998 * @retval The Data conversion value. 00999 * @note In dual mode, the value returned by this function is as following 01000 * Data[15:0] : these bits contain the regular data of ADC1. 01001 * Data[31:16]: these bits contain the regular data of ADC2. 01002 * @note In triple mode, the value returned by this function is as following 01003 * Data[15:0] : these bits contain alternatively the regular data of ADC1, ADC3 and ADC2. 01004 * Data[31:16]: these bits contain alternatively the regular data of ADC2, ADC1 and ADC3. 01005 */ 01006 uint32_t ADC_GetMultiModeConversionValue_mort(void) 01007 { 01008 /* Return the multi mode conversion value */ 01009 return (*(__IO uint32_t *) CDR_ADDRESS); 01010 } 01011 /** 01012 * @} 01013 */ 01014 01015 /** @defgroup ADC_Group5 Regular Channels DMA Configuration functions 01016 * @brief Regular Channels DMA Configuration functions 01017 * 01018 @verbatim 01019 =============================================================================== 01020 ##### Regular Channels DMA Configuration functions ##### 01021 =============================================================================== 01022 [..] This section provides functions allowing to configure the DMA for ADC 01023 regular channels. 01024 Since converted regular channel values are stored into a unique data 01025 register, it is useful to use DMA for conversion of more than one regular 01026 channel. This avoids the loss of the data already stored in the ADC 01027 Data register. 01028 When the DMA mode is enabled (using the ADC_DMACmd() function), after each 01029 conversion of a regular channel, a DMA request is generated. 01030 [..] Depending on the "DMA disable selection for Independent ADC mode" 01031 configuration (using the ADC_DMARequestAfterLastTransferCmd() function), 01032 at the end of the last DMA transfer, two possibilities are allowed: 01033 (+) No new DMA request is issued to the DMA controller (feature DISABLED) 01034 (+) Requests can continue to be generated (feature ENABLED). 01035 [..] Depending on the "DMA disable selection for multi ADC mode" configuration 01036 (using the void ADC_MultiModeDMARequestAfterLastTransferCmd() function), 01037 at the end of the last DMA transfer, two possibilities are allowed: 01038 (+) No new DMA request is issued to the DMA controller (feature DISABLED) 01039 (+) Requests can continue to be generated (feature ENABLED). 01040 01041 @endverbatim 01042 * @{ 01043 */ 01044 01045 /** 01046 * @brief Enables or disables the specified ADC DMA request. 01047 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01048 * @param NewState: new state of the selected ADC DMA transfer. 01049 * This parameter can be: ENABLE or DISABLE. 01050 * @retval None 01051 */ 01052 void ADC_DMACmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 01053 { 01054 /* Check the parameters */ 01055 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01056 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01057 if (NewState != DISABLE) 01058 { 01059 /* Enable the selected ADC DMA request */ 01060 ADCx->CR2 |= (uint32_t)ADC_CR2_DMA_MORT; 01061 } 01062 else 01063 { 01064 /* Disable the selected ADC DMA request */ 01065 ADCx->CR2 &= (uint32_t)(~ADC_CR2_DMA_MORT); 01066 } 01067 } 01068 01069 /** 01070 * @brief Enables or disables the ADC DMA request after last transfer (Single-ADC mode) 01071 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01072 * @param NewState: new state of the selected ADC DMA request after last transfer. 01073 * This parameter can be: ENABLE or DISABLE. 01074 * @retval None 01075 */ 01076 void ADC_DMARequestAfterLastTransferCmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 01077 { 01078 /* Check the parameters */ 01079 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01080 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01081 if (NewState != DISABLE) 01082 { 01083 /* Enable the selected ADC DMA request after last transfer */ 01084 ADCx->CR2 |= (uint32_t)ADC_CR2_DDS_MORT; 01085 } 01086 else 01087 { 01088 /* Disable the selected ADC DMA request after last transfer */ 01089 ADCx->CR2 &= (uint32_t)(~ADC_CR2_DDS_MORT); 01090 } 01091 } 01092 01093 /** 01094 * @brief Enables or disables the ADC DMA request after last transfer in multi ADC mode 01095 * @param NewState: new state of the selected ADC DMA request after last transfer. 01096 * This parameter can be: ENABLE or DISABLE. 01097 * @note if Enabled, DMA requests are issued as long as data are converted and 01098 * DMA mode for multi ADC mode (selected using ADC_CommonInit() function 01099 * by ADC_CommonInitStruct.ADC_DMAAccessMode structure member) is 01100 * ADC_DMAAccessMode_1, ADC_DMAAccessMode_2 or ADC_DMAAccessMode_3. 01101 * @retval None 01102 */ 01103 void ADC_MultiModeDMARequestAfterLastTransferCmd_mort(FunctionalState NewState) 01104 { 01105 /* Check the parameters */ 01106 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01107 if (NewState != DISABLE) 01108 { 01109 /* Enable the selected ADC DMA request after last transfer */ 01110 ADC->CCR |= (uint32_t)ADC_CCR_DDS_MORT; 01111 } 01112 else 01113 { 01114 /* Disable the selected ADC DMA request after last transfer */ 01115 ADC->CCR &= (uint32_t)(~ADC_CCR_DDS_MORT); 01116 } 01117 } 01118 /** 01119 * @} 01120 */ 01121 01122 /** @defgroup ADC_Group6 Injected channels Configuration functions 01123 * @brief Injected channels Configuration functions 01124 * 01125 @verbatim 01126 =============================================================================== 01127 ##### Injected channels Configuration functions ##### 01128 =============================================================================== 01129 01130 [..] This section provide functions allowing to configure the ADC Injected channels, 01131 it is composed of 2 sub sections : 01132 01133 (#) Configuration functions for Injected channels: This subsection provides 01134 functions allowing to configure the ADC injected channels : 01135 (++) Configure the rank in the injected group sequencer for each channel 01136 (++) Configure the sampling time for each channel 01137 (++) Activate the Auto injected Mode 01138 (++) Activate the Discontinuous Mode 01139 (++) scan mode activation 01140 (++) External/software trigger source 01141 (++) External trigger edge 01142 (++) injected channels sequencer. 01143 01144 (#) Get the Specified Injected channel conversion data: This subsection 01145 provides an important function in the ADC peripheral since it returns the 01146 converted data of the specific injected channel. 01147 01148 @endverbatim 01149 * @{ 01150 */ 01151 /** 01152 * @brief Configures for the selected ADC injected channel its corresponding 01153 * rank in the sequencer and its sample time. 01154 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01155 * @param ADC_Channel: the ADC channel to configure. 01156 * This parameter can be one of the following values: 01157 * @arg ADC_Channel_0: ADC Channel0 selected 01158 * @arg ADC_Channel_1: ADC Channel1 selected 01159 * @arg ADC_Channel_2: ADC Channel2 selected 01160 * @arg ADC_Channel_3: ADC Channel3 selected 01161 * @arg ADC_Channel_4: ADC Channel4 selected 01162 * @arg ADC_Channel_5: ADC Channel5 selected 01163 * @arg ADC_Channel_6: ADC Channel6 selected 01164 * @arg ADC_Channel_7: ADC Channel7 selected 01165 * @arg ADC_Channel_8: ADC Channel8 selected 01166 * @arg ADC_Channel_9: ADC Channel9 selected 01167 * @arg ADC_Channel_10: ADC Channel10 selected 01168 * @arg ADC_Channel_11: ADC Channel11 selected 01169 * @arg ADC_Channel_12: ADC Channel12 selected 01170 * @arg ADC_Channel_13: ADC Channel13 selected 01171 * @arg ADC_Channel_14: ADC Channel14 selected 01172 * @arg ADC_Channel_15: ADC Channel15 selected 01173 * @arg ADC_Channel_16: ADC Channel16 selected 01174 * @arg ADC_Channel_17: ADC Channel17 selected 01175 * @arg ADC_Channel_18: ADC Channel18 selected 01176 * @param Rank: The rank in the injected group sequencer. 01177 * This parameter must be between 1 to 4. 01178 * @param ADC_SampleTime: The sample time value to be set for the selected channel. 01179 * This parameter can be one of the following values: 01180 * @arg ADC_SampleTime_3Cycles: Sample time equal to 3 cycles 01181 * @arg ADC_SampleTime_15Cycles: Sample time equal to 15 cycles 01182 * @arg ADC_SampleTime_28Cycles: Sample time equal to 28 cycles 01183 * @arg ADC_SampleTime_56Cycles: Sample time equal to 56 cycles 01184 * @arg ADC_SampleTime_84Cycles: Sample time equal to 84 cycles 01185 * @arg ADC_SampleTime_112Cycles: Sample time equal to 112 cycles 01186 * @arg ADC_SampleTime_144Cycles: Sample time equal to 144 cycles 01187 * @arg ADC_SampleTime_480Cycles: Sample time equal to 480 cycles 01188 * @retval None 01189 */ 01190 void ADC_InjectedChannelConfig_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) 01191 { 01192 uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0; 01193 /* Check the parameters */ 01194 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01195 assert_param(IS_ADC_CHANNEL(ADC_Channel)); 01196 assert_param(IS_ADC_INJECTED_RANK_MORT(Rank)); 01197 assert_param(IS_ADC_SAMPLE_TIME_MORT(ADC_SampleTime)); 01198 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ 01199 if (ADC_Channel > ADC_Channel_9) 01200 { 01201 /* Get the old register value */ 01202 tmpreg1 = ADCx->SMPR1; 01203 /* Calculate the mask to clear */ 01204 tmpreg2 = SMPR1_SMP_SET << (3*(ADC_Channel - 10)); 01205 /* Clear the old sample time */ 01206 tmpreg1 &= ~tmpreg2; 01207 /* Calculate the mask to set */ 01208 tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10)); 01209 /* Set the new sample time */ 01210 tmpreg1 |= tmpreg2; 01211 /* Store the new register value */ 01212 ADCx->SMPR1 = tmpreg1; 01213 } 01214 else /* ADC_Channel include in ADC_Channel_[0..9] */ 01215 { 01216 /* Get the old register value */ 01217 tmpreg1 = ADCx->SMPR2; 01218 /* Calculate the mask to clear */ 01219 tmpreg2 = SMPR2_SMP_SET << (3 * ADC_Channel); 01220 /* Clear the old sample time */ 01221 tmpreg1 &= ~tmpreg2; 01222 /* Calculate the mask to set */ 01223 tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); 01224 /* Set the new sample time */ 01225 tmpreg1 |= tmpreg2; 01226 /* Store the new register value */ 01227 ADCx->SMPR2 = tmpreg1; 01228 } 01229 /* Rank configuration */ 01230 /* Get the old register value */ 01231 tmpreg1 = ADCx->JSQR; 01232 /* Get JL value: Number = JL+1 */ 01233 tmpreg3 = (tmpreg1 & JSQR_JL_SET)>> 20; 01234 /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */ 01235 tmpreg2 = JSQR_JSQ_SET << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); 01236 /* Clear the old JSQx bits for the selected rank */ 01237 tmpreg1 &= ~tmpreg2; 01238 /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */ 01239 tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); 01240 /* Set the JSQx bits for the selected rank */ 01241 tmpreg1 |= tmpreg2; 01242 /* Store the new register value */ 01243 ADCx->JSQR = tmpreg1; 01244 } 01245 01246 /** 01247 * @brief Configures the sequencer length for injected channels 01248 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01249 * @param Length: The sequencer length. 01250 * This parameter must be a number between 1 to 4. 01251 * @retval None 01252 */ 01253 void ADC_InjectedSequencerLengthConfig_mort(ADC_TypeDef_mort* ADCx, uint8_t Length) 01254 { 01255 uint32_t tmpreg1 = 0; 01256 uint32_t tmpreg2 = 0; 01257 /* Check the parameters */ 01258 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01259 assert_param(IS_ADC_INJECTED_LENGTH_MORT(Length)); 01260 01261 /* Get the old register value */ 01262 tmpreg1 = ADCx->JSQR; 01263 01264 /* Clear the old injected sequence length JL bits */ 01265 tmpreg1 &= JSQR_JL_RESET; 01266 01267 /* Set the injected sequence length JL bits */ 01268 tmpreg2 = Length - 1; 01269 tmpreg1 |= tmpreg2 << 20; 01270 01271 /* Store the new register value */ 01272 ADCx->JSQR = tmpreg1; 01273 } 01274 01275 /** 01276 * @brief Set the injected channels conversion value offset 01277 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01278 * @param ADC_InjectedChannel: the ADC injected channel to set its offset. 01279 * This parameter can be one of the following values: 01280 * @arg ADC_InjectedChannel_1: Injected Channel1 selected 01281 * @arg ADC_InjectedChannel_2: Injected Channel2 selected 01282 * @arg ADC_InjectedChannel_3: Injected Channel3 selected 01283 * @arg ADC_InjectedChannel_4: Injected Channel4 selected 01284 * @param Offset: the offset value for the selected ADC injected channel 01285 * This parameter must be a 12bit value. 01286 * @retval None 01287 */ 01288 void ADC_SetInjectedOffset_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset) 01289 { 01290 __IO uint32_t tmp = 0; 01291 /* Check the parameters */ 01292 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01293 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); 01294 assert_param(IS_ADC_OFFSET(Offset)); 01295 01296 tmp = (uint32_t)ADCx; 01297 tmp += ADC_InjectedChannel; 01298 01299 /* Set the selected injected channel data offset */ 01300 *(__IO uint32_t *) tmp = (uint32_t)Offset; 01301 } 01302 01303 /** 01304 * @brief Configures the ADCx external trigger for injected channels conversion. 01305 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01306 * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. 01307 * This parameter can be one of the following values: 01308 * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected 01309 * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected 01310 * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected 01311 * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected 01312 * @arg ADC_ExternalTrigInjecConv_T3_CC2: Timer3 capture compare2 selected 01313 * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected 01314 * @arg ADC_ExternalTrigInjecConv_T4_CC1: Timer4 capture compare1 selected 01315 * @arg ADC_ExternalTrigInjecConv_T4_CC2: Timer4 capture compare2 selected 01316 * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected 01317 * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected 01318 * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected 01319 * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected 01320 * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected 01321 * @arg ADC_ExternalTrigInjecConv_T8_CC3: Timer8 capture compare3 selected 01322 * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected 01323 * @arg ADC_ExternalTrigInjecConv_Ext_IT15: External interrupt line 15 event selected 01324 * @retval None 01325 */ 01326 void ADC_ExternalTrigInjectedConvConfig_mort(ADC_TypeDef_mort* ADCx, uint32_t ADC_ExternalTrigInjecConv) 01327 { 01328 uint32_t tmpreg = 0; 01329 /* Check the parameters */ 01330 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01331 assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv)); 01332 01333 /* Get the old register value */ 01334 tmpreg = ADCx->CR2; 01335 01336 /* Clear the old external event selection for injected group */ 01337 tmpreg &= CR2_JEXTSEL_RESET; 01338 01339 /* Set the external event selection for injected group */ 01340 tmpreg |= ADC_ExternalTrigInjecConv; 01341 01342 /* Store the new register value */ 01343 ADCx->CR2 = tmpreg; 01344 } 01345 01346 /** 01347 * @brief Configures the ADCx external trigger edge for injected channels conversion. 01348 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01349 * @param ADC_ExternalTrigInjecConvEdge: specifies the ADC external trigger edge 01350 * to start injected conversion. 01351 * This parameter can be one of the following values: 01352 * @arg ADC_ExternalTrigInjecConvEdge_None: external trigger disabled for 01353 * injected conversion 01354 * @arg ADC_ExternalTrigInjecConvEdge_Rising: detection on rising edge 01355 * @arg ADC_ExternalTrigInjecConvEdge_Falling: detection on falling edge 01356 * @arg ADC_ExternalTrigInjecConvEdge_RisingFalling: detection on both rising 01357 * and falling edge 01358 * @retval None 01359 */ 01360 void ADC_ExternalTrigInjectedConvEdgeConfig_mort(ADC_TypeDef_mort* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge) 01361 { 01362 uint32_t tmpreg = 0; 01363 /* Check the parameters */ 01364 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01365 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE_MORT(ADC_ExternalTrigInjecConvEdge)); 01366 /* Get the old register value */ 01367 tmpreg = ADCx->CR2; 01368 /* Clear the old external trigger edge for injected group */ 01369 tmpreg &= CR2_JEXTEN_RESET; 01370 /* Set the new external trigger edge for injected group */ 01371 tmpreg |= ADC_ExternalTrigInjecConvEdge; 01372 /* Store the new register value */ 01373 ADCx->CR2 = tmpreg; 01374 } 01375 01376 /** 01377 * @brief Enables the selected ADC software start conversion of the injected channels. 01378 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01379 * @retval None 01380 */ 01381 void ADC_SoftwareStartInjectedConv_mort(ADC_TypeDef_mort* ADCx) 01382 { 01383 /* Check the parameters */ 01384 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01385 /* Enable the selected ADC conversion for injected group */ 01386 ADCx->CR2 |= (uint32_t)ADC_CR2_JSWSTART_MORT; 01387 } 01388 01389 /** 01390 * @brief Gets the selected ADC Software start injected conversion Status. 01391 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01392 * @retval The new state of ADC software start injected conversion (SET or RESET). 01393 */ 01394 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus_mort(ADC_TypeDef_mort* ADCx) 01395 { 01396 FlagStatus bitstatus = RESET; 01397 /* Check the parameters */ 01398 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01399 01400 /* Check the status of JSWSTART bit */ 01401 if ((ADCx->CR2 & ADC_CR2_JSWSTART_MORT) != (uint32_t)RESET) 01402 { 01403 /* JSWSTART bit is set */ 01404 bitstatus = SET; 01405 } 01406 else 01407 { 01408 /* JSWSTART bit is reset */ 01409 bitstatus = RESET; 01410 } 01411 /* Return the JSWSTART bit status */ 01412 return bitstatus; 01413 } 01414 01415 /** 01416 * @brief Enables or disables the selected ADC automatic injected group 01417 * conversion after regular one. 01418 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01419 * @param NewState: new state of the selected ADC auto injected conversion 01420 * This parameter can be: ENABLE or DISABLE. 01421 * @retval None 01422 */ 01423 void ADC_AutoInjectedConvCmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 01424 { 01425 /* Check the parameters */ 01426 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01427 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01428 if (NewState != DISABLE) 01429 { 01430 /* Enable the selected ADC automatic injected group conversion */ 01431 ADCx->CR1 |= (uint32_t)ADC_CR1_JAUTO_MORT; 01432 } 01433 else 01434 { 01435 /* Disable the selected ADC automatic injected group conversion */ 01436 ADCx->CR1 &= (uint32_t)(~ADC_CR1_JAUTO_MORT); 01437 } 01438 } 01439 01440 /** 01441 * @brief Enables or disables the discontinuous mode for injected group 01442 * channel for the specified ADC 01443 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01444 * @param NewState: new state of the selected ADC discontinuous mode on injected 01445 * group channel. 01446 * This parameter can be: ENABLE or DISABLE. 01447 * @retval None 01448 */ 01449 void ADC_InjectedDiscModeCmd_mort(ADC_TypeDef_mort* ADCx, FunctionalState NewState) 01450 { 01451 /* Check the parameters */ 01452 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01453 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01454 if (NewState != DISABLE) 01455 { 01456 /* Enable the selected ADC injected discontinuous mode */ 01457 ADCx->CR1 |= (uint32_t)ADC_CR1_JDISCEN_MORT; 01458 } 01459 else 01460 { 01461 /* Disable the selected ADC injected discontinuous mode */ 01462 ADCx->CR1 &= (uint32_t)(~ADC_CR1_JDISCEN_MORT); 01463 } 01464 } 01465 01466 /** 01467 * @brief Returns the ADC injected channel conversion result 01468 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01469 * @param ADC_InjectedChannel: the converted ADC injected channel. 01470 * This parameter can be one of the following values: 01471 * @arg ADC_InjectedChannel_1: Injected Channel1 selected 01472 * @arg ADC_InjectedChannel_2: Injected Channel2 selected 01473 * @arg ADC_InjectedChannel_3: Injected Channel3 selected 01474 * @arg ADC_InjectedChannel_4: Injected Channel4 selected 01475 * @retval The Data conversion value. 01476 */ 01477 uint16_t ADC_GetInjectedConversionValue_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_InjectedChannel) 01478 { 01479 __IO uint32_t tmp = 0; 01480 01481 /* Check the parameters */ 01482 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01483 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); 01484 01485 tmp = (uint32_t)ADCx; 01486 tmp += ADC_InjectedChannel + JDR_OFFSET; 01487 01488 /* Returns the selected injected channel conversion data value */ 01489 return (uint16_t) (*(__IO uint32_t*) tmp); 01490 } 01491 /** 01492 * @} 01493 */ 01494 01495 /** @defgroup ADC_Group7 Interrupts and flags management functions 01496 * @brief Interrupts and flags management functions 01497 * 01498 @verbatim 01499 =============================================================================== 01500 ##### Interrupts and flags management functions ##### 01501 =============================================================================== 01502 01503 [..] This section provides functions allowing to configure the ADC Interrupts 01504 and to get the status and clear flags and Interrupts pending bits. 01505 01506 [..] Each ADC provides 4 Interrupts sources and 6 Flags which can be divided 01507 into 3 groups: 01508 01509 *** Flags and Interrupts for ADC regular channels *** 01510 ===================================================== 01511 [..] 01512 (+) Flags : 01513 (##) ADC_FLAG_OVR_MORT : Overrun detection when regular converted data are lost 01514 01515 (##) ADC_FLAG_EOC_MORT : Regular channel end of conversion ==> to indicate 01516 (depending on EOCS bit, managed by ADC_EOCOnEachRegularChannelCmd() ) 01517 the end of: 01518 (+++) a regular CHANNEL conversion 01519 (+++) sequence of regular GROUP conversions . 01520 01521 (##) ADC_FLAG_STRT_MORT: Regular channel start ==> to indicate when regular 01522 CHANNEL conversion starts. 01523 [..] 01524 (+) Interrupts : 01525 (##) ADC_IT_OVR_MORT : specifies the interrupt source for Overrun detection 01526 event. 01527 (##) ADC_IT_EOC_MORT : specifies the interrupt source for Regular channel end 01528 of conversion event. 01529 01530 01531 *** Flags and Interrupts for ADC Injected channels *** 01532 ====================================================== 01533 [..] 01534 (+) Flags : 01535 (##) ADC_FLAG_JEOC_MORT : Injected channel end of conversion ==> to indicate 01536 at the end of injected GROUP conversion 01537 01538 (##) ADC_FLAG_JSTRT_MORT: Injected channel start ==> to indicate hardware when 01539 injected GROUP conversion starts. 01540 [..] 01541 (+) Interrupts : 01542 (##) ADC_IT_JEOC_MORT : specifies the interrupt source for Injected channel 01543 end of conversion event. 01544 01545 *** General Flags and Interrupts for the ADC *** 01546 ================================================ 01547 [..] 01548 (+)Flags : 01549 (##) ADC_FLAG_AWD_MORT: Analog watchdog ==> to indicate if the converted voltage 01550 crosses the programmed thresholds values. 01551 [..] 01552 (+) Interrupts : 01553 (##) ADC_IT_AWD_MORT : specifies the interrupt source for Analog watchdog event. 01554 01555 01556 [..] The user should identify which mode will be used in his application to 01557 manage the ADC controller events: Polling mode or Interrupt mode. 01558 01559 [..] In the Polling Mode it is advised to use the following functions: 01560 (+) ADC_GetFlagStatus() : to check if flags events occur. 01561 (+) ADC_ClearFlag() : to clear the flags events. 01562 01563 [..] In the Interrupt Mode it is advised to use the following functions: 01564 (+) ADC_ITConfig() : to enable or disable the interrupt source. 01565 (+) ADC_GetITStatus() : to check if Interrupt occurs. 01566 (+) ADC_ClearITPendingBit() : to clear the Interrupt pending Bit 01567 (corresponding Flag). 01568 @endverbatim 01569 * @{ 01570 */ 01571 /** 01572 * @brief Enables or disables the specified ADC interrupts. 01573 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01574 * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. 01575 * This parameter can be one of the following values: 01576 * @arg ADC_IT_EOC_MORT: End of conversion interrupt mask 01577 * @arg ADC_IT_AWD_MORT: Analog watchdog interrupt mask 01578 * @arg ADC_IT_JEOC_MORT: End of injected conversion interrupt mask 01579 * @arg ADC_IT_OVR_MORT: Overrun interrupt enable 01580 * @param NewState: new state of the specified ADC interrupts. 01581 * This parameter can be: ENABLE or DISABLE. 01582 * @retval None 01583 */ 01584 void ADC_ITConfig_mort(ADC_TypeDef_mort* ADCx, uint16_t ADC_IT, FunctionalState NewState) 01585 { 01586 uint32_t itmask = 0; 01587 /* Check the parameters */ 01588 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01589 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01590 assert_param(IS_ADC_IT(ADC_IT)); 01591 01592 /* Get the ADC IT index */ 01593 itmask = (uint8_t)ADC_IT; 01594 itmask = (uint32_t)0x01 << itmask; 01595 01596 if (NewState != DISABLE) 01597 { 01598 /* Enable the selected ADC interrupts */ 01599 ADCx->CR1 |= itmask; 01600 } 01601 else 01602 { 01603 /* Disable the selected ADC interrupts */ 01604 ADCx->CR1 &= (~(uint32_t)itmask); 01605 } 01606 } 01607 01608 /** 01609 * @brief Checks whether the specified ADC flag is set or not. 01610 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01611 * @param ADC_FLAG: specifies the flag to check. 01612 * This parameter can be one of the following values: 01613 * @arg ADC_FLAG_AWD_MORT: Analog watchdog flag 01614 * @arg ADC_FLAG_EOC_MORT: End of conversion flag 01615 * @arg ADC_FLAG_JEOC_MORT: End of injected group conversion flag 01616 * @arg ADC_FLAG_JSTRT_MORT: Start of injected group conversion flag 01617 * @arg ADC_FLAG_STRT_MORT: Start of regular group conversion flag 01618 * @arg ADC_FLAG_OVR_MORT: Overrun flag 01619 * @retval The new state of ADC_FLAG (SET or RESET). 01620 */ 01621 FlagStatus ADC_GetFlagStatus_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_FLAG) 01622 { 01623 FlagStatus bitstatus = RESET; 01624 /* Check the parameters */ 01625 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01626 assert_param(IS_ADC_GET_FLAG(ADC_FLAG)); 01627 01628 /* Check the status of the specified ADC flag */ 01629 if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET) 01630 { 01631 /* ADC_FLAG is set */ 01632 bitstatus = SET; 01633 } 01634 else 01635 { 01636 /* ADC_FLAG is reset */ 01637 bitstatus = RESET; 01638 } 01639 /* Return the ADC_FLAG status */ 01640 return bitstatus; 01641 } 01642 01643 /** 01644 * @brief Clears the ADCx's pending flags. 01645 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01646 * @param ADC_FLAG: specifies the flag to clear. 01647 * This parameter can be any combination of the following values: 01648 * @arg ADC_FLAG_AWD_MORT: Analog watchdog flag 01649 * @arg ADC_FLAG_EOC_MORT: End of conversion flag 01650 * @arg ADC_FLAG_JEOC_MORT: End of injected group conversion flag 01651 * @arg ADC_FLAG_JSTRT_MORT: Start of injected group conversion flag 01652 * @arg ADC_FLAG_STRT_MORT: Start of regular group conversion flag 01653 * @arg ADC_FLAG_OVR_MORT: Overrun flag 01654 * @retval None 01655 */ 01656 void ADC_ClearFlag_mort(ADC_TypeDef_mort* ADCx, uint8_t ADC_FLAG) 01657 { 01658 /* Check the parameters */ 01659 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01660 assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG)); 01661 01662 /* Clear the selected ADC flags */ 01663 ADCx->SR = ~(uint32_t)ADC_FLAG; 01664 } 01665 01666 /** 01667 * @brief Checks whether the specified ADC interrupt has occurred or not. 01668 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01669 * @param ADC_IT: specifies the ADC interrupt source to check. 01670 * This parameter can be one of the following values: 01671 * @arg ADC_IT_EOC_MORT: End of conversion interrupt mask 01672 * @arg ADC_IT_AWD_MORT: Analog watchdog interrupt mask 01673 * @arg ADC_IT_JEOC_MORT: End of injected conversion interrupt mask 01674 * @arg ADC_IT_OVR_MORT: Overrun interrupt mask 01675 * @retval The new state of ADC_IT (SET or RESET). 01676 */ 01677 ITStatus ADC_GetITStatus_mort(ADC_TypeDef_mort* ADCx, uint16_t ADC_IT) 01678 { 01679 ITStatus bitstatus = RESET; 01680 uint32_t itmask = 0, enablestatus = 0; 01681 01682 /* Check the parameters */ 01683 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01684 assert_param(IS_ADC_IT(ADC_IT)); 01685 01686 /* Get the ADC IT index */ 01687 itmask = ADC_IT >> 8; 01688 01689 /* Get the ADC_IT enable bit status */ 01690 enablestatus = (ADCx->CR1 & ((uint32_t)0x01 << (uint8_t)ADC_IT)) ; 01691 01692 /* Check the status of the specified ADC interrupt */ 01693 if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus) 01694 { 01695 /* ADC_IT is set */ 01696 bitstatus = SET; 01697 } 01698 else 01699 { 01700 /* ADC_IT is reset */ 01701 bitstatus = RESET; 01702 } 01703 /* Return the ADC_IT status */ 01704 return bitstatus; 01705 } 01706 01707 /** 01708 * @brief Clears the ADCx's interrupt pending bits. 01709 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. 01710 * @param ADC_IT: specifies the ADC interrupt pending bit to clear. 01711 * This parameter can be one of the following values: 01712 * @arg ADC_IT_EOC_MORT: End of conversion interrupt mask 01713 * @arg ADC_IT_AWD_MORT: Analog watchdog interrupt mask 01714 * @arg ADC_IT_JEOC_MORT: End of injected conversion interrupt mask 01715 * @arg ADC_IT_OVR_MORT: Overrun interrupt mask 01716 * @retval None 01717 */ 01718 void ADC_ClearITPendingBit_mort(ADC_TypeDef_mort* ADCx, uint16_t ADC_IT) 01719 { 01720 uint8_t itmask = 0; 01721 /* Check the parameters */ 01722 assert_param(IS_ADC_ALL_PERIPH(ADCx)); 01723 assert_param(IS_ADC_IT(ADC_IT)); 01724 /* Get the ADC IT index */ 01725 itmask = (uint8_t)(ADC_IT >> 8); 01726 /* Clear the selected ADC interrupt pending bits */ 01727 ADCx->SR = ~(uint32_t)itmask; 01728 } 01729 /** 01730 * @} 01731 */ 01732 01733 /** 01734 * @} 01735 */ 01736 01737 /** 01738 * @} 01739 */ 01740 01741 /** 01742 * @} 01743 */ 01744 01745 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 01746 01747 01748 01749 01750
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