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gpio.c
00001 #include "gpio.h" 00002 #include "main_Lec9.h" 00003 #include "stm32f4xx_rcc_mort.h" 00004 00005 00006 /* Below are defined Address of Port B and corresponding registers*/ 00007 #define PORTB_BASE_ADDRESS ((uint32_t)0x40020400) 00008 #define PORTB_MODER_REGISTER (PORTB_BASE_ADDRESS + 0x00) 00009 #define PORTB_OTYPER_REGISTER (PORTB_BASE_ADDRESS + 0x04) 00010 #define PORTB_OSPEEDR_REGISTER (PORTB_BASE_ADDRESS + 0x08) 00011 #define PORTB_PUPDR_REGISTER (PORTB_BASE_ADDRESS + 0x0C) 00012 #define PORTB_IDR_REGISTER (PORTB_BASE_ADDRESS + 0x10) 00013 #define PORTB_ODR_REGISTER (PORTB_BASE_ADDRESS + 0x14) 00014 #define PORTB_AFR1_REGISTER (PORTB_BASE_ADDRESS + 0x20) 00015 00016 /* Below are defined Address of Port C and corresponding registers*/ 00017 #define PORTC_BASE_ADDRESS ((uint32_t)0x40020800) 00018 #define PORTC_MODER_REGISTER (PORTC_BASE_ADDRESS + 0x00) 00019 #define PORTC_OTYPER_REGISTER (PORTC_BASE_ADDRESS + 0x04) 00020 #define PORTC_OSPEEDR_REGISTER (PORTC_BASE_ADDRESS + 0x08) 00021 #define PORTC_PUPDR_REGISTER (PORTC_BASE_ADDRESS + 0x0C) 00022 #define PORTC_IDR_REGISTER (PORTC_BASE_ADDRESS + 0x10) 00023 #define PORTC_ODR_REGISTER (PORTC_BASE_ADDRESS + 0x14) 00024 #define PORTC_AFR1_REGISTER (PORTC_BASE_ADDRESS + 0x20) 00025 00026 void InitPortBPin0asOutput(void) 00027 { 00028 uint32_t *reg; /*Define Pointer*/ 00029 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* Enable the clock */ 00030 00031 reg = (uint32_t *)PORTB_MODER_REGISTER; 00032 *reg = *reg & (~((uint32_t)0x03)); /*Clear last two bits of Moder Register*/ 00033 *reg = *reg | ((uint32_t)0x01); /* Set the last two pins corresponding to Pin0 as Output Mode - 01 */ 00034 00035 reg = (uint32_t *)PORTB_OTYPER_REGISTER; 00036 *reg = *reg & (~((uint32_t)0x01)); /* Clear the last bit of OTYPER REGISTER*/ 00037 *reg = *reg | ((uint32_t)0x00);/*Statement is to set the OTYPER REGISTER TO 0 - Push Pull Type*/ 00038 00039 reg = (uint32_t *)PORTB_PUPDR_REGISTER; 00040 *reg = *reg & (~((uint32_t)0x03)); /* Clear the last two bits of PUPDR REGISTER*/ 00041 *reg = *reg | ((uint32_t)0x00);/*Statement is to set the PUPDR REGISTER TO 00 - No Pull Up No Pull Down Type*/ 00042 00043 //reg=(uint32_t *)PORTB_OSPEEDR_REGISTER; 00044 //*reg=*reg&(~((uint32_t)0x11)); /* Clear the last two bits of OSPEEDR REGISTER*/ 00045 //*reg=*reg|((uint32_t)0x11); /* Set the last two bits of OSPEEDR REGISTER to High Speed*/ 00046 00047 reg = (uint32_t *)PORTB_ODR_REGISTER; 00048 *reg = *reg | ((uint32_t)0x01); /* Setting the ODR REGISTER TO HIGH TO START WITH - Last bit is 1*/ 00049 } 00050 00051 00052 00053 void toggleGPIOB0(void) 00054 { 00055 uint32_t value; 00056 uint32_t *reg; /* Defining the variables*/ 00057 00058 reg = (uint32_t *)PORTB_ODR_REGISTER; /*Initializing the current value of ODR REGISTER*/ 00059 value = *reg & ((uint32_t)0x1); /* Reading the value of last bit of current ODR REGISTER - Stored in reg*/ 00060 00061 if (value > 0) 00062 { 00063 /* The bit is high initially*/ 00064 /*Need to set it to low now*/ 00065 *reg = *reg & (~((uint32_t)0x1)); 00066 } 00067 00068 else 00069 { 00070 /* The bit is low initially*/ 00071 /* Need to set it to high now*/ 00072 *reg = *reg | ((uint32_t)0x01); 00073 } 00074 } 00075 00076 00077 00078 00079 void InitGPIOBPin0asOutputCompare(void) 00080 { 00081 uint32_t *reg; //Initialize register pointer variable 00082 00083 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* Enable the clock */ 00084 00085 reg = (uint32_t *)PORTB_MODER_REGISTER; 00086 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of MODER REGISTER 00087 *reg = *reg | ((uint32_t)0b10); //Write 10 to last two bits of MODER REGISTER 00088 00089 reg = (uint32_t *)PORTB_OTYPER_REGISTER; 00090 *reg = *reg & (~((uint32_t)0x01)); //Clear last bit of OTYPER REGISTER 00091 *reg = *reg | ((uint32_t)0x00); //Setting 0 to last bit of OTYPER REGISTER 00092 00093 reg = (uint32_t *)PORTB_PUPDR_REGISTER; 00094 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of PUPDR REGISTER - NO PULL UP/DOWN 00095 00096 //reg = (uint32_t *)PORTB_OSPEEDR_REGISTER; 00097 //*reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of OSPEEDR REGISTER 00098 //*reg = *reg | ((uint32_t)0x03); //Setting of 11 to last two bits of OSPEEDR REGISTER - HIGH SPEED 00099 00100 reg = (uint32_t *)PORTB_AFR1_REGISTER; 00101 *reg = *reg & (~((uint32_t)0xF)); //Clear last four bits of AFRL0 - GPIOB_AFRL REGISTER 00102 *reg=*reg|((uint32_t)0x2); //Set last four digits of AFRL0 to 0010 - AF2 Alternate Function 00103 } 00104 00105 00106 00107 void InitGPIOCPin6asInputCapture(void) 00108 { 00109 uint32_t *reg; //Initialize register pointer variable 00110 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); /* Enable the clock */ 00111 00112 reg = (uint32_t *)PORTC_MODER_REGISTER; 00113 *reg = *reg & (~((uint32_t)0x3000)); //Clear last two bits of MODER REGISTER 00114 *reg = *reg | ((uint32_t)0x2000); //Write 10 to last two bits of MODER REGISTER 00115 00116 reg = (uint32_t *)PORTC_OTYPER_REGISTER; 00117 *reg = *reg & (~((uint32_t)0x40)); //Clear last bit of OTYPER REGISTER 00118 *reg = *reg | ((uint32_t)0x00); //Setting 0 to last bit of OTYPER REGISTER 00119 00120 reg = (uint32_t *)PORTC_OSPEEDR_REGISTER; 00121 *reg = *reg & (~((uint32_t)0x3000)); //Clear last two bits of OSPEEDR REGISTER 00122 *reg = *reg | ((uint32_t)0x3000); //Setting of 11 to last two bits of OSPEEDR REGISTER - HIGH SPEED 00123 00124 reg = (uint32_t *)PORTC_PUPDR_REGISTER; 00125 *reg = *reg & (~((uint32_t)0x3000)); //Clear last two bits of PUPDR REGISTER - NO PULL UP/DOWN 00126 *reg = *reg | 0x00; //Setting two bits of PUPDR REGISTER - NO PULL UP/DOWN 00127 00128 reg = (uint32_t *)PORTC_AFR1_REGISTER; 00129 *reg= *reg & (~((uint32_t)0xF000000)); //Clear last four bits of AFRL0 - GPIOB_AFRL REGISTER 00130 *reg= *reg | ((uint32_t)0x2000000); //Set last four digits of AFRL0 to 0010 - AF2 Alternate Function 00131 } 00132 00133 void InitGPIOBPin0asPWMMode1(void) 00134 { 00135 uint32_t *reg; //Initialize register pointer variable 00136 00137 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* Enable the clock */ 00138 00139 reg = (uint32_t *)PORTB_MODER_REGISTER; 00140 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of MODER REGISTER 00141 *reg = *reg | ((uint32_t)0b10); //Write 10 to last two bits of MODER REGISTER 00142 00143 reg = (uint32_t *)PORTB_OTYPER_REGISTER; 00144 *reg = *reg & (~((uint32_t)0x01)); //Clear last bit of OTYPER REGISTER 00145 *reg = *reg | ((uint32_t)0x00); //Setting 0 to last bit of OTYPER REGISTER 00146 00147 reg = (uint32_t *)PORTB_PUPDR_REGISTER; 00148 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of PUPDR REGISTER - NO PULL UP/DOWN 00149 00150 reg = (uint32_t *)PORTB_OSPEEDR_REGISTER; 00151 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of OSPEEDR REGISTER 00152 *reg = *reg | ((uint32_t)0x03); //Setting of 11 to last two bits of OSPEEDR REGISTER - HIGH SPEED 00153 00154 reg = (uint32_t *)PORTB_AFR1_REGISTER; 00155 *reg = *reg & (~((uint32_t)0xF)); //Clear last four bits of AFRL0 - GPIOB_AFRL REGISTER 00156 *reg=*reg|((uint32_t)0x2); //Set last four digits of AFRL0 to 0010 - AF2 Alternate Function 00157 } 00158 00159 void setGPIOB0( void ) 00160 { 00161 uint32_t * reg; 00162 reg = (uint32_t *)PORTB_ODR_REGISTER; 00163 *reg = *reg | 0b01; 00164 } 00165 00166 void clearGPIOB0( void ) 00167 { 00168 uint32_t * reg; 00169 reg = (uint32_t *)PORTB_ODR_REGISTER; 00170 *reg = *reg & (~(uint32_t)0b01); 00171 } 00172 00173 void initGpioC6AsInput( void ) 00174 { 00175 uint32_t * reg; 00176 /* GPIOC Peripheral clock enable */ 00177 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); 00178 /* GPIOC Pin 6 as input*/ 00179 reg = (uint32_t *)PORTC_MODER_REGISTER; 00180 *reg = *reg & (~((uint32_t)0x3000)); 00181 *reg= *reg | 0x0000; 00182 /*PUSH-PULL Pin*/ 00183 reg = (uint32_t *)PORTC_OTYPER_REGISTER; 00184 *reg = *reg & (~((uint32_t)0x40)); 00185 *reg = *reg | 0x00; 00186 /*GPIOC pin 6 high speed */ 00187 reg = (uint32_t *)PORTC_OSPEEDR_REGISTER; 00188 *reg= *reg| 0x3000; 00189 /*Configure pulled-down*/ 00190 reg = (uint32_t *)PORTC_PUPDR_REGISTER; 00191 *reg = *reg & (~((uint32_t)0x3000)); 00192 *reg= *reg | 0x2000; 00193 } 00194
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